JPS61116437U - - Google Patents

Info

Publication number
JPS61116437U
JPS61116437U JP19900584U JP19900584U JPS61116437U JP S61116437 U JPS61116437 U JP S61116437U JP 19900584 U JP19900584 U JP 19900584U JP 19900584 U JP19900584 U JP 19900584U JP S61116437 U JPS61116437 U JP S61116437U
Authority
JP
Japan
Prior art keywords
analog switch
capacitor
switching element
parallel
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP19900584U
Other languages
Japanese (ja)
Other versions
JPH051156Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP19900584U priority Critical patent/JPH051156Y2/ja
Publication of JPS61116437U publication Critical patent/JPS61116437U/ja
Application granted granted Critical
Publication of JPH051156Y2 publication Critical patent/JPH051156Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Relay Circuits (AREA)
  • Electronic Switches (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の実施例を示す回路図、第2図
は従来例を示す回路図である。RVは可変抵抗器
、C1〜C3はコンデンサ、A1〜A3はアナロ
グスイツチ、Sは第1のスイツチング素子または
手動スイツチ、A4は第2のスイツチング素子ま
たはアナログスイツチ。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional example. RV is a variable resistor, C1 to C3 are capacitors, A1 to A3 are analog switches, S is a first switching element or manual switch, and A4 is a second switching element or analog switch.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 第1と第2のコンデンサを第1のアナログスイ
ツチを介して直列に接続したものを可変抵抗器と
アースとの間に挿入し、第1のコンデンサと第1
のアナログスイツチとに並列に接続した第2のア
ナログスイツチと、第1のアナログスイツチと第
2のコンデンサとに並列に接続した第3のアナロ
グスイツチの各制御端子に、第1のスイツチング
素子の出力を接続すると共に、該出力を反転する
第2のスイツチング素子の出力を第1のアナログ
スイツチの制御端子に接続して成る時定数切換回
路。
A first and second capacitor connected in series via a first analog switch is inserted between the variable resistor and ground, and the first capacitor and the first
The output of the first switching element is connected to each control terminal of a second analog switch connected in parallel to the analog switch of , and a third analog switch connected in parallel to the first analog switch and the second capacitor. A time constant switching circuit comprising: a first analog switch; and a second switching element for inverting the output;
JP19900584U 1984-12-31 1984-12-31 Expired - Lifetime JPH051156Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19900584U JPH051156Y2 (en) 1984-12-31 1984-12-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19900584U JPH051156Y2 (en) 1984-12-31 1984-12-31

Publications (2)

Publication Number Publication Date
JPS61116437U true JPS61116437U (en) 1986-07-23
JPH051156Y2 JPH051156Y2 (en) 1993-01-13

Family

ID=30758524

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19900584U Expired - Lifetime JPH051156Y2 (en) 1984-12-31 1984-12-31

Country Status (1)

Country Link
JP (1) JPH051156Y2 (en)

Also Published As

Publication number Publication date
JPH051156Y2 (en) 1993-01-13

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