JPS61109279U - - Google Patents

Info

Publication number
JPS61109279U
JPS61109279U JP19283284U JP19283284U JPS61109279U JP S61109279 U JPS61109279 U JP S61109279U JP 19283284 U JP19283284 U JP 19283284U JP 19283284 U JP19283284 U JP 19283284U JP S61109279 U JPS61109279 U JP S61109279U
Authority
JP
Japan
Prior art keywords
deflection
deflection electrode
electrode
terminal
distortion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19283284U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP19283284U priority Critical patent/JPS61109279U/ja
Publication of JPS61109279U publication Critical patent/JPS61109279U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Color Television Image Signal Generators (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

図は本考案の一実施例を示す回路図である。 2:偏向電極の正極側、4:偏向電極の負極側
、7,10:V.MOS FET、6,8,9:
オペアンプ。
The figure is a circuit diagram showing an embodiment of the present invention. 2: Positive electrode side of the deflection electrode, 4: Negative electrode side of the deflection electrode, 7, 10: V. MOS FET, 6, 8, 9:
operational amplifier.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 電磁集束静電偏向形撮像管を用いた3管式カラ
ーカメラ装置の偏向回路において、偏向電極に加
える偏向ひずみ補正信号を、電解効果トランジス
タのゲート端子に入力し、そのソース端子に所定
の負荷抵抗を接続し、そのドレイン端子を上記偏
向電極に接続することにより偏向ひずみ補正をお
こなうことを特徴としたレジストレーシヨン補正
回路。
In the deflection circuit of a three-tube color camera device using an electromagnetic focusing electrostatic deflection type image pickup tube, a deflection distortion correction signal applied to the deflection electrode is input to the gate terminal of a field effect transistor, and a predetermined load resistance is connected to the source terminal. A registration correction circuit characterized in that deflection distortion is corrected by connecting the above-mentioned deflection electrode to the deflection electrode and connecting its drain terminal to the deflection electrode.
JP19283284U 1984-12-21 1984-12-21 Pending JPS61109279U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19283284U JPS61109279U (en) 1984-12-21 1984-12-21

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19283284U JPS61109279U (en) 1984-12-21 1984-12-21

Publications (1)

Publication Number Publication Date
JPS61109279U true JPS61109279U (en) 1986-07-10

Family

ID=30750242

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19283284U Pending JPS61109279U (en) 1984-12-21 1984-12-21

Country Status (1)

Country Link
JP (1) JPS61109279U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57199384A (en) * 1981-06-02 1982-12-07 Hitachi Denshi Ltd Registration correcting circuit for television camera

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57199384A (en) * 1981-06-02 1982-12-07 Hitachi Denshi Ltd Registration correcting circuit for television camera

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