JPS6110864B2 - - Google Patents

Info

Publication number
JPS6110864B2
JPS6110864B2 JP56152801A JP15280181A JPS6110864B2 JP S6110864 B2 JPS6110864 B2 JP S6110864B2 JP 56152801 A JP56152801 A JP 56152801A JP 15280181 A JP15280181 A JP 15280181A JP S6110864 B2 JPS6110864 B2 JP S6110864B2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56152801A
Other languages
Japanese (ja)
Other versions
JPS5854426A (ja
Inventor
Moriaki Matsura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Original Assignee
Victor Company of Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd filed Critical Victor Company of Japan Ltd
Priority to JP56152801A priority Critical patent/JPS5854426A/ja
Publication of JPS5854426A publication Critical patent/JPS5854426A/ja
Publication of JPS6110864B2 publication Critical patent/JPS6110864B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/17Interprocessor communication using an input/output type connection, e.g. channel, I/O port

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Information Transfer Systems (AREA)
  • Communication Control (AREA)
JP56152801A 1981-09-26 1981-09-26 デ−タ転送方式 Granted JPS5854426A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56152801A JPS5854426A (ja) 1981-09-26 1981-09-26 デ−タ転送方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56152801A JPS5854426A (ja) 1981-09-26 1981-09-26 デ−タ転送方式

Publications (2)

Publication Number Publication Date
JPS5854426A JPS5854426A (ja) 1983-03-31
JPS6110864B2 true JPS6110864B2 (en:Method) 1986-03-31

Family

ID=15548445

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56152801A Granted JPS5854426A (ja) 1981-09-26 1981-09-26 デ−タ転送方式

Country Status (1)

Country Link
JP (1) JPS5854426A (en:Method)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11321087B2 (en) 2018-08-29 2022-05-03 Cerebras Systems Inc. ISA enhancements for accelerated deep learning
US11328208B2 (en) 2018-08-29 2022-05-10 Cerebras Systems Inc. Processor element redundancy for accelerated deep learning
US11328207B2 (en) 2018-08-28 2022-05-10 Cerebras Systems Inc. Scaled compute fabric for accelerated deep learning

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6048052B2 (ja) * 2012-10-11 2016-12-21 富士電機株式会社 信号伝送装置およびスイッチング電源装置

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11328207B2 (en) 2018-08-28 2022-05-10 Cerebras Systems Inc. Scaled compute fabric for accelerated deep learning
US11321087B2 (en) 2018-08-29 2022-05-03 Cerebras Systems Inc. ISA enhancements for accelerated deep learning
US11328208B2 (en) 2018-08-29 2022-05-10 Cerebras Systems Inc. Processor element redundancy for accelerated deep learning

Also Published As

Publication number Publication date
JPS5854426A (ja) 1983-03-31

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