JPS61104650U - - Google Patents
Info
- Publication number
- JPS61104650U JPS61104650U JP18831484U JP18831484U JPS61104650U JP S61104650 U JPS61104650 U JP S61104650U JP 18831484 U JP18831484 U JP 18831484U JP 18831484 U JP18831484 U JP 18831484U JP S61104650 U JPS61104650 U JP S61104650U
- Authority
- JP
- Japan
- Prior art keywords
- input
- band
- series
- antenna
- coils
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004804 winding Methods 0.000 claims 6
Landscapes
- Circuits Of Receivers In General (AREA)
- Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
Description
図は本考案の一実施例を示すものである。
１……ループアンテナ、２，３……入力コイル
、６……可変容量素子、１１……スイツチ。
The figure shows an embodiment of the present invention. 1... Loop antenna, 2, 3... Input coil, 6... Variable capacitance element, 11... Switch.
Claims (1)
設けられた第１入力コイルと、第２バンド放送に
対応して設けられた第２入力コイルと、可変容量
素子とを備えた受信機のアンテナ入力回路であつ
て、前記第１及び第２入力コイルの一次側巻線と
前記ループアンテナとを直列に、また前記第１及
び第２入力コイルの２次側巻線を直列に、更に前
記１次側若しくは２次側巻線と前記可変容量素子
を並列に夫々接続すると共に、第１バンド受信時
には前記第２入力コイルの一次側巻線を短絡し、
第２バンド受信時には前記第１入力コイルの２次
巻線を短絡するスイツチ手段を設けたことを特徴
とする受信機のアンテナ入力回路。 Antenna input of a receiver including a loop antenna, a first input coil provided for first band broadcasting, a second input coil provided for second band broadcasting, and a variable capacitance element. the circuit, wherein the primary windings of the first and second input coils and the loop antenna are connected in series, the secondary windings of the first and second input coils are connected in series, and the primary windings of the first and second input coils are connected in series; connecting the side or secondary windings and the variable capacitance element in parallel, and short-circuiting the primary winding of the second input coil when receiving the first band;
An antenna input circuit for a receiver, comprising a switch means for short-circuiting a secondary winding of the first input coil when receiving a second band.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1984188314U JPH0314843Y2 (en) | 1984-12-12 | 1984-12-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1984188314U JPH0314843Y2 (en) | 1984-12-12 | 1984-12-12 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61104650U true JPS61104650U (en) | 1986-07-03 |
| JPH0314843Y2 JPH0314843Y2 (en) | 1991-04-02 |
Family
ID=30745786
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1984188314U Expired JPH0314843Y2 (en) | 1984-12-12 | 1984-12-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0314843Y2 (en) |
-
1984
- 1984-12-12 JP JP1984188314U patent/JPH0314843Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0314843Y2 (en) | 1991-04-02 |
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