JPS6093850A - Data transmission system - Google Patents

Data transmission system

Info

Publication number
JPS6093850A
JPS6093850A JP20183983A JP20183983A JPS6093850A JP S6093850 A JPS6093850 A JP S6093850A JP 20183983 A JP20183983 A JP 20183983A JP 20183983 A JP20183983 A JP 20183983A JP S6093850 A JPS6093850 A JP S6093850A
Authority
JP
Japan
Prior art keywords
data
transmission line
transmission system
order transmission
stations
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP20183983A
Other languages
Japanese (ja)
Other versions
JPH0237148B2 (en
Inventor
Kenji Hara
憲二 原
Ikuo Furuya
古谷　郁男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yaskawa Electric Corp
Original Assignee
Yaskawa Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yaskawa Electric Manufacturing Co Ltd filed Critical Yaskawa Electric Manufacturing Co Ltd
Priority to JP20183983A priority Critical patent/JPH0237148B2/en
Publication of JPS6093850A publication Critical patent/JPS6093850A/en
Publication of JPH0237148B2 publication Critical patent/JPH0237148B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Small-Scale Networks (AREA)

Abstract

PURPOSE:To connect stations with good efficiency and low cost by constituting lines between subordinate stations as a system where a clock and a data are transmitted in parallel and using in common an interface module tied from the subordinate stations to a high-order transmission line. CONSTITUTION:When a signal is transmitted from a master station through the high-order transmission line 1, a line driver 4-a inputs a data to a PLL circuit 4-b. The circuit 4-b transmits the clock to a low-order transmission line 3-a and transmits the data to a low-order transmission line 3-b. A secondary station 2 fetches the data in an RXD. When the secondary station 2 completes the input of data and the own station generates a response signal, an SEND signal is outputted so as to bring the level of the low-order transmission line 3-c to ''L''. Thus, the PLL circuit 4-b reaches the state of FREE RVN so as to transmit the transmission clock to the low-order transmission line 3-a. The transmission data TXD of the secondary station is transmitted to the high-order transmission line 1. An expensive demodulation section (PLL circuit) is shared in common to plural stations.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、データ伝送システムに関し、特に工ｔＪＮ［
化（ファクトリ−・オートメーション）を実現するだめ
の上位計算機と各制御装置間などのデータ伝送システム
に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a data transmission system, and in particular to a data transmission system.
This invention relates to a data transmission system between a host computer and each control device that realizes factory automation.

〔背景技術〕[Background technology]

かかるデータ伝送システムとしては、信号中からクロッ
クを抽出するようにしたｔ）１−信号よりなる伝送方式
を用いるシステムが知られている。As such a data transmission system, a system using a transmission method consisting of a t)1-signal in which a clock is extracted from the signal is known.

例えば、ＮＲＺＩ方式もその一例である。For example, the NRZI method is one example.

この方式の長所としては、信号線数が少ないので、局間
距離が長い場合にコスト的に有利であるということが挙
げられる。An advantage of this system is that it has a small number of signal lines, so it is advantageous in terms of cost when the distance between stations is long.

ＮＲＺＩ方式にツイテは特開昭５５−８９９１２や特開
昭５７−１８２４６１に詳しいので、ここで（３） は全ての局の受信部に復調回路（例えばＰＬＬ回路）を
必要とするという問題点がある。Regarding the NRZI system, Tweet is familiar with JP-A-55-89912 and JP-A-57-182461, so here (3) has the problem of requiring a demodulation circuit (for example, a PLL circuit) in the receiving section of every station. be.

第１図に示すような、伝送ライン１に局（モジュールと
称しても良い）２が接続される場合の、具体的回路例を
第２図に示す。FIG. 2 shows a specific example of a circuit when a station (also referred to as a module) 2 is connected to a transmission line 1 as shown in FIG.

第２図において、４がＰＬＬ復調部であシ、各局２ごと
に、それを備えておかねばならない。In FIG. 2, numeral 4 is a PLL demodulator, which must be provided for each station 2.

つまり、局間距離が短い場合には、信号線を減じること
によりコストを下げることよりも、むしろ復調回路部の
コストの方が大きくなってくる。In other words, when the distance between stations is short, the cost of the demodulation circuit increases rather than reducing the cost by reducing the number of signal lines.

〔発明の目的〕[Purpose of the invention]

本発明は、このような事情に鑑みてなされたものであり
、局間を効率良く、しかも低コストで接続するデータ伝
送システムを提供することを目的とする。The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a data transmission system that connects stations efficiently and at low cost.

〔発明の要旨〕[Summary of the invention]

本発明の要旨となるところは、下位局間は一般的で安価
なりロックとデータが平行して送られるデータ伝送シス
テムとして構成し、これらの下位局が上位伝送ラインと
を結ぶインターフェースモジュールを共有するようにし
た点にある。The gist of the present invention is to configure a general, inexpensive data transmission system in which locks and data are sent in parallel between lower stations, and to share an interface module connecting these lower stations with an upper transmission line. The point is that I did it like this.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明の具体的実施例を説明する。 Hereinafter, specific examples of the present invention will be described.

第３図は、本発明の概念を示すブロック図である。FIG. 3 is a block diagram illustrating the concept of the present invention.

１は上位伝送ラインで、信号中からクロックを抽出でき
る形式の伝送信号（ＮｒＬＺＴ方式、マンチェスタ一方
式等）が送られている。Reference numeral 1 denotes an upper transmission line, through which a transmission signal (NrLZT system, Manchester one-way system, etc.) in a format that allows a clock to be extracted from the signal is sent.

２は局、３は下位伝送ライン、４はインターフェースモ
ジュールである。2 is a station, 3 is a lower transmission line, and 4 is an interface module.

第４図は本発明の具体的回路例であり、ここでは半２重
（Ｈａｌｆ−ＤＩＩＴ）ＩＯＸ）／ｌ／−プ回線として
いる。第４図を用いて、具体的動作を説明する。FIG. 4 shows a specific circuit example of the present invention, in which a half-DIIT (IOX)/l/-p line is used. The specific operation will be explained using FIG. 4.

主局（データ送信局）より、上位伝送ライン１を通って
信号が送られてくると、ライントライノ仁４−　ａは、
ＰＬＬ回路４−１〕にデータを入力する。When a signal is sent from the main station (data transmitting station) through the upper transmission line 1, the line trino 4-a
PLL circuit 4-1].

ＰＬＬ回路４−ｂは、信号中よりクロックをｈ１１出し
、デー）４−ｅを通して下位伝送ライン３−ＩＬにクロ
ックを送出するとともに、データを整型しゲート４−ｄ
を通して下位伝送ライン３−１）にデー（５） りを送出する。２次局（データ受信局）２は、ＲＸＤに
取り込む。このとき下位伝送ライン３−　ｃはゝ■′で
ある。２次局２は、データを入力し終わり自己が応答信
号を発するときは、５ＥＮＤ信号を出力し、下位伝送ラ
イン３−　ｃをＬ′にする。The PLL circuit 4-b outputs a clock h11 from the signal, sends the clock to the lower transmission line 3-IL through the data gate 4-e, and formats the data to the gate 4-d.
The data (5) is sent to the lower transmission line 3-1) through the lower transmission line 3-1). The secondary station (data receiving station) 2 takes it into RXD. At this time, the lower transmission line 3-c is ``■''. When the secondary station 2 finishes inputting data and issues a response signal, it outputs a 5END signal and sets the lower transmission line 3-c to L'.

これによりゲート４−ｄは閉じ、ＰＬＬ回路４ｂはＦＲ
ＥＥ　ＲＵＮとなり、所定の送信クロックを下位伝送ラ
イン３−　ａに送出する。As a result, the gate 4-d closes, and the PLL circuit 4b becomes FR.
EE RUN, and sends a predetermined transmission clock to the lower transmission line 3-a.

２次局の送信データＴＸＤは、このクロックによって下
位伝送バス３−ｂに出力され、アクティブになったライ
ンドライバー４−　ｅを通して上位伝送ライン１に送出
される。Transmission data TXD from the secondary station is output to the lower transmission bus 3-b by this clock, and is sent to the upper transmission line 1 through the activated line driver 4-e.

このようにして、上位と下位の伝送ラインが接続される
。In this way, the upper and lower transmission lines are connected.

なお、上位伝送ラインは光フアイバーケーブルで構成し
ても良く、また下位伝送ラインは、フラットケーブル等
で構成できる。Note that the upper transmission line may be composed of an optical fiber cable, and the lower transmission line may be composed of a flat cable or the like.

つ寸り一複靭の届をｒトμつの盤内に１■納１．て、（
６） 光フアイバーケーブル、盤内をフラットケーブルで接続
することができる。Deliver one size and two pieces of paper in one board. 1. hand,(
6) Optical fiber cables can be connected inside the panel using flat cables.

〔発明の効果〕〔Effect of the invention〕

以上述べたように本発明によれば、高価な復調部（ＰＬ
Ｌ回路）を複数の局で共有できるので、低コストで効率
の良い、しかも融通性に富んだデータ伝送システムが得
られる。As described above, according to the present invention, the expensive demodulator (PL
L circuit) can be shared by multiple stations, resulting in a low-cost, efficient, and highly flexible data transmission system.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は従来例の概念図、第２図は従来例の回路図、第
３図は本発明の概念図、第４図は本発明の具体的実施例
である。 第３図 第４　図 手続補正撥 １、事件の表示 昭和５８年特許願第２０１８３９Ｍ ２、発明の名称 データ伝送システム ３、補正をする者 事件との関係　特許出願人 住所　福岡県北九州市八幅西区大字藤田２３４６番地５
、補正により増加する発明の数　０ ６、補正の対象 明ｌ１１１の「発明の詳細な説明」の欄７、補正の内容FIG. 1 is a conceptual diagram of a conventional example, FIG. 2 is a circuit diagram of a conventional example, FIG. 3 is a conceptual diagram of the present invention, and FIG. 4 is a specific embodiment of the present invention. Figure 3 Figure 4 Procedure amendment 1, Indication of the case 1982 Patent Application No. 201839M 2, Name of the invention Data transmission system 3, Person making the amendment Relationship with the case Patent applicant address Yahaba Nishi-ku, Kitakyushu City, Fukuoka Prefecture 2346-5 Oaza Fujita
, Number of inventions increased by amendment 0 6, Subject of amendment 111, "Detailed description of the invention" column 7, Contents of amendment

Claims (3)

【特許請求の範囲】[Claims] （１）信号中よりクロックを抽出することができる形式
の単一信号データ伝送方式で、上位伝送システムを構成
し、 データとクロックが平行して送られる形式のデータ伝送
方式で、下位伝送システムを構成し、各局は、複数局ご
とに前記下位伝送システムに接続され、この複数局ごと
から構成される下位伝送システム毎に復調部を設け、該
復調部を上位伝送システムに接続することにより」三位
と下位の伝送システムを連絡し、各局が自己の応答信号
を発するときには前記復調部が送出するデータのみを差
し止めるようにすることを特徴とするデータ伝送システ
ム。(1) A single-signal data transmission system in which the clock can be extracted from the signal constitutes the upper transmission system, and a data transmission system in which data and clock are sent in parallel constitutes the lower transmission system. Each station is connected to the lower transmission system for each plurality of stations, a demodulation section is provided for each lower transmission system composed of each of the plurality of stations, and the demodulation section is connected to the upper transmission system. 1. A data transmission system, characterized in that when each station issues its own response signal, only the data transmitted by the demodulation section is withheld. （２）前記上位伝送システムは、ＮＩＬＺＩ方式で構成
されることを特徴とする特許請求の範囲第１項（２）(2) Claim 1(2) characterized in that the higher-level transmission system is configured using the NILZI system. （３）前記上位伝送システムは、マンチェスタ一方式で
構成されることを特徴とする特許請求の範囲第１項記載
のデータ伝送システム。(3) The data transmission system according to claim 1, wherein the higher-level transmission system is configured using a Manchester one-way system.
JP20183983A 1983-10-26 1983-10-26 DEETADENSOSHISUTEMU Expired - Lifetime JPH0237148B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20183983A JPH0237148B2 (en) 1983-10-26 1983-10-26 DEETADENSOSHISUTEMU

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20183983A JPH0237148B2 (en) 1983-10-26 1983-10-26 DEETADENSOSHISUTEMU

Publications (2)

Publication Number Publication Date
JPS6093850A true JPS6093850A (en) 1985-05-25
JPH0237148B2 JPH0237148B2 (en) 1990-08-22

Family

ID=16447743

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20183983A Expired - Lifetime JPH0237148B2 (en) 1983-10-26 1983-10-26 DEETADENSOSHISUTEMU

Country Status (1)

Country Link
JP (1) JPH0237148B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1986003914A1 (en) * 1984-12-17 1986-07-03 Micro Engineering Co., Ltd. Circuit switching devices

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1986003914A1 (en) * 1984-12-17 1986-07-03 Micro Engineering Co., Ltd. Circuit switching devices

Also Published As

Publication number Publication date
JPH0237148B2 (en) 1990-08-22

Similar Documents

Publication Publication Date Title
JP7133022B2 (en) In-vehicle communication device and in-vehicle system
US5952932A (en) Communication between master unit and slave unit with efficient protocol
JPH0347786B2 (en)
US4150438A (en) Interfaces for connecting coded and non-coded data transmission systems
JPS6093850A (en) Data transmission system
US5042053A (en) Zero-sync-time apparatus for encoding and decoding
JPS61147332A (en) Code converter
KR100736771B1 (en) Apparatus for interfacing can bus
EP1036458B1 (en) A communications protocol
JPS5992653A (en) Data transmitter
JPS61137444A (en) Programmable controller system
JPS6230361Y2 (en)
JPS6127792B2 (en)
JPS5853254A (en) Data communication system for multidrop connection
JPS6236941A (en) Data communication equipment in automobile
JPH0377458A (en) Communication system
JP2019004400A (en) Address setting device and system
JPS59143447A (en) Serial data transmission system
JPH03217140A (en) Data transmission system
JPS63263514A (en) Balanced/unbalanced converter for scsi bus
JPS628254A (en) Signal receiving and distributing circuit
JPS58210735A (en) Data transmitter
JPS60151767A (en) Daisy chain circuit
JPS6116644A (en) Transmitting device
JPS63310242A (en) Data transmission device