JPS6087589A - Multiplex broadcast receiver - Google Patents

Abstract

PURPOSE:To decrease power consumption by designing the titled receiver that a power of an adaptor unit is supplied from a main body section when the unit is mounted. CONSTITUTION:The lower part from alternate long and short dash line in Fig. constitutes the adaptor unit and its major circuit section is formed with an ROM23 for generating Kanji (Chinese character), a work ROM19', a main memory 17' and a music generating section 24. The power supply required for each circuit section is supplied from the power supply 22 of the receiver main body. There is a time difference of several years in general between the point of time of the design of the receiver main body and the point of time when an adaptor unit is mounted by the use, and it is expected that the power consumption for the adaptor unit is reduced remarkably because of the technological progress during the time difference, then it is not required to design the capacity of the power supply 22 of the main body part more than the required capacity.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a receiving device equipped with a digital memory that receives a binary information signal superimposed on a television signal and transmitted.

Configuration of a conventional example and its problems A block diagram of an example of a conventional television multiplex signal receiving apparatus is shown in FIG. In FIG. 1, the portions 1 to 21 and 22A shown above the dashed-dotted line have a configuration conventionally known as a teletext receiver (pattern transmission method). Kanji ROM23 written below the dashed line. Music generation circuit 24. The main memory 17', work ROM 19', and DC power supply circuit 22B have the function of receiving and converting characters into characters when they are encoded and transmitted, and decoding them when a musical score is encoded and transmitted. This is an additional unit that has the function of generating musical sounds. This additional unit is attached to and coupled to the main body via a pass line, and is intended to be able to receive teletext broadcasting using the code transmission system. However, such an additional unit requires a DC power supply. It is common to have a separate power supply, which has the inconvenience of requiring an extra capacity power supply separate from the main unit.

OBJECTS OF THE INVENTION An object of the present invention is to provide a receiving device which can supply power from the main body when an additional unit is attached, and which can also reduce the capacity of the power supply of the main body. It is something to do.

The structure of the invention: the smell of wood is 7-L'E";=y'7
. 1. Receives the binary information signal transmitted superimposed on the retrace period and records it in the digital memory. In addition, the power supply for all or part of this digital memory is supplied through a switch circuit in a route different from that of other parts of the reception circuit, and the power is supplied to all or part of this digital memory via a switch circuit, and this separate route is used to supply power to all or a part of the digital memory. A terminal is provided for attaching to the receiving circuit an additional unit equipped with a group of integrated circuits capable of performing all the functions of the digital memory to which power is supplied and has additional functions, and this additional unit is installed. In some cases, a power supply switching circuit is provided that disconnects the power supply from part or all of the digital memory and the buffer circuit inserted between the digital memory and the data address bus line, and switches the power supply to the additional unit. It is characterized by this.

DESCRIPTION OF THE EMBODIMENTS Hereinafter, a description will be given with reference to FIG. 2, which shows a block diagram of a television multiplex broadcast receiving apparatus according to an embodiment of the present invention.

In the figure, 1 is a tuner, 2 is a VIP circuit, 3 is a video detection circuit, 4 is a chroma/video signal processing circuit, 5 is a sync separation circuit, 6 is a horizontal/vertical oscillation circuit, 7 is a deflection output circuit, 8 9 is a video output circuit, and 9 is a color cathode ray tube. Further, 10 is a switching/mixing circuit for the output signal of the chroma/video processing circuit 4 and the output signal of the R, G/B signal forming circuit 21 for character display, and 11 is a circuit for extracting only the character signal from the received signal. A clock generation circuit, 12 a slice circuit for forming a received signal into a binary code, 13 a gate pulse generation circuit for extracting a character signal multiplex section, 14 a circuit for clock sampling the character signal, 16 16 is a buffer memory, 17 is a digital main memory that stores character signals for at least one screen, 18 is a center processing unit (CPU) for control, and 19 iCPU 18 is a circuit that controls writing and reading of the buffer memory 16; 7-
20 is a RAM ('PU18(1)'); 21 is a circuit for forming RGB signals for character display from the output read from the main digital memory 17; 22 is a circuit for forming RGB signals for character display; This is a power supply circuit.These parts make up the main body.

The part below the dashed line (consists of the q-addition unit, 2
3 is a kanji generation ROM for converting encoded and transmitted character signals into display video signals; 17' is a raw digital memory of an additional unit; main digital memory 1;
Act on behalf of 7. Further, 19' is a work RAM of an additional unit, which takes the place of the work RAM 19. 24 is a circuit that generates music according to the encoded signal of the transmitted musical score.

The operations of parts 1 to 22 are well known and will therefore be omitted.

Now, in our country, the Radio Technology Council reported on the pattern system for teletext broadcasting standards in March 1986. On the other hand, the standards for the coding system are still under consideration. After broadcasting using the pattern method has started, if the standard for the code method is determined, or if a completely different binary information broadcast is to be received, the signal format must be the same as the basic method of the pattern method. If so, the kana part can be used in common.

Portions 17', 19', 23, and 24 in Fig. 2 are units that can be added later to expand and add reception functions in such cases. It is not economical to leave it there. Therefore, when the additional unit is installed, the main memory 1 is connected to the power supply circuit 22.
7, and switch to supplying power from the power supply circuit 22 to each circuit of the additional adapter.

Here, let us consider a case where the additional unit receives a character code signal. Kanji generation ROM
23 is 1M bit, and the main digital memory 17' is a RAM having a capacity sufficient to color dots, and a work RO.
M19' is a ROM in which a program for receiving the code system is written.

It is also a circuit that converts a music information signal encoded and sent from the music generation circuit 241 into music.

Now, in order to implement this device, when the power to the main digital memories 1.7 and 19 is disconnected, the input/output pins and address terminals of the main digital memories 17 and 19 will not have a negative effect on the pass line. It is necessary to connect the main digital memories 17 and 19 to the pass line by inserting a buffer circuit in between.

An example of such a buffer circuit 25 is shown in FIG. Figure 3 shows the contents of the circuits required for one path line tree.If there are 8 data buses and 16 address buses, a total of 24 sets of buffer circuits 25 consisting of 26 to 4o are required. .

In FIG. 3, Vcl indicates a power line that is cut off when an additional unit is installed as described later, and is 6V for Vcl-Vc2 and 6V for a TTL circuit. -RAM191
1 shows a part of the work ROM 19, one input/output or address terminal is designated as bl, and the corresponding path line is designated as al. cl is 1 for the entire buffer circuit 26
When cl is at a high level, AND gate 27 conducts and a voltage is generated across resistor 129, transistor 33 conducts and its emitter drops. That is, the transistor 32 becomes conductive. On the other hand, the AND gate 28 is cut off, and no voltage is generated across the resistor 300.
Transistor 37 is cut off.

As a result, the transistor 36 is also cut off, so the transistor 41 is also cut off, and when viewed in the direction of arrow B, becomes high impedance. At this time, when al becomes high level, transistor 32 becomes conductive, current flows through resistor 31, the base of transistor 4° is lowered, transistor 4Q becomes conductive, and a high level signal is transmitted to bl. al
When b! goes low, transistor 32 is cut off, transistor 40 is cut off, and b! becomes low level. bl
Even if b1' changes, the base of transistor 41 is not affected by the change in b1' because transistor 36 is cut off.

Next 1fi:, when c1 is set to a low level, transistors 33, 32, and 40 are cut off, and the impedance in the direction of the JL1 arrow becomes high impedance, while the inverter 26
The output becomes high level, and the AND gate 28 becomes conductive. Transistor 37 becomes conductive, and transistor 36 becomes conductive. R
The read signal from AM191 is high level, 1. ! 1)
When jbl becomes a high level, the transistor 36 becomes conductive, the collector current of the transistor 36 flows through the resistor 36, the base current of the transistor 410 decreases, and the transistor 41 becomes conductive, causing its collector current to become high level. Become. ff1J, the change in bl is transmitted to 81.

If bl is an address terminal, AND gate 281. The transistors 37, 36, and 41 are not necessary, but if they are integrated into an IC, there will be no operational problem if they are left as they are from the standpoint of versatility.

Next, cut off vCl and set it to zero volts, AND game)
27 and 28 are both blocked, and when you look in the direction of arrows A and H from al, both have no impedance,
It does not affect Basrai/.

It should be noted that the circuits 26 to 420 illustrate the principle, and it goes without saying that in the IC circuit, the resistors are replaced with transistors.

FIG. 4 shows the configuration of the power supply, connector, and microswitch. 46 is a connector of the additional unit shown in FIG. 2, which has a built-in male bottle. For example, a 32-pin connector is used. 45 is a 32-pin female connector.

Stretch out one side of connector 46 and connect connectors 46 and 4.
When the microswitch 5 is fitted and connected, the hatched portion of the connector 46 presses the protrusion of the microswitch 43 to switch the microswitch 43. The microswitch 43 is a microswitch that can handle a current up to several amperes, and has a common terminal CO connected to a DC power source, a normally closed terminal NO terminal connected to Vcl, and a normally open terminal No connected to the connector 45. When the connectors 46 and 46 are connected, the protrusion 44 is pressed, the NC-Co terminals are cut off, the Co-No terminals are connected, and the connector 45
．． 46 to 17', 19' in FIG.

Power (Vcl) is supplied to portions 23 and 24.

Effects of the Invention In general, there is a difference of 2 to 3 years or several years between the time when the main body of the receiving device 1rAS is produced for membrane use and the time when the additional unit is installed. Due to technological advances during that time, the power required for the 4=J addition unit has generally been significantly reduced compared to the power required for the digital memory, etc. in the main body. Even if the capacity of the power supply is not increased too much, it is possible to supply power to each circuit of the additional unit by cutting the power of the digital memory and pass line buffer circuit in the main body, and it is necessary to increase the capacity of the power supply a little. Even if there is, the margin can be made smaller than when the power of the digital memory or buffer circuit is not cut.

[Brief explanation of drawings]

Figure 1 is a block diagram of a conventional multiplex broadcast receiver.
3 is a block diagram of a multiplex broadcast receiving apparatus according to an embodiment of the present invention, FIG. 3 is a circuit diagram of a buffer circuit used in the apparatus, and FIG. 4 is a circuit diagram of a power supply switching circuit used in the apparatus. 17... Main digital memory, 17'...
...Main digital memory, 19...Work RO
-M, 19'...Work ROM, 20...
... Work RAM, 22 ... Power supply circuit, 23
......ROM for kanji generation, 24...music generation circuit, 25...buffer circuit. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 3
Figure 4 Figure 17 2lq, d:i2u11

Claims (1)

[Claims] A receiving circuit is provided which receives a binary information signal that is folded and transmitted during the vertical retrace period of a television signal, stores it in a digital memory, reads it out and displays it, and also includes a receiving circuit that receives a binary information signal that is folded and transmitted during a vertical retrace period of a television signal, stores it in a digital memory, reads it out and displays it, and stores all or part of the digital memory. The power source of 11iI is connected (In) through a switch circuit through a route different from that of other parts of the receiving circuit, and the power is supplied through the separate route.
Hayabusa Ji', which is capable of acting on behalf of all the functions of the digital memory in i, and has additional functions.
A terminal for attaching a J addition unit to the receiving circuit is provided, and the additional unit is equipped with a
2, disconnect the power to the digital memory and part or all of the buffer circuit inserted between the digital memory and the data address bus line, and supply power to the additional unit. Do.1
A multi-JR broadcast receiving device characterized by being provided with a power supply switching circuit that switches between the two.