JPS6086936A - Simple space diversity system - Google Patents

Simple space diversity system

Info

Publication number
JPS6086936A
JPS6086936A JP19479183A JP19479183A JPS6086936A JP S6086936 A JPS6086936 A JP S6086936A JP 19479183 A JP19479183 A JP 19479183A JP 19479183 A JP19479183 A JP 19479183A JP S6086936 A JPS6086936 A JP S6086936A
Authority
JP
Japan
Prior art keywords
circuit
phase
received
phase difference
receiver
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19479183A
Other languages
Japanese (ja)
Inventor
Taku Ishii
卓 石井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP19479183A priority Critical patent/JPS6086936A/en
Publication of JPS6086936A publication Critical patent/JPS6086936A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/02Arrangements for detecting or preventing errors in the information received by diversity reception
    • H04L1/06Arrangements for detecting or preventing errors in the information received by diversity reception using space diversity

Abstract

PURPOSE:To always control a phase difference within 90 deg. and to attain integration of a phase shifter by changing the phase of the 2nd reception wave by a fixed amount when the phase difference exceeds 90 deg. between the 1st and 2nd reception waves received by the 1st and 2nd receivers. CONSTITUTION:A simple space diversity system contains the 1st and 2nd receivers 1 and 2, a 180 deg.-hybrid circuit 30, switch circuits 31 and 32, a synthesizing circuit 5, a comparator 39, etc. The 1st reception wave received by the receiver 1 is applied to the circuit 5; while the 2nd reception wave received by the receiver 2 is supplied to the circuit 30. The phase difference between the 1st and 2nd reception waves is obtained through processes of a rectifying circuit 40, a differential amplifier 33, an absolute value circuit 34, a variable gain amplifier 35, an addition amplifier 36 and the comparator 39. When the phase shift exceeds 90 deg., the circuits 31 and 32 are controlled by the output of a level shift circuit 38. Then the phase of the 2nd reception wave is changed by a fixed amount to always keep the phase difference within 90 deg. to be synthesized by the circuit 5.

Description

【発明の詳細な説明】 (a) 発明の技術分野 本発明は簡易型スペース・ダイパーシティ方式に係り、
特に周波数変調波を利用する無線システム及び小容量デ
ィジタル無線システムに使用する簡易型スペース・ダイ
パーシティ方式に関するものである。
[Detailed Description of the Invention] (a) Technical Field of the Invention The present invention relates to a simplified space diversity method,
In particular, the present invention relates to a simplified space diversity method used in radio systems that utilize frequency modulated waves and small-capacity digital radio systems.

(bl 従来技術と問題点 マイクロ波帯の多重無線システムにおいて中継ンクによ
り伝送特性が変化し通信品質が劣化することがあるので
、このフェージングによる伝送特性の変動を補償する為
のスペース・ダイパーシティ方式が実用化されている。
(bl Prior Art and Problems In a microwave band multiplex radio system, transmission characteristics may change due to relay links and communication quality may deteriorate. Therefore, a space diversity method is used to compensate for fluctuations in transmission characteristics due to fading. has been put into practical use.

第1図〜第3図は従来のスペース・ダイパーシティ方式
を実施する為のブロック接続図を示す。
1 to 3 show block connection diagrams for implementing the conventional space diversity method.

先ず、第1図はスペース・ダイパーシティ方式を説明す
る為の図である。
First, FIG. 1 is a diagram for explaining the space diversity method.

同図に於て、合成回路5には受信機1で受信された第1
の受信波と、受信機2で受信された後無限移相器3を通
って成る位相回転を与えられた第2の受信波とが加えら
れる。そして、前記の合成回路5で合成された合成波が
出力端子6から外部に出力される。
In the figure, the combining circuit 5 receives the first signal received by the receiver 1.
, and a second received wave that is received by the receiver 2 and then passed through the infinite phase shifter 3 and given a phase rotation. Then, the synthesized wave synthesized by the synthesis circuit 5 is outputted from the output terminal 6 to the outside.

一方、制御回路4は第1の受信機と無限移相器を通過し
た後の第2の受信波の位相差を検出し、例えばこの位相
差が0になる様に前記の無限移相器3の位相を調整する
On the other hand, the control circuit 4 detects the phase difference between the first receiver and the second received wave after passing through the infinite phase shifter, and controls the infinite phase shifter 3 so that this phase difference becomes 0, for example. Adjust the phase of

第2図は第1図の無限移相器3のより詳細なブロック接
続図を示す。
FIG. 2 shows a more detailed block diagram of the infinite phase shifter 3 of FIG.

同図に於て、入力端子7に加えられた前記第2の受信波
はハイブリッド回路8で分割され、更にハイブリッド回
路9及び1oでそれぞれが2分割され結局4分割され、
分割された第2の受信波はそれぞれ振幅変調器11〜1
4に加えられる。
In the figure, the second received wave applied to the input terminal 7 is divided by a hybrid circuit 8, further divided into two by hybrid circuits 9 and 1o, and finally divided into four,
The divided second received waves are sent to amplitude modulators 11 to 1, respectively.
Added to 4.

この振幅変調器11〜14はそれぞれ制御大刀端子16
〜19に加えられる制御信号に依って動作が制御され、
前記第2の受信波の位相を36Q度連続的に移相する事
が出来る様になっている。
The amplitude modulators 11 to 14 each have a control terminal 16.
The operation is controlled by a control signal applied to ~19,
The phase of the second received wave can be continuously shifted by 36Q degrees.

例えば、振幅変調器11と12で得られる互いに直交す
る振幅変調波分を合成する事により0〜90度の移相器
を、振幅変調器12と13で得られる互いに直交する振
幅変調波分を合成する事により90〜180度の移相器
を、以下振幅変調器13と14及び11と14を用いる
事により得られる180〜360胞移相器を組合わせる
と全体で0〜360度の移相器を構成する事が出来る。
For example, by combining mutually orthogonal amplitude modulated wave components obtained by amplitude modulators 11 and 12, a 0 to 90 degree phase shifter can be created, and by combining mutually orthogonal amplitude modulated wave components obtained by amplitude modulators 12 and 13. By combining a 90 to 180 degree phase shifter and a 180 to 360 cell phase shifter obtained by using amplitude modulators 13 and 14 and 11 and 14, a total shift of 0 to 360 degrees is obtained. It is possible to configure a phaser.

そこで、4つの振幅変調器から構成された移相器で所定
量だけ移相された第2の受信波は、増幅器15で必要な
レベル迄増幅された後端子2oから前記の合成回路5に
加えられる。
Therefore, the second received wave, which has been phase-shifted by a predetermined amount by a phase shifter composed of four amplitude modulators, is amplified to the required level by an amplifier 15, and is then sent from a terminal 2o to the above-mentioned combining circuit 5. It will be done.

第3図は第1図に示した制御回路4のより詳細なブロッ
ク接続図を示す。
FIG. 3 shows a more detailed block connection diagram of the control circuit 4 shown in FIG.

同図に於て、入力端子2工及び22に加えられた第1及
び第2の受信波は位相比較回路23で位相比較されて2
つの受信波の位相差に対応した出力電圧が取り出され、
この出力電圧は低域ろ波器24を通った後2つの可変周
波数発振器25及び26に加えられる。この可変周波数
発振器25及び26は前記の出力電圧が0の時は略同じ
周波数で発振する様に調整されているが、加えられた前
記の出力電圧の大きさに対応して互いに逆方向に周波数
偏移した出力を出す。
In the figure, the first and second received waves applied to input terminals 2 and 22 are phase-compared by a phase comparator circuit 23,
The output voltage corresponding to the phase difference between the two received waves is extracted,
This output voltage is applied to two variable frequency oscillators 25 and 26 after passing through a low pass filter 24. The variable frequency oscillators 25 and 26 are adjusted so that they oscillate at substantially the same frequency when the output voltage is 0, but the frequencies change in opposite directions depending on the magnitude of the applied output voltage. Outputs a deviated output.

そこで、これらの出力をそれぞれ2分割し、その内の1
つの出力だけを90度移相してから互いに別々の発振器
の出方をリング変調器28.29に加えてそのビート周
波数を取り出すと、常に相互に直交し合う4つの低周波
信号を得る事ができ、この信号を第2図の制御端子16
,17.18及び以上説明した様に従来のスペース・ダ
イノく−シ内と零う高性能を有しているために回路構成
が複雑で又装置の価格が高いと云う問題があった。
Therefore, each of these outputs is divided into two, and one of them is
By shifting the phase of the two outputs by 90 degrees and then adding the outputs of the separate oscillators to the ring modulator 28, 29 and extracting their beat frequencies, we can obtain four low-frequency signals that are always orthogonal to each other. This signal can be sent to the control terminal 16 in FIG.
, 17, 18, and as explained above, the high performance is comparable to that of conventional space dynamometers, so there are problems in that the circuit configuration is complex and the cost of the device is high.

(C) 発明の目的 本発明は上記従来技術の問題に鑑みなされたものであっ
て、回路構成が容易で価格の安いスペース・ダイパーシ
ティ方式を提供することを目的としている。
(C) Purpose of the Invention The present invention has been made in view of the above-mentioned problems of the prior art, and an object of the present invention is to provide a space-diaperity method that has an easy circuit configuration and is inexpensive.

(d) 発明の構成 上記発明の目的は第1の受信機で受信された第1の受信
機と第2受信機で受信された第2の受信波との位相差が
90度以上になった時のみ第2の受信波の位相を一定量
変化させて、常に該位相差が90度以内になるように制
御された2つの受信波を合成することを特徴とする簡易
型スペース・ダイパーシティ方式を提供する事により達
成される0 (e) 発明の実施例 第4図は本発明を実施する為のブロック接続図の一例を
示す。
(d) Structure of the Invention The object of the above invention is to achieve a phase difference of 90 degrees or more between the first received wave received by the first receiver and the second received wave received by the second receiver. A simple space diversity method characterized in that the phase of the second received wave is changed by a certain amount only when the two received waves are controlled so that the phase difference is always within 90 degrees, and the two received waves are combined. 0 (e) Embodiment of the Invention FIG. 4 shows an example of a block diagram for implementing the invention.

図中、1及び2は第1及び第2の受信機を、30は18
0度ハイブリッド回路を、31及び32はスイッチ回路
を、5は合成回路を、33は差動増幅器を、34は絶対
値回路を、35は可変利得増幅器を、36は加算増幅器
を、37はフリップ・フロップ回路を、38はレベル・
シフト回路ヲ、39は比較回路を、40は整流回路をn
1tvixi−i鑓f〆、6は出力端子をそれぞれ示す
In the figure, 1 and 2 indicate the first and second receivers, and 30 indicates 18
0 degree hybrid circuit, 31 and 32 are switch circuits, 5 is a combination circuit, 33 is a differential amplifier, 34 is an absolute value circuit, 35 is a variable gain amplifier, 36 is a summing amplifier, 37 is a flip・Flop circuit, 38 is level・
Shift circuit wo, 39 is a comparison circuit, 40 is a rectifier circuit.
1tvixi-i terminal f〆 and 6 indicate output terminals, respectively.

尚、第1図と同一の記号は同一の部分を示す。Note that the same symbols as in FIG. 1 indicate the same parts.

これら各ブロックは次の様に接続されている。These blocks are connected as follows.

合成回路5の端子(1)は第1の受信機1と、端子(2
)はスイッチ回路31及び32を介してハイブリッド回
路30を通り第2の受信機2と、端子(3)は出力端子
6とそれぞれ接続される。
The terminal (1) of the synthesis circuit 5 is connected to the first receiver 1 and the terminal (2
) is connected to the second receiver 2 through the hybrid circuit 30 via switch circuits 31 and 32, and the terminal (3) is connected to the output terminal 6, respectively.

又、制御回路39の端子(3)は可変利得増幅器35及
び整流回路40を介して出力端子6と、端子(2)は加
算増幅器36及び整流回路40を介して合成器5の端子
(1)及び(2)と、端子(1)はレベル・シフト回路
38.フリップ◆フロップ回路37を介してスイッチ回
路31及び32の別の端子にそれぞれ接続される。更に
、可変利得増幅器35の別の端子は絶対値回路34.差
動増幅器33を介して合成回路5の端子(1)及び(2
)にそれぞれ接続される。
Further, the terminal (3) of the control circuit 39 is connected to the output terminal 6 via the variable gain amplifier 35 and the rectifier circuit 40, and the terminal (2) is connected to the terminal (1) of the synthesizer 5 via the summing amplifier 36 and the rectifier circuit 40. and (2), and terminal (1) are connected to the level shift circuit 38. Flip◆Connected to other terminals of switch circuits 31 and 32 via a flop circuit 37, respectively. Furthermore, another terminal of the variable gain amplifier 35 is connected to the absolute value circuit 34 . The terminals (1) and (2) of the combining circuit 5 are connected via the differential amplifier 33.
) are connected to each other.

この様に接続された各ブロックの動作は次の様である。The operation of each block connected in this way is as follows.

第1の受信機1で受信された振lll1iAの受信波は
直接に、第2の受信機で受信され180度ノ\イブリッ
ド回路30及びスイッチ回路31又は32を通った振幅
Bの受信波はそれぞれ合成回路5に加えられ、ここで2
つの受信波が合成され振幅Cの合成波が出力端子6に取
り出される。
The received wave of amplitude lll1iA received by the first receiver 1 is directly received, and the received wave of amplitude B received by the second receiver and passed through the 180 degree hybrid circuit 30 and the switch circuit 31 or 32 is is added to the synthesis circuit 5, where 2
The two received waves are combined and a combined wave with an amplitude C is outputted to the output terminal 6.

ここで、第1及び第2の受信波の位相差が90度の時の
合成波の振幅は次の様になる。
Here, when the phase difference between the first and second received waves is 90 degrees, the amplitude of the composite wave is as follows.

C,=(A+B)XD 但し、A=0でB=1又はB二〇でA=1の時はD−1
0、A=B=1の時はD二1641、A〆B。
C,=(A+B)XD However, when A=0 and B=1 or B20 and A=1, D-1
0, when A=B=1, D21641, A〆B.

A〉0.B〉oの時はDは1.0と1.41の間の値を
取るので、10≦D≦141となる。
A>0. When B>o, D takes a value between 1.0 and 1.41, so 10≦D≦141.

前記、出力端子6に取り出された合成波の一部は整流回
路40で整流され、得られた直流電圧は可変利得増幅器
35で増幅された後比較回路39に基準電圧として加え
られる。
A part of the composite wave taken out to the output terminal 6 is rectified by a rectifier circuit 40, and the obtained DC voltage is amplified by a variable gain amplifier 35 and then applied to a comparison circuit 39 as a reference voltage.

一方、第1及び第2の受信波はそれぞれ整流回路40で
整流された後差動増幅器33に加えられ、ここで振幅A
とBに対応する直流分の差電圧を絶対値回路34でその
差電圧の絶対値を取り出す。
On the other hand, the first and second received waves are each rectified by a rectifier circuit 40 and then applied to a differential amplifier 33, where the amplitude A
The absolute value circuit 34 extracts the absolute value of the DC difference voltage corresponding to and B.

そして、この絶対値電圧を用いて前記の可変利得増幅器
35の利得を(10〜1.41)Xn0間変化させるの
で、前記の基準電圧はA及びBの振幅を持つ2つの受信
波の位相差が90度であったら得られるであろう合成波
の振幅に対応する電圧である。尚、nは可変利得増幅器
350基本利得である。次に、合成前の振幅A及びBを
持つ2つの受信波から得られた直流分は加算増幅器36
で加算増幅され(A+B)xmとなり、比較回路39に
加えられる。ここで、mは加算増幅器36の利得を示す
。比較回路39では前記2つの入力電圧を比較して、加
算増幅器36からの入力電圧V ad d二(A+B 
)xmの方が可変利得増幅器350入力電圧Vag =
=(C/D ) xnよりも大きい時は、前記2つの受
信波の位相差が90度以上あると判断して11″のレベ
ルを、逆の場合には頴”のレベル・シフト回路38を介
してフリップ・フロップ回路37に加える。
This absolute value voltage is used to change the gain of the variable gain amplifier 35 between (10 to 1.41) This voltage corresponds to the amplitude of the composite wave that would be obtained if the angle was 90 degrees. Note that n is the basic gain of the variable gain amplifier 350. Next, the DC component obtained from the two received waves with amplitudes A and B before being combined is sent to the summing amplifier 36.
The signals are summed and amplified to become (A+B)xm, which is added to the comparator circuit 39. Here, m indicates the gain of the summing amplifier 36. The comparison circuit 39 compares the two input voltages and calculates the input voltage V ad d2 (A+B
) xm is the variable gain amplifier 350 input voltage Vag =
= (C/D) When it is larger than xn, it is determined that the phase difference between the two received waves is 90 degrees or more, and the level of 11'' is set. The input signal is applied to the flip-flop circuit 37 via the input signal.

そこで、フリップ・フロップ回路3702つの出力でス
イッチ回路31と32が駆動されるので、例えばスイッ
チ回路31がONに別の回路32がOFFになり180
度移相された第2の受信波が取り出される。そこで、最
初90度以上あった第1及び第2の受信波の位相差は9
0度以内になる。
Therefore, the switch circuits 31 and 32 are driven by the two outputs of the flip-flop circuit 370, so for example, the switch circuit 31 is turned on and the other circuit 32 is turned off.
A second received wave phase-shifted is extracted. Therefore, the phase difference between the first and second received waves, which was initially more than 90 degrees, is 9
It will be within 0 degrees.

第5図は180度ハイブリッド回路30及びスイッチ回
路31.32のより詳細な回路例である。
FIG. 5 is a more detailed circuit example of the 180 degree hybrid circuit 30 and the switch circuits 31 and 32.

同図に於て、180度ハイブリッド回路30はトランジ
スタ45のコレクタ・エミッタ間で位相が180度異な
るのを利用したもので、ビン・ダイオード41と42を
用いたスイッチ回路により、入力端子43に加えられた
受信涙金前記のコレクタ又はエミッタから取り出して、
180度位相の異なる受Il@波を得ている。
In the figure, the 180 degree hybrid circuit 30 utilizes the fact that the phase differs by 180 degrees between the collector and emitter of the transistor 45. The received tear gold is taken out from the collector or emitter,
The received Il@ waves with a phase difference of 180 degrees are obtained.

第6図は第4図の一点鎖線で囲った部分のより詳細な回
路例で、第4図と同一の記号は同一の部分を示している
FIG. 6 is a more detailed circuit example of the portion surrounded by the dashed line in FIG. 4, and the same symbols as in FIG. 4 indicate the same parts.

同図に於て、整流回路40でここに入力される中間周波
信号を整流してそれぞれの振幅に対応した直流分を取り
出している。
In the figure, a rectifier circuit 40 rectifies the intermediate frequency signals input thereto to extract DC components corresponding to the respective amplitudes.

可変利得増幅器35は、ここに使用されている演算増幅
i:i+51の15帰還回路のバイアスを可変にして利
得を制御している。
The variable gain amplifier 35 controls the gain by varying the bias of the 15 feedback circuit of the operational amplifier i:i+51 used here.

ff) 発明の詳細 な説明した様に、本発明に依れば2つの受信波の位相差
が90度v上になった時のみ1つの受信波の位相’t−
180移相させて、前記の位相差を90度以内にする為
に180度ハイブリッド回路に接続された2つのスイッ
チ回路を制御す/)。
ff) As described in detail, according to the present invention, only when the phase difference between two received waves is 90 degrees v above, the phase 't- of one received wave is
Two switch circuits connected to the 180 degree hybrid circuit are controlled in order to shift the phase by 180 degrees and bring the phase difference within 90 degrees.

これにより、制御回路と位相器の構成が従来に比して非
常に簡単な構成になり、特に移相器は集積回路化が可能
となる。そこで装置の価格も低減する。
As a result, the configuration of the control circuit and phase shifter becomes much simpler than the conventional configuration, and in particular, the phase shifter can be integrated into an integrated circuit. Therefore, the cost of the device is also reduced.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のスペースΦダイパーシティ方式を実施す
る為のブロック接続図の一例を、第2図及び第3図は第
1図のより詳細な回路図例を、第4図は本発明のスペー
ス・ダイパーシティ方式を実施する為のブロック接続図
の一例を、第5図及び第6図は第4図のより詳細な回路
図例をそれぞれ示す。 図中、1及び2はそれぞれ受信機を、30は180度ハ
イブリッド回路を、31及び32はそれぞれスイッチ回
路を、5は合成回路を、33は差増幅器を、34は絶対
値回路を、35は可変利得増幅器を、36は加算増幅器
を、39は比較回路を、37はフリップ・フロップ回路
をそれぞれ示す。 代理人 弁理士 松 岡 宏四部 ″f 1 因 峯 2 図 ¥−3区 早 4 圀 箒 5目 づα 手合 目
Fig. 1 shows an example of a block connection diagram for implementing the conventional space Φ diversity method, Figs. 2 and 3 show more detailed circuit diagrams of Fig. 1, and Fig. 4 shows an example of the circuit diagram of the present invention. An example of a block connection diagram for implementing the space diversity method is shown in FIGS. 5 and 6, and FIGS. 5 and 6 show examples of more detailed circuit diagrams in FIG. 4, respectively. In the figure, 1 and 2 are receivers, 30 is a 180 degree hybrid circuit, 31 and 32 are switch circuits, 5 is a synthesis circuit, 33 is a difference amplifier, 34 is an absolute value circuit, and 35 is a switch circuit. A variable gain amplifier is shown, 36 is a summing amplifier, 39 is a comparison circuit, and 37 is a flip-flop circuit. Agent Patent Attorney Hiroshi Matsuoka 4th Department 1 Inmine 2 Figure ¥ - 3 Ku Haya 4 Kunihoki 5 Eyes α Hand Aim

Claims (1)

【特許請求の範囲】[Claims] 第1の受信機で受信された第1の受信波と第2の受信機
で受信された第2の受信波との位相差が90度以上にな
った時のみ第2の受信波の位相を一定量変化させて、常
に該位相差が90度以内になるように制御された2つの
受信波を合成することを特徴とする簡易型スペース・ダ
イパーシティ方式。
The phase of the second received wave is changed only when the phase difference between the first received wave received by the first receiver and the second received wave received by the second receiver becomes 90 degrees or more. A simple space diversity method characterized by combining two received waves controlled so that the phase difference is always within 90 degrees by changing a certain amount.
JP19479183A 1983-10-18 1983-10-18 Simple space diversity system Pending JPS6086936A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19479183A JPS6086936A (en) 1983-10-18 1983-10-18 Simple space diversity system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19479183A JPS6086936A (en) 1983-10-18 1983-10-18 Simple space diversity system

Publications (1)

Publication Number Publication Date
JPS6086936A true JPS6086936A (en) 1985-05-16

Family

ID=16330315

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19479183A Pending JPS6086936A (en) 1983-10-18 1983-10-18 Simple space diversity system

Country Status (1)

Country Link
JP (1) JPS6086936A (en)

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