JPS6084651A - Control system of input and output device - Google Patents

Control system of input and output device

Info

Publication number
JPS6084651A
JPS6084651A JP58193880A JP19388083A JPS6084651A JP S6084651 A JPS6084651 A JP S6084651A JP 58193880 A JP58193880 A JP 58193880A JP 19388083 A JP19388083 A JP 19388083A JP S6084651 A JPS6084651 A JP S6084651A
Authority
JP
Japan
Prior art keywords
input
fault
output
output device
failure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58193880A
Other languages
Japanese (ja)
Inventor
Koichi Kondo
弘一 近藤
Kiyoshi Takahashi
清 高橋
Hideyuki Saso
秀幸 佐相
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58193880A priority Critical patent/JPS6084651A/en
Publication of JPS6084651A publication Critical patent/JPS6084651A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/2221Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test input/output devices or peripheral units

Abstract

PURPOSE:To cope with the fault occurrence of an input/output device effectively by providing an input/output controller and a fault counting part between a host device and the input/output device. CONSTITUTION:A central processing unit CPU is connected to plural input/output devices I/O through the input/output controller IOC. The input/output controller IOC has a polling device PL and a control processor muP. The fault monitoring device EDT in the input/output controller IOC generates an error state when informed of fault occurrence and sends it to a fault value counting part ECN. The fault value counting part ECN consists of memories MM-A- MM-C, a large/small judging circuit CP, and a +1 adding circuit AD. The fault occurrence information from the fault monitoring device EDT is summed up in the memory MM-A successively and when the cumulated value attains to a specific value, a fault information signal is sent out to the central processing unit CPU to send out a control stop signal to the input/output controller IOC.

Description

【発明の詳細な説明】 (1)発明の技術分野 本発明は入出力装置の障害発生に対し、有効に対処でき
るようにした情報処理システムにおける入出力装置の制
御方式に関する。
DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a method for controlling an input/output device in an information processing system that can effectively deal with the occurrence of a failure in the input/output device.

2)従来技術と問題点 従来複数の入出力装置が上位装置例えば中央処理装置か
ら制御されるとき、入出力装置に発生した障害は直ちに
中央処理装置に報告され、中央処理装置は状況の収集を
行う。中央処理装置に対し割り込みがかかりエラーステ
ータスによるロギングと言われる動作が始まる。このや
り方は単純であるが、成る入出力装置の障害が持続した
とき例えば1秒間に5〜6回も割り込みを上げるから中
央処理装置はロギング処理を行うのみで、本来の情報処
理ができないことになる。
2) Prior art and problems Conventionally, when multiple input/output devices are controlled by a host device such as a central processing unit, a failure occurring in an input/output device is immediately reported to the central processing unit, and the central processing unit collects the status. conduct. An interrupt is generated to the central processing unit, and an operation called logging based on the error status begins. This method is simple, but if a failure persists in the input/output device, the central processing unit will only perform logging processing and will not be able to process information because it will generate interrupts, for example, 5 to 6 times per second. Become.

(3)発明の目的 本発明の目的は前述の欠点を改善し、入出力装置の障害
発生に対して有効に対処できるようにした情報処理シス
テムにおいて入出力装置の制御方式を提供することにあ
る。
(3) Purpose of the Invention The purpose of the present invention is to provide a control method for input/output devices in an information processing system that improves the above-mentioned drawbacks and makes it possible to effectively deal with failures in the input/output devices. .

(4)発明の構成 前述の目的を達成するための本発明の構成は、上位装置
に対し複数の入出力装置が接続され、入出力装置に発生
した障害を上位に通知し論理的に切離す入出力装置の制
御方式において、上位装置と入出力装置間に入出力制御
装置と障害計数部とを具備し、 入出力制御装置には入出力装置に対しポーリングにより
状態を監視し障害発生のときその通知を障害値計数部に
送出する障害監視装置と、障害値計数部からの通知によ
り障害入出力装置を論理的に切離し障害原因の除去され
たとき自動的に再接続する手段とを具備し、 障害値計数部には各入出力装置からの障害通知を引数す
る手段と、同一人出力装置に発生した障害が所定回数以
上となったとき前記障害監視装置へ通知する手段とを具
備する、 ことである。
(4) Structure of the Invention The structure of the present invention to achieve the above-mentioned object is that a plurality of input/output devices are connected to a higher-level device, and a failure occurring in an input/output device is notified to the higher-level device and logically disconnected. In an input/output device control method, an input/output control device and a fault counting unit are provided between the host device and the input/output device, and the input/output control device monitors the status of the input/output device by polling and detects a fault when a fault occurs. It is equipped with a fault monitoring device that sends the notification to the fault value counting unit, and a means for logically disconnecting the faulty input/output device based on the notification from the fault value counting unit and automatically reconnecting it when the cause of the fault is removed. , the fault value counting unit is equipped with means for receiving fault notifications from each input/output device, and means for notifying the fault monitoring device when a fault has occurred in the same person's output device a predetermined number of times or more; That's true.

(5)発明の実施例 第1図は本発明の一実施例の構成を示す図で、中央処理
装置CPUは入出力制御装置■OCを介して、複数の入
出力装置I/Oと接続されている。
(5) Embodiment of the invention FIG. 1 is a diagram showing the configuration of an embodiment of the invention, in which a central processing unit CPU is connected to a plurality of input/output devices I/O via an input/output control device OC. ing.

入出力制御装置IOCはポーリング装置PLと制御プロ
セッサμPとを具備し、入出力装置I/Oに対し公知の
ようにI/O番号を指定して送受信データの有無の問い
合わせを行う。或るI/O内で障害が発生すると、その
I/Oはポーリングされたときにその旨をIOCに通知
する。IOC内には障害監視装置ECNを具備し、前述
の障害発生の返信かあったとき、「エラーステータス」
を作成し、障害値計数部ECNへ通知する。短時間で自
動的に復旧する障害もあるからμPは前記I/Oに対し
ポーリング装置PLから繰り返しポーリングをかける。
The input/output control device IOC includes a polling device PL and a control processor μP, and inquires of the input/output device I/O as to the presence or absence of transmitted/received data by specifying an I/O number in a well-known manner. If a failure occurs within an I/O, that I/O will notify the IOC when polled. The IOC is equipped with a fault monitoring device ECN, and when the above-mentioned fault occurrence response is received, the "error status" is displayed.
is created and notified to the fault value counting unit ECN. Since there are some failures that can be automatically recovered in a short time, the μP repeatedly polls the I/O from the polling device PL.

障害が続くとき障害値計数部ECNへの通知が続く。障
害値計数部ECNはメモリMM−A、MM−B、MM−
Cと大小判別回路CPと+1加算回路ADとで構成され
る。障害監視装置EDTからの信号a1は障害発生通知
であってメモリMM−Aの入出カ装置対応の所定領域に
格納される。メモリMM−CはメモリMM−Aに当初値
零を格納するため使用する。メモリMM−Bに所定値を
予めセットしておき、メモリMM−A内の格納値がプリ
セット値を超えたがどうか大小判定回路CPにより判定
する。超えてなくて且つ障害監視装置EDTがらの信号
a1が繰り返されると、メモリMM−Aの当該領域の格
納値を+1加算回路ADで更新して行く。若し大小判定
回路CPの判定が超えたとき異常障害通知信号a2とし
て中央処理装置CPUへ、また入出カ装置の制御停止信
号bとして入出力制御装置IOCへ通知する。IOC内
ではI/Oに対し論理的接続・遮断を行うゲートGTの
ような素子が設けられているから、信号bを通知された
ときGTを閉じ、障害通知のされたI/Oを論理的に切
離す。CPUはI/O障害発生が通知されて唯1回のみ
ロギングする。IOCのμPは次に当該I/Oに対しポ
ーリング装置PLからポーリングを繰り返し、応答を監
視する。即らそのI/Oから正常のデータ等の送信があ
ったとしてもそれを受付けることなく、専ら障害に関す
る情報の送受信を行う。そして人為的に或いは自動的に
障害原因が除去されると、I/Oはポーリングに対する
応答で正常値旧を通知して来る。IOCは障害解除信号
clを障害値計数部ECNへ通知し、メモリMM−Aを
リセットし、同時に中央処理装置CPUに対しI/O復
旧を信号c2により通知し、コマンドによるI/Oの起
動を依頼する。中央処理装置は所定のコマンドでI/O
を起動させ、当初の状態に戻る。
When the failure continues, notification to the failure value counter ECN continues. The failure value counting unit ECN includes memories MM-A, MM-B, and MM-.
C, a size discrimination circuit CP, and a +1 addition circuit AD. The signal a1 from the fault monitoring device EDT is a fault occurrence notification and is stored in a predetermined area of the memory MM-A corresponding to the input/output device. Memory MM-C is used to store an initial value of zero in memory MM-A. A predetermined value is set in advance in the memory MM-B, and a magnitude determination circuit CP determines whether the stored value in the memory MM-A exceeds the preset value. If the value is not exceeded and the signal a1 from the fault monitoring device EDT is repeated, the value stored in the corresponding area of the memory MM-A is updated by the +1 addition circuit AD. If the judgment of the magnitude judgment circuit CP exceeds the limit, it is notified to the central processing unit CPU as an abnormal failure notification signal a2, and to the input/output control device IOC as a control stop signal b of the input/output device. Inside the IOC, there is an element such as a gate GT that logically connects and disconnects the I/O, so when signal b is notified, the GT is closed and the I/O that has been notified of the failure is logically disconnected. Separate to. The CPU performs logging only once after being notified of the occurrence of an I/O failure. Next, the IOC μP repeatedly polls the I/O from the polling device PL and monitors the response. That is, even if normal data is transmitted from the I/O, it is not accepted and only information regarding the failure is transmitted and received. When the cause of the failure is removed manually or automatically, the I/O notifies the old normal value in response to polling. The IOC notifies the failure value counter ECN of the failure release signal cl, resets the memory MM-A, and at the same time notifies the central processing unit CPU of I/O recovery with the signal c2, and starts the I/O by command. Make a request. The central processing unit performs I/O with a predetermined command.
Start up and return to the original state.

第2図は以上の動作を実行するIOCの情報処理装置の
動作フローチャートを示す。
FIG. 2 shows an operation flowchart of the IOC information processing device that executes the above operations.

(6)発明の効果 このようにして本発明によると、多数のI/Oを接続し
ている中央処理装置であっても、I/O障害の発生時に
障害状況のロギングのみに動作することがなく、中央処
理装置本来の動作を続行することができる。障害に関す
る情報を殆どIOCで処理するからシステムとしての動
作効率が高い。
(6) Effects of the Invention In this way, according to the present invention, even if a central processing unit is connected to a large number of I/Os, it can operate only to log the failure status when an I/O failure occurs. The original operation of the central processing unit can be continued. Since most of the information regarding failures is processed by the IOC, the operating efficiency of the system is high.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の構成を示す図、第2図は第
1図の動作を実行する入出力制御装置が内蔵する情報処
理装置の動作フローチャートを示す。 CPU・・・中央処理装置 IOC・・・入出力制御装置 I/O・・・入出力装置 PL・・・ポーリング装置 EDT・・・障害監視装置 ECN・・・障害値計数部 GT・・・ゲート μP・・・情報プロセッサ 特許用191人 富士通株式会社 代理人 弁理士 鈴木栄柘
FIG. 1 is a diagram showing the configuration of an embodiment of the present invention, and FIG. 2 is a flowchart showing the operation of an information processing device included in an input/output control device that executes the operations shown in FIG. CPU...Central processing unit IOC...Input/output control device I/O...Input/output device PL...Polling device EDT...Fault monitoring device ECN...Fault value counting unit GT...Gate μP...191 people for information processor patents Fujitsu Limited agent Patent attorney Eitsugu Suzuki

Claims (1)

【特許請求の範囲】 上位装置に対し複数の入出力装置が接続され、入出力装
置に発生した障害を上位に通知し論理的に切離す入出力
装置の制御方式において、上位装置と入出力装置間に入
出力制御装置と障害計数部とを具備し、 入出力制御装置には入出力装置に対しポーリングにより
状態を監視し障害発生のときその通知を障害値計数部に
送出する障害監視装置と、障害値副数部からの通知によ
り障害入出力装置を論理的に切離し障害原因の除去され
たとき自動的に再接続する手段とを具備し、 障害値計数部には各入出力装置からの障害通知を計数す
る手段と、同一入出力装置に発生した障害が所定回数以
上となったとき前記障害監視装置へ通知する手段とを具
備する、 ことを特徴とする入出力装置の制御方式。
[Scope of Claim] In an input/output device control method in which a plurality of input/output devices are connected to a host device and a failure occurring in the input/output device is notified to the host and logically disconnected, the host device and the input/output device The input/output control device includes an input/output control device and a fault counting section, and the input/output control device includes a fault monitoring device that monitors the status of the input/output device by polling and sends a notification to the fault value counting section when a fault occurs. , means for logically disconnecting a faulty input/output device based on a notification from the fault value subunit and automatically reconnecting it when the cause of the fault has been removed; A control method for an input/output device, comprising: means for counting failure notifications; and means for notifying the failure monitoring device when a failure has occurred in the same input/output device a predetermined number of times or more.
JP58193880A 1983-10-17 1983-10-17 Control system of input and output device Pending JPS6084651A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58193880A JPS6084651A (en) 1983-10-17 1983-10-17 Control system of input and output device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58193880A JPS6084651A (en) 1983-10-17 1983-10-17 Control system of input and output device

Publications (1)

Publication Number Publication Date
JPS6084651A true JPS6084651A (en) 1985-05-14

Family

ID=16315273

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58193880A Pending JPS6084651A (en) 1983-10-17 1983-10-17 Control system of input and output device

Country Status (1)

Country Link
JP (1) JPS6084651A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6325738A (en) * 1986-07-18 1988-02-03 Fujitsu Ltd Control system for constitution of information processing system

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5346657A (en) * 1976-10-05 1978-04-26 Bosch Gmbh Robert Electric capacitor with vaseelike metallic casing
JPS5469340A (en) * 1977-11-14 1979-06-04 Nec Corp Input-output control unit
JPS54148344A (en) * 1978-05-12 1979-11-20 Hitachi Ltd Fault interrupton system for information processor

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5346657A (en) * 1976-10-05 1978-04-26 Bosch Gmbh Robert Electric capacitor with vaseelike metallic casing
JPS5469340A (en) * 1977-11-14 1979-06-04 Nec Corp Input-output control unit
JPS54148344A (en) * 1978-05-12 1979-11-20 Hitachi Ltd Fault interrupton system for information processor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6325738A (en) * 1986-07-18 1988-02-03 Fujitsu Ltd Control system for constitution of information processing system

Similar Documents

Publication Publication Date Title
JPS6084651A (en) Control system of input and output device
JPS58111544A (en) Monitoring and controlling system for line noncommunication time
JPH0792763B2 (en) Fault handling method
JP3313667B2 (en) Failure detection method and method for redundant system
JPH06175887A (en) Fault monitoring/reporting system
JP3266841B2 (en) Communication control device
JPH08329023A (en) Parallel electronic computer system
JP2000148525A (en) Method for reducing load of active system in service processor duplex system
JPS592152A (en) Resetting system in case of fault
JPS6260019A (en) Information processor
JPH113293A (en) Computer system
JP2746184B2 (en) Fault logging system
JP2712389B2 (en) Communication control processor
JPH06318159A (en) Device abnormality detecting system
JPS58225738A (en) Dispersion type transmission system
JPH08194628A (en) Bus fault processing system
JP3647700B2 (en) Notification device and method for notifying device disconnection
JPS6375843A (en) Abnormality monitor system
JP2618126B2 (en) System audit monitoring method and apparatus
JPH0245834A (en) Information processor exchanging system
JPH02216931A (en) Fault information reporting system
JPH02310755A (en) Health check system
JPH1049450A (en) Recovery system for abnormal time of remote monitor system
JPH07107678A (en) Control system of uninterruptive power device
JPS59100997A (en) Abnormality alarm system