JPS6081696A - Infrared alerting apparatus - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an infrared warning device that monitors a plurality of guard areas connected in tandem using a plurality of infrared rays.

This type of device includes a light transmitting section having a plurality of transmitters that emit pulsed infrared rays, a light transmitting and receiving section having a plurality of transmitters and receivers that receive and amplify the infrared rays, and further transmit the light; A light receiving section having a plurality of vessels is installed so that they are connected in tandem across a guarded area. In this device, if two infrared rays in a certain warning area are blocked (hereinafter referred to as one alarm), the two transmitters and receivers that were receiving these lights will each shift to alarm detection operation and issue an alarm. Generates infrared rays for alarm display including information indicating the area.

It is designed to irradiate the next transmitter/receiver or receiver. That is, the infrared path for monitoring is used as the infrared path for alarm display. here.

If a warning continues for a certain period of time in a Chiru warning area, infrared rays will be blocked for a certain period of time from subsequent transmitters and receivers as well.

Therefore, in this device, when a warning is issued in a certain warning area, it is necessary to prevent the light transmitting/receiving section and the light receiving section from proceeding to the warning detection operation, which makes the configuration very complicated.

Furthermore, if alarms are issued almost simultaneously for infrared rays on the same route in different warning areas, there is a drawback that the earlier alarm is not displayed.

Furthermore, it is necessary to connect means for identifying the alarm area from infrared rays for one alarm display to all the light receivers at the last stage.

In view of the above-mentioned drawbacks, a first object of the present invention is to provide an infrared warning device that can reliably detect and display warnings even if warnings are issued in a plurality of warning areas almost simultaneously.

A second object of the present invention is that only one identification signal generation means for alarm display is required for one warning area, and furthermore, the identification signal identification means for alarm display connected to the display device is also required. 1
The purpose of the present invention is to provide an infrared warning device that requires only one piece.

A third object of the present invention is to provide an infrared warning device that is capable of displaying not only two alarm areas but also various displays such as the number of infrared rays blocked and which infrared rays are blocked.

In the present invention, a light transmitting section having a plurality of light transmitters for emitting infrared rays and a light receiving section having a plurality of light receivers for receiving the infrared rays are arranged facing each other across a guarded area so as to be coupled by a plurality of infrared rays. The device is a device in which a combination of such a light transmitting part and a light receiving part is installed in tandem, and each of the light receiving parts has an identification indicating the warning area and the warning state when two alarms are issued. A means for generating a signal is provided, and the light transmitting section or the light receiving section is further provided with a light transmitter and a light receiver for transmitting the identification signal by infrared rays, so that the identification signal from each light receiving section is transmitted into one line. It is characterized by transmission using infrared rays. Needless to say, in this case, only one signal identification means is required to be connected to the identification signal generating means and the identification signal infrared receiver at the last stage.

Two aspects of the present invention will be described in detail below.

FIG. 1 is a diagram illustrating a warning system according to the present invention.

A light transmitting unit IP having a plurality of (here, three) light transmitters that emit infrared rays, and each of the light transmitters 11 P and 12P.

A light receiving section 2R having light receivers 21R, 22R, and 23R corresponding to 13P is placed opposite to each other across the caution area WA1. Similarly, caution area WA2.

(WA3) and the light transmitting part 2)P (3P) and the light receiving part 3R
(4R) are installed facing each other. In this way, the light transmitting part and the light receiving part facing each other are coupled by three infrared rays at different heights, for example, upper, middle, and lower, and are configured independently for each warning map area. In this case, except for the light transmitting section IP and the light receiving section 4R, adjacent light receiving sections and the light transmitting section 1, such as the light receiving section 2R and the light transmitting section 2P, are installed integrally as the light transmitting and receiving section 2.

for the light transmitting/receiving sections 2 and 3 and the light receiving section 4R, respectively.

If at least one of the three infrared rays is activated, 2
A circuit 24.34 that generates an alarm status display signal indicating the number of infrared rays that have been emitted or which infrared rays have been emitted, etc.
and 44, and a circuit 25, 35, 45 which, in combination with this signal, generates an identification signal also representing the alarm area pot. Furthermore, the light transmitter/receiver 2 is provided with a light transmitter 26 that emits infrared light modulated by the signal from the two circuits 25, and the light transmitter/receiver 3 receives the infrared light from the light transmitter 26 and converts it into an electrical signal. A light receiver 36 that amplifies this electrical signal, converts it into infrared light, and transmits the light is provided.

Of course, when there is a signal output from the identification signal generation circuit 35,
Infrared rays containing this signal are emitted from the light transmitter 37.

A light receiver 46 is installed in the light receiving section 4R.

5 is a signal identification circuit, and an identification signal generation circuit 45. Light receiver 46
The electrical signal from the terminal is identified and displayed on the display device 6. The signal identification circuit 5 is usually built into a display device 6 .

For example, regarding the circuit 24, the alarm status display signal generation circuit 2 represents, for example, the number of emitted infrared rays with a 4- to 8-bit digital signal depending on the presence or absence of electrical signals from the light receivers 21R, 22R, and 23R. Since such a circuit can be easily realized using a logic circuit, a detailed explanation will be omitted.

The identification signal generation circuit sets a plurality of fixed time T4 (T2 > T4) regions, so to speak, apparent time slots, corresponding to a plurality of caution areas in the fixed time T2 region.

Depending on which time slot the digital signal from the alarm status display signal generation circuit is input to when an alarm is issued, an identification signal indicating not only the alarm area but also the alarm status is generated.

An example of this circuit is shown in FIG.

FIG. 3 is a time chart of input/output signals of each part in FIG. 2.

In Fig. 2, the input terminal IP receives two pulse signals Pa and P with an interval of Tl as shown in Fig. 3 (,).
b is input with a period T1. Needless to say, in the identification signal generating circuit 25 of the light transmitting/receiving section 2, a circuit for generating the aR pulse signals Pa and Pb as described above is connected to the input terminal IP.

Timer TMl is an on-delay timer and always outputs a high level signal. Therefore, when the signal Pa arrives at the input terminal IP, the high level output of the AND circuit A1 (C in FIG. 3) causes the output of the timer TM1 to rise for a certain period of time T.
3 becomes low level (Fig. 3b). This time T3 is set so that 2 T2 < T3 < (TI Tl ). This is effective when the identification signal generation circuit, which should be activated by the pulse signal Pa, is activated by the pulse signal pb due to other noises such as when the power is turned on.

That is, even if it is activated by the pulse signal pb.

If the relationship Tl + 72 + T3 satisfies the above equation, restart will occur when the pulse signal Pa' arrives.

C, , C2 are N-ary counters that count clocks from the oscillation circuit oSC1, and will be explained here as decimal counters. The counter CI+C2 is reset by AND circuit A's... level output.

Counting of the .gluces (Fig. 3 d) from the oscillation circuit 0801 is started. Note that the counter C1 repeatedly performs a count of 1, and the counter C2 performs a 10 count output of the counter C1, that is, a medium count.

CMP is a dinotal controller or controller that compares the digital output of the counter C1 in binary code with the digital output in binary code from the above-mentioned alarm status display signal generation circuit. The four forces (
Figure 3 f).

SW is a digital switch that outputs an irregularity signal (FIG. 3g) only while the output of the counter C2 (FIG. 3e) is at the set value m2.

FF1 is a frino flop, which is reset by the output of the AND circuit A1 and outputs an output signal (
(j) in FIG. 3, and the output of the AND circuit A3 is set to a low level.

Note that the 1 oscillation circuit osc i outputs a clock pulse from the time when the counter C2 is reset, and stops when the count output of the counter C2 reaches a set value m3 (ms > rr+z). Here, it is necessary that the set value m2 can be set as many times as the number of guarded areas, and therefore m2 may be set to 3, so the set value m3 is set to 4. If a decimal counter is used as the counters C1r and C2 and the maximum eight V-prevention areas are set, the set value m3 will be '9. and.

Needless to say, the pulse signal pb is set so as to arrive after the oscillation circuit osc1 stops after the count output 9 is output.

In the following, a case will be described in which two infrared rays are emitted, for example, in the warning area WA2. At this time, the alarm status display signal is the digital output m1 (in the case of 4 bits, it is "0010") indicating that the two infrared rays are disconnected.
The set value m2 of W is set to 1.

When the first pulse Pa is input to the input terminal IP after warning of the warning area WA2, the counter C1 starts counting the pulses of the oscillation circuit OSC. Then, when the count output becomes equal to the digital output of the alarm status display signal, that is, at the time of the second count.

The comparator CMP outputs a 2 and EL signal. On the other hand, switch SW indicates that the counting output of counter C2 is 1.
．． That is, when the counter C1 counts the 10th time after starting counting, it becomes conductive and outputs an irregular signal. This conductive state is maintained until the count output of the counter C2 reaches two.

The Frino flop FF outputs a high level signal at the time of arrival of the pulse Pa, and then changes to a low level by the output of the AND circuit A3 at the time of counting the 12th pulse. On the other hand, AND circuit A 2 + A 4 generates 2 oscillation circuit OS
The output of C is output only during the period from the time when the 10th pulse is counted until the 12th pulse is counted from the time when the cissis Pa arrives. That is, only two pulses of one oscillation circuit OSC are outputted to the OR circuit OR (FIG. 3k).

Of course, this number of pulses is the same as the number of infrared rays cut off.

As is clear from the above explanation, an apparent time slot of time T4 in which the counter C1 counts 10 pulses within the time T2 from the arrival time of the pulse Pa to the arrival time of the pulse pb. TS1 to TS3 will be set. The digital output from the alarm status display signal generation circuit is converted into alarm status display information based on the number of pulses, and here, the alarm status display information indicating two infrared rays is input to time slot TS2 and output. . In other words, by associating the roofing area with the time slot in which the alarm status display information is placed, the time slot represents the alarm area, and the information in the time slot indicates the number of infrared rays blocked or which infrared rays were blocked. etc. will be set to represent the following. For example, when a warning is issued in the warning area WA3, the identification signal generation circuit 45 outputs warning status display information in the time slot TS3. Note that even when there is no 1 alarm, some elements operate according to the pulse signal Pa (Pa'...), but there is no problem because the 1 alarm status display signal is not input.

FIG. 4 shows an example of the signal identification circuit 5 in a block diagram. FIG. 5 is a time chart of input/output signals of each part. As in the above example, the following description assumes that a signal containing information indicating two infrared rays arrives at time slot TS2.

FF2 is a flip-flop, and the first arriving pulse P
At a, an irregular signal is output (Fig. 5b).

The oscillation circuit 0802 is activated. This flip-flop FF2 is reset by the output t of a predetermined count value of a counter C3 that counts pulses from the two-oscillation circuit 0802. This count value is calculated from pulse Pa to pulse pb.
It is determined by the time T2 at t.

Here, the oscillation period of the oscillation circuit 0802 is made to match the time T4 of the time slot of the input signal (FIG. 5g).

One input terminal of each of the circuits A5, 1A6, and 1A7 is the count output terminal C3-1 of the counter C3.
+C3-2+C3-3. As a result, the AND circuit A5 outputs only the information included in the time slot TS among the alarm status display information based on pulses included in the input signal, and similarly, the AND circuit A6 outputs the information included in the time slot TS2.

The AND circuit A7 outputs only the information included in the time slot l-TS3. Therefore, the number of AND circuits and counters is 8, which is the same as the number of time slots, or in other words, the number of precept areas.

The counters c5, c6, and c7 are each combined with an AND circuit A81A9+A10, so that
The number of pulses from the AND circuit A5 + A6 + A7 is converted into a digital output and output.

FIG. 6 is a block diagram showing the connection structure between the counter C6 and the AND circuit A9, and FIG. 7 is a time chart of input/output signals of each part thereof. Although the case where the alarm status display signal is composed of a 4-bit code is shown here, it may be 8 bits or more.

When two i4 pulses (Fig. 7g) indicating two infrared rays arrive from the AND circuit A6, the outputs of the output terminals 0P6110P62, 0P63, and 0P64 of the counter c6 are shown in Fig. 7(b) and (c), respectively. , (d) , (
e).

AND circuit A9 consists of four AND gates connected to each output terminal of counter C6) A91 r A92 + A9
3 7718 circuit A1 which receives the count value L of the counter C3 from rA94 and the input signal grus pb.
1 (see FIG. 4) and a high-level output q (FIG. 7g) outputs a high-level signal from each output terminal of the counter C6.

At the same time, the counter C6 is reset by the output t. In this way, output terminals 0P21. OP2□
A high level output (FIG. 7 1) is obtained at the output terminal OP2□ of l0P23 and 0P24. Each output/terminal o
If the outputs of p21 to cP24 are viewed as parallel outputs, it is no secret that these outputs are the same as the digital output from the alarm status display signal generation circuit. Here, depending on the number of pulses that arrive at the counter C6, that is, the number of infrared rays that are cut off, the output terminals 0P21 to 0P24 appear.
-Since the green level output is fixed, the two display devices determine which output terminal has the green level output and display the number of infrared rays blocked. In addition, the display of 1 alert warning area is as follows.
The corresponding warning area is displayed depending on which output terminal including the AND circuit A8+AIO in FIG. 4 has the NO level output.

FIG. 8 shows another example in which the AND circuit A9 in FIG. 6 is replaced by a multiplexer.

That is, as shown in FIG.
In the AND circuit A9 consisting of
It is necessary to determine the number of infrared rays to be cut off based on the combination of high level outputs appearing at 24. On the other hand, by using the multiplexer MP2, if the number of infrared rays to be cut off is two, for example, the number of infrared rays to be cut off and the output terminals will be output on a one-to-one basis, such as outputting the level signal to the second output terminal 0P22. It can be made to correspond. If a decimal counter is used as the counter C6, nine types of information can be identified.

FIG. 9 is a timing chart of input and output waveforms of each part when identifying information indicating two infrared rays, as in the above example.

When two pulses arrive as shown in FIG. 9(a).

The output of output terminals OP61 + OP62 is shown in Figure 9 (b
), as shown in Figure 9(c). And counter C3
When the count output t from the circuit (see FIG. 4) arrives, a high level output as shown in FIG. 9 is made to the output terminal OP2□. In addition, FIG. 9(d) and FIG. 9(e) are output terminal 0P.
61,0 shows the signal change in the multi-zorexor MPz corresponding to P62.

FIG. 10 shows a circuit example of a timer in multiplexer MP2 configured corresponding to each output terminal of counter C6.

Note that the same function can be provided by using a decoder instead of using such a multiplexer.

Incidentally, in the above example, a case has been described in which the number of infrared rays that have been blocked is expressed as the two-alarm state display signal, but it is also possible to display which infrared rays have been blocked. That is,
In the signal identification circuit, the same output as the digital output of the alarm status display signal generation circuit provided in each warning area can be obtained by the circuit shown in Fig. 4.
In the case of a book, seven types of display can be made by setting a 7-digit digital output based on 2 brigadiers and connecting a circuit for determining the 7-digit digital output to the signal identification circuit. Based on the same principle, it is also possible to perform a display in which, for example, a single infrared ray signal does not cause an alarm display, but two or more infrared rays cause an alarm.

As is clear from the above explanation, in the present invention, an apparent time slot corresponding to the number of warning areas is set at time T2 from pulse Pa to pulse pbt included in the input signal, and one alarm is issued. The alarm status display signal is converted into alarm status display information based on the number of pulses and is transmitted in a time slot corresponding to the warning area.
Even if alarms are issued in multiple alert areas almost simultaneously, these can be reliably identified and displayed. Further, one identification signal generation circuit may be provided corresponding to one caution area, and one signal identification circuit may be provided regardless of the number of caution areas.

Furthermore, the alarm status display information to be inserted into the time slot is not limited to information such as the number of infrared rays cut off or which infrared rays were cut off, but can include various display information.

In addition, in the embodiment, the counter C5°C6+ of the signal identification circuit
As a circuit connected to C7 (see Figure 4).

I have given examples of AND circuits, multiplexers, and decoders, but
It is not limited to these.

[Brief explanation of drawings]

FIG. 1 is a schematic diagram of an infrared infrared incense device according to the present invention, and FIG. 2 is a block diagram of an identification signal generating circuit thereof.
Figure 3 is a time chart of the input/output signals of each part, Figure 4 is a block diagram of the signal identification circuit in Figure 1, and Figure 5 is a block diagram of the signal identification circuit in Figure 1.
The figure shows the input and output of each part (time chart diagram of No. 8, No. 6
The figure is a connection configuration diagram of the counter C6 and the AND circuit A9 in FIG. 4. Fig. 7 is a time chart of input/output signals of each part, Fig. 8 is a block diagram showing another example of the configuration of Fig. 6, and Fig. 9 is a time chart of input/output signals of each part.
The figure is a time chart of input/output signals of each part, No. 10.
The figure shows an example of the inside of the multiplexer in FIG. 8. IP is a light transmitting part, 2 and 3 are light transmitting and receiving parts, 2R, 3R. 4R is a light receiving section, 5 is a signal identification circuit, and 6 is a display device. 11P-13P, 21P-23P, 31P-33P. is a light transmitter, 21R~23R, 31R~33R141R~
43R is a light receiver, 24, 34.44 is an alarm status display signal generation circuit, 25, 35.45 is an identification signal generation circuit, TM
l is timer + CI-c6 is callan l, 08C1,
08C2 is an oscillation circuit, CMP is a digital comparator + FF 1 + FF 2 ('j: Frizzo flop, MP is a multiplexer. l Figure 7 (c) OP6z Figure 9 (C) θb2 thrl input 1 Figure 8 Figure 10

Claims (1)

[Claims] ■ A light transmitting section having a plurality of light transmitters that emit infrared rays and a light receiving section having a plurality of light receivers that receive the infrared rays are installed facing each other across a security area, and each of the light transmitters and light receivers has one light transmitter and one light receiver. In an infrared warning device in which combinations of a light transmitting part and a light receiving part are installed in tandem and are combined by a plurality of infrared rays as a whole by being combined by a plurality of infrared rays, each of the light receiving parts is identified. A signal generating means is provided, and the light transmitting section or the light receiving section receives one identification signal from each light receiving section.
An infrared transmitter and a receiver are provided for the identification signal to be transmitted using infrared rays, and an identification means for the identification signal is connected to the last stage infrared receiver for the identification signal and the identification signal generating means. Features an infrared warning device.