JPS6079872A - Control signal detector in facsimile equipment - Google Patents

Abstract

PURPOSE:To prevent mis-detection by detecting a carrier component in a picture signal to control a detection output generating circuit of a control signal. CONSTITUTION:A reception signal A from an input terminal 1 is inputted to a carrier detection circuit 22 to detect a carrier component transmitted for a pre- scribed time to a fixed position in a picture signal. Since the detection signal is supplied to an OR circuit 26, a signal F which takes L level for a period when the carrier component exists during the reception of a picture signal and takes H level consecutively during the reception of a control signal is outputted from an AND circuit 25 and applied to a counter 24. Thus, the reception signal overflows at a prescribed time after the reception signal changes from the picture signal into the control signal so as to generate a detecting output G of the control signal.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a control signal detection device for a facsimile machine.

[Problems with conventional technology]

In conventional facsimile machines, the devices shown in Figures 1 and 2 are used to detect control signals (
The configuration shown in the figure was adopted.

That is, in the case of Fig. 1, the received signal input to the input terminal l is applied to the bandpass filter 2 that passes only the frequency to be detected, and then rectified by the full-wave rectifier circuit 3. The signal is integrated by an integrating circuit 4 and applied to a comparator 5, and when this signal exceeds a reference pressure level of a reference voltage source 6, a detection output signal is outputted to an output terminal 7. In the case of FIG. 2, the received signal is first binarized by the zero-crossing signal circuit 8 and then added to the counter 9 as a pulse signal. It counts how many pulses are input to the counter 9, inputs this counting result to the judgment circuit 11, confirms that the Nockles number counted by the counter 9 is within a predetermined range, and thereby When the high frequency control signal is detected, a detection signal is outputted from the output terminal 7.

However, according to the conventional control signal detection device shown in FIGS. 1 and 2, for example, when both amplitude-modulated signals contain a signal with the same frequency component as the control signal, There is a risk that the image signal will be mistakenly detected as a control signal and a detection output will be generated, which has the drawback of causing a problem in communication.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a new control signal detection device that effectively eliminates the drawbacks of the conventional control signal detection device described above. A control signal detection device is equipped with a control signal detection circuit that includes a circuit that detects and generates an output, and a control circuit that operates this detection output generation circuit when receiving a control signal and stops the operation when receiving an image signal. , which achieves the above objectives.

〔Example〕

Examples of the present invention will be described in detail below.

FIG. 3 shows a first embodiment of the control signal detection device according to the present invention, and FIG. 4 is a timing chart illustrating its operation. In this embodiment, focusing on the fact that a carrier component is always sent to a certain position in the image signal for a certain period of time during image signal reception, a circuit is provided to detect this carrier component, and this circuit is used to detect the control signal. A fourteenth circuit is configured to control the detection output generation circuit, and includes a detection output generation circuit 21 that detects a control signal and generates an output, and a carrier detection circuit 22 for controlling this circuit 21. .

The detection output generation circuit 21 includes a frequency detection circuit that detects a control signal of a predetermined frequency, a counter 24 that measures the time during which this circuit 23 outputs a detection output, an OR circuit 25, and an AND circuit 26. Yosikaru. The frequency detection circuit 23 is given a received signal A as shown in FIG. Figure 4 (
An output signal B as shown in (b) is generated and applied to one input terminal of the AND circuit 26. A lock signal C is applied to the clock terminal of the counter 24 as shown in FIG. 409. This clock signal C has the same phase as the line synchronization signal of the received signal, and the period during which the synchronization carrier exists is
L# level is reached. At one input end of the OR circuit 26,
During image signal reception, a signal indicating an "L" level is applied to the terminal 28, as shown in FIG. 4).

On the other hand, the carrier detection circuit 22, which is similar to an analog filter, is connected to the input terminal 1 to receive the received signal A, and detects a carrier component that is always sent to a certain position in the image signal for a certain period of time. Upon detection, a negative logic signal E as shown in FIG. 4(e) is output. This signal E is applied to the other input terminal of the OR circuit 26, and the output of the OR circuit 26 is applied to the other input terminal of the AND circuit 25. Therefore, from the AND circuit 25, as shown in FIG. A signal F taking the 'H# level is output, and this signal F is applied to the enable terminal of the counter 24. The output signal B of the frequency detection circuit 23 is applied to the negative logic clear terminal of the counter 24.

The counter 24 counts the number of pulses of the clock signal C after the enable terminal becomes H'' level, and when the number reaches a predetermined number (N), that is, the received signal changes from the image signal to the control signal. After a predetermined period of time has elapsed since the change, it overflows and generates a control signal detection output G as shown in FIG. 4 (G).

The above is an explanation of the configuration and operation of the first embodiment of the present invention. According to the fr, S configuration, even if a component of the same frequency as the control signal is received during image signal reception, There is no possibility that it will be mistakenly detected as a control signal. Furthermore, when receiving the control signal, the output E of the carrier detection circuit 22 is continuously at the 'H' level, so the counter 24 can measure the time when the output of the frequency detection circuit 23 is active. Afterwards, the counter 24 can overflow and generate a sensed output of the control signal.

Next, the second aspect of the present invention. FIGS. 5 and 6 for examples of
This will be explained with reference to the figures.

Since FIG. 5 has a detection output generation circuit 21 similar to that shown in FIG.
When a control signal having a frequency different from that of the carrier component is received, the signal H output from the demodulator is a beat signal as shown in FIG. A counter 31 is provided for counting beat signals in synchronization with a time slot for transmitting a carrier component, that is, a line synchronization signal period.

The counter 24 is controlled by inputting the output of the counter 31 to the OR circuit 26 of the detection output generation circuit 21.

The output H of the demodulator is applied to the clock terminal of the counter 31 through the terminal 32, and the clock signal C is applied to the negative logic clear terminal of the inverter 3.
A clock signal whose polarity is inverted by 3 is applied. The overflow output of the counter 31 is applied to the other input terminal of the OR circuit 26 and also applied to the enable terminal of the counter 31 via an inverter 34.

Next, the operation of the apparatus shown in FIG. 5 will be explained with reference to the timing chart shown in FIG. The clock signal has the same phase as the line synchronization signal of the received signal, and the period of the synchronization carrier is at the "L# level."Here, when the received signal switches from the image signal to the control signal, the counter 31 is set to the sixth level. By counting a predetermined number of beat signals in the signal H as shown in Fig. 3, an overflow output ■ as shown in Fig. 6 (f) is output. is cleared by the clock signal δ. This signal is applied to the enable terminal of the counter 24 via the OR circuit 26 and the AND circuit 25 as a signal J as shown in FIG. At the rising edge of the clock signal C, the clock signal d changes from H” to L#.
The counter 24 performs a counting operation by l since it exits before it falls, that is, before it is cleared. Therefore, the counter 24 generates a control signal detection output G as shown in FIG. 6 only when it receives an immediate control signal in which a predetermined number (N) of pulses are generated.

〔Effect of the invention〕

According to the present invention, even if a facsimile machine continuously contains the same frequency component as a control signal in an image signal generated by amplitude modulation, for example, there is a high possibility that it will be mistakenly detected as a control signal. A control signal detection device can be obtained.

[BRIEF DESCRIPTION OF THE DRAWINGS] FIGS. 1 and 2 are block circuit diagrams of a conventional control signal detection device, FIG. 3 is a circuit diagram of an embodiment of the control signal detection device according to the present invention, and FIG. 4 is a block circuit diagram thereof. 51 is a circuit diagram of another embodiment of the control signal detection device according to the present invention, and FIG. 6 is a timing chart showing signal waveforms of each part. 211. , detection output generation circuit, 22... carrier detection circuit, 23... frequency detection port 1? i, 24.31...
・Counter, 25...OR circuit, 26...AND circuit, 33°34...inverter.

Claims (1)

[Claims] a detection output generation circuit that detects a control signal included in a received signal and generates an output; and a detection output generation circuit that detects whether the image signal is received or the control signal is received and generates the detection output generation circuit based on the detection. A control signal detection device for a facsimile machine, comprising: a control circuit that operates when receiving the control signal and disables operation when receiving the image signal.