JPS6076056A - Data reproducing circuit - Google Patents

Abstract

PURPOSE:To ensure the stable peak detection regardless of the level of the input signal of a peak detecting circuit by actuating plural stages of clamping diodes with an input of a high level and just a signal stage of the clamping diode with an input signal of a low level respectively through the peak detecting circuit. CONSTITUTION:A peak detecting circuit 13 differentiates an input signal A by a differentiating circuit consisting of a capacitor C5 and a resistance R6 and clamps it for peak detection. In this case, clamping diodes D3-D6 function as a large resistance to the signal A when this signal A has a comparatively low level. Therefore the diodes D3 and D4 work just by one stage. While the diodes D3-D6 function as a small resistance for the signal A when it has a high level. Thus diodes D3-D6 work by two stages. This circuit ensures the accurate peak detection despite a high level of the signal A.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a data reproducing circuit used in magnetic card readers and the like.

This type of data reproducing circuit reads data recorded on a recording medium such as a magnetic card with a magnetic head, and inputs the signal of several seconds read through an amplifier circuit to a peak detection circuit to detect the peak of the data. Playback is in progress. Conventionally, the peak detection circuit in this data reproducing circuit has a capacitor CI,
C2, resistor R1, operational amplifier A1 and two anti-parallel diodes DI.

D2 or two diodes connected in series and connected in antiparallel, Dll, D12. D21. D22, the read signal A input from the magnetic head is differentiated by the capacitor C1 by operating an amplifier circuit, and the voltages +Vl, -V2 determined by the diodes DI and D2 or the diodes Dll, D12. D21. The read signal A leak detection is performed by clamping to the voltage +V3°-V4 determined by D22.

However, in a data reproducing circuit that has a peak detection circuit configured with antiparallel lamp diodes Di and D2 in one stage as shown in Figure 1 (b), the input signal to the peak detection circuit is large as shown in Figure 2. Sometimes, due to waveform distortion (noise, etc.), the drop in the saddle level of output signal B becomes large, and output signal B crosses zero at a position different from the original data position and is detected as a peak. This may cause data to be misread. However, as shown in FIG. 3, when the input signal to the peak detection circuit is small, peak detection is accurately performed. In addition, in a data reproducing circuit having a peak detection circuit with anti-parallel or two-stage lamp diodes as shown in Fig. 1 (b), even if the input signal A of the peak detection circuit is large as shown in Fig. 4, the output is Signal BLv
? Peak detection can be performed accurately because the decline in the dollar level does not reach the zero level, but as shown in Figure 5, when the input signal to the peak detection circuit is small, the waveform of the output signal B becomes dull and accurate peak detection is possible. Peak detection is not possible, and the zero-crossing position of output signal B shifts, causing jitter.

In order to be able to perform stable peak detection regardless of whether the input signal to the peak detection circuit is large or small, the present invention provides a multi-stage clamp for large input signals in the peak detection circuit. The clamping diode is activated to perform peak detection, and for small input signals, only one clamping diode is activated to perform peak detection.

The present invention will be described below by way of examples with reference to the drawings.

FIG. 6 shows an embodiment of the present invention, in which reference numeral 11 denotes a magnetic head for reading data from a recording medium such as a magnetic card;
is operational amplifier A2, resistors R2 to R5, and capacitor C
3, a first stage amplifier circuit constituted by C4, and 13 a peak detection circuit. This peak detection circuit 13 consists of a differentiating circuit consisting of a capacitor C5 and a resistor R6, an inverting amplifier A3 consisting of an operational amplifier, resistors R7 and R8, and a tie auto D.
3 to 1) 6 and capacitors C6 and C7. Diode D3. D4 and a parallel circuit of capacitor C6 and diode D5. The parallel circuit of D6 and capacitor C7 is connected in series between the output terminal and the inverting input terminal of the inverting amplifier A3, and the connection point of these parallel circuits, the inverting input terminal of the inverting amplifier A3, and the output terminal of the above-mentioned differentiating circuit. Resistors R7 and R8 are connected between each of the resistors R7 and R8. Diodes D3 and D4, D5 and D6 are connected in antiparallel, respectively, and a reference voltage is applied to the non-inverting input terminal of the inverting amplifier A3.

Here, the resistor R7 is set to about 100 times the resistor R8, and the capacitor C7 is set to about 10 times the capacitor C6.

In this embodiment, data recorded on a magnetic card or the like is read by a magnetic head 11, and the read signal is input to a peak detection circuit 13 via an amplifier circuit 12. In the peak detection circuit 13, peak detection is performed by differentiating and clamping the input signal A with a differentiator circuit consisting of a capacitor C5 and a resistor R6. When the input signal A is relatively small, the clamping diodes D3 to D6 detect the input signal. Since the output signal of the differentiating circuit does not pass through the resistor R8, it passes through the resistor R7 and the clamping diode D3. It passes through a clamp circuit consisting of a parallel circuit of D4 and a capacitor C6, and is output to the output terminal, where it is clamped at the voltage terminal Vs, -V6 (see the right side of FIG. 7). At this time, the clamp diode is connected to one stage D3. Since only D4 works, peak detection can be performed accurately even if the input signal A is small. On the other hand, input signal A
When is large, diodes D3 to D6 are used for the input signal.
acts as a small resistance, so the output signal of the differentiating circuit is outputted to the output terminal via the small resistance R8, the clamping diodes D3 to D6, and the capacitors C6 and C7, that is, the inverting amplifier A3, the resistance R8, and the diodes D3 to D6.
and voltage element V7 in a circuit consisting of capacitors C6 and C7.
.

- Clamped at V8 (see left part of Figure 7).

At this time, since two stages of clamping diodes D3 to D6 operate, accurate peak detection can be performed even if the input signal A is large.

In this embodiment, depending on the capacitance settings of capacitors C6 and C7, two stages of clamping diodes are used and one stage is used.
The frequency characteristics can be changed depending on when only one stage is working. In other words, when the two stages of clamping diodes are working, it is possible to cut noise by setting the capacitance of the capacitor C7 so that the gain drops at a frequency slightly higher than the fundamental frequency band of the data in the input signal A. The possibility of misreading due to noise can be further reduced. In addition, if the capacitance of capacitor C6 is set so that the gain extends (does not fall) to a frequency that is somewhat higher than the fundamental frequency band of the data in the input signal when only one stage of clamping diode is working, it is possible to reduce the gain to a very small level close to the noise component. It is also possible to pick up specific peaks, making it possible to perform more accurate peak detection.

As described above, according to the present invention, in the peak detection circuit, multiple stages of clamping diodes work for large input signals, and only one stage of clamping diodes works for small input signals. Regardless of whether the input signal to the detection circuit is large or small, its peak can be detected stably.

[Brief explanation of the drawing]

Figures 1 (a) and (b) are circuit diagrams showing each side of a peak detection circuit in a conventional data reproducing circuit, and Figures 2 to 5 and 6 are circuit diagrams showing an embodiment of the present invention. , FIG. 7 is a waveform diagram showing input and output waveforms of the same embodiment. A3...Inverting amplifier, D3-D6...Clamp diode, 05-C7...Capacitor, R6-R8...
·resistance.

Claims (1)

[Claims] The output signal of the amplifier circuit is input to a data reproduction circuit configured to send a read signal from the magnetic head to a peak detection circuit via an amplifier circuit, detect the peak of the read signal, and reproduce recorded data. an inverting amplifier to which the output signal of the differentiating circuit is input to the inverting input terminal, and a plurality of sets of capacitors connected in series between the output terminal of the inverting amplifier and the inverting input terminal. The peak detection circuit is constructed using a parallel circuit in which a pair of anti-parallel diodes are connected, and a resistor connected between a connection point of the plurality of parallel circuits and an output end of the differentiation circuit. A data reproducing circuit featuring: