JPS60757A - Method for stamp indication of container of semiconductor device - Google Patents

Method for stamp indication of container of semiconductor device

Info

Publication number
JPS60757A
JPS60757A JP59108038A JP10803884A JPS60757A JP S60757 A JPS60757 A JP S60757A JP 59108038 A JP59108038 A JP 59108038A JP 10803884 A JP10803884 A JP 10803884A JP S60757 A JPS60757 A JP S60757A
Authority
JP
Japan
Prior art keywords
stamp
container
length
product name
stamped
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59108038A
Other languages
Japanese (ja)
Inventor
Tsutomu Matsuura
松浦 勉
Hideo Ishikawa
石川 英郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP59108038A priority Critical patent/JPS60757A/en
Publication of JPS60757A publication Critical patent/JPS60757A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/544Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54406Marks applied to semiconductor devices or parts comprising alphanumeric information
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54473Marks applied to semiconductor devices or parts for use after dicing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54473Marks applied to semiconductor devices or parts for use after dicing
    • H01L2223/54486Located on package parts, e.g. encapsulation, leads, package substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)

Abstract

PURPOSE:To facilitate the inspection for ensuring the blank region on the surface of the titled container by a method wherein an indication band of a straight line, a curbed line, symbols, or letters is stamped at a fixed interval from the stamp for the trade mark, trade name, etc. CONSTITUTION:The length from the lower end of the stamp 21 to the lower end 11 of the container is A, and that from the lower end of the stamp 21 to the linear stamp 3 for confirmation of region ensuring is B. In this case, only if the presence of this linear stamp on the surface of the container is confirmed with naked eyes, it always serves to ensure the length B required by users, because of formation of the linear stamp 3 and the other stamp 2 for the trade mark and trade name in an integral body.

Description

【発明の詳細な説明】 本発明は半導体装置、とくに集積回路容器の捺印表示方
法に1.!’]する。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides a method for marking and displaying semiconductor devices, particularly integrated circuit containers. ! ']do.

集積回路容器(以下容器と言う)に商標1品名などを表
示するために、%e来では自動又は手動により容器表面
に捺印方向、位置を決め捺印する方法を用いていた。特
に、プログラマブル・リードメンリ中メモリ(Prog
ra+nable Read C)nlyMemory
 、以下F ROMと言う)においてはこれに集積回路
の使用者側で必要なパターンを7)き込み、その内容を
この容器表面に記録するので集積回路製造業者が出荷す
る時点で容器表面の決められた領域に追加捺印のために
十分な空白領域が有ることが必要となり、その確認の検
査をしなければならない。
In order to display a trademark, product name, etc. on an integrated circuit container (hereinafter referred to as container), a method has been used in the past in which the direction and position of the mark are determined and the mark is placed on the surface of the container automatically or manually. In particular, programmable read-maintenance memory (Prog.
ra+nable Read C)nlyMemory
(hereinafter referred to as F ROM), the user of the integrated circuit writes the necessary pattern7) into this and records the contents on the surface of the container, so the integrated circuit manufacturer can determine the surface of the container at the time of shipment. It is necessary that there is sufficient blank area for additional stamping in the area where the stamp is placed, and an inspection must be conducted to confirm this.

本発明の目的はこの容器表101上の空白領域確保を容
易に検査できる有効な捺印方法を提供することである。
An object of the present invention is to provide an effective stamping method that can easily check whether the blank area on the container table 101 has been secured.

本発明の特徴は、半4Ij体装置の容器表面に、商標、
品名等を捺印するに際し、上記商標、品名等が捺印され
る個所から一定の空白領域を確保したことを示す表示帯
の捺印を上記商標、品名等の捺印と1体化した刻印にて
行う半導体容器の捺印方法である。すなわち、商標、品
名靜の刻印には所定間隔をあけて1a綜、曲腺、記号、
又は文字等の表示イ(ケも刻印されている。したがって
この1つの刻印にて捺印した結果、商標、品名等ととも
に表示帯も捺印されていることを確認すれば、使用者側
が使用する空白領域は確保されていることとなる。
The feature of the present invention is that the trademark, trademark,
When stamping the product name, etc., a display band is stamped to indicate that a certain blank area has been secured from the place where the trademark, product name, etc. is stamped, using a stamp that is integrated with the stamp of the trademark, product name, etc. This is a method of stamping on containers. In other words, the marks of trademarks and product names are marked with 1a heel, curved line, symbol,
Or the display of characters, etc. is also engraved. Therefore, as a result of stamping with this one stamp, if you confirm that the display band is also stamped along with the trademark, product name, etc., the blank area used by the user is guaranteed.

第1図は従来法による捺印表示を示す容器表面の平面図
であり、1は容器、2は商標や品名などの捺印表示であ
る。11は容器表面の下端を示し21は商標、品名など
の捺印の下端を示す。この時、捺印表示の下端と容器の
下輪との長さAがある一定の長さ以上なければ集積回路
の使用者側でPROMK冑き込んだパターンのコードを
迫力1目余印する領域がなくなる。
FIG. 1 is a plan view of the surface of a container showing a seal according to a conventional method. 1 is a container, and 2 is a seal indicating a trademark, product name, etc. Reference numeral 11 indicates the lower end of the container surface, and 21 indicates the lower end of a mark such as a trademark or product name. At this time, if the length A between the lower end of the stamp display and the lower ring of the container is not less than a certain length, the area where the user of the integrated circuit will strongly mark the code of the PROMK pattern is It disappears.

従って追加捺印するだめの領域が十分確保されているこ
とを確認するためノt↓初の(塔印を行った時点及び出
荷時にこの讐白争S域のII: dを1個づつ測定しな
ければならず、多くの1斂を要するという欠点があ−)
た。
Therefore, in order to confirm that there is sufficient area for additional stamping, it is necessary to measure II: d in this enemy dispute S area one by one at the time of marking the first (tower stamp) and at the time of shipment. However, the disadvantage is that it requires a lot of strokes.)
Ta.

第2図は本考案の捺印表示下端の一実施例である。FIG. 2 shows an embodiment of the lower end of the seal display according to the present invention.

第2図で1は容器、2は商標、品名などの捺印表示であ
り、11は容器の下端、21は捺印表示の下端である。
In FIG. 2, 1 is a container, 2 is a stamp displaying a trademark, product name, etc., 11 is the lower end of the container, and 21 is a lower end of the stamp display.

3は本考案のit!i徴の一つで領域確保1l(A沼川
の1μ線捺印である。商標品名捺印表示2と領域確保確
認用直線捺印表示3を一体化した刻印によってなされた
捺印である。
3 is this invention! One of the i characteristics is the area securing 1l (A Numakawa's 1μ line stamp.It is a seal made by integrating the trademark product name stamp display 2 and the linear stamp display 3 for confirming area reservation.

Aは捺印21下端から容器下端111での長さ、Bは捺
印表示21下扁から領域確保確認用直線捺印3tでの長
さである。この長さは集積回路の使用者が必要とする長
さ以上の位Mに作ったものである。
A is the length from the bottom end of the stamp 21 to the bottom end 111 of the container, and B is the length from the bottom of the stamp display 21 to the linear stamp 3t for area confirmation. This length is made to be greater than or equal to the length M required by the user of the integrated circuit.

今、捺印が第2図の様に2列の捺印であるとし、このM
の横方向の長さは茶器の長さで決オリ%縦方向の長さが
確保されれば使用者が要求する領域が確保される場合を
考える。
Now, suppose that the stamp is in two rows as shown in Figure 2, and this M
The horizontal length is determined by the length of the tea utensil.If the vertical length is secured, the area required by the user can be secured.

この場8.捺印作票後このPl域確保確認用16〔腺捺
印が容器表面に捺印されていることを肉眼で確認さえす
れば、領域qζ保確認用直線捺印3と他の商標品名捺印
刻印2が一体化されて作られているので使用者が必要と
する長さBは必ず確保されることになる。
This place8. After the stamping form, the linear stamp 3 for confirming area qζ and other trademark product name stamps 2 will be integrated as long as you confirm with the naked eye that this PL area confirmation stamp 16 is stamped on the surface of the container. Since the length B required by the user is always secured.

この様に個々の容器上の最初の捺印により残された空白
領域を(ljjl定せずとも単に肉眼で領域a沼用途印
表示の有無を見るだけで当初の目的である空白領域党有
無を検査できる。
In this way, the blank area left by the first stamp on each container can be checked with the naked eye to check whether the blank area is marked or not, which is the original purpose. can.

それ故、捺印直後でも容易に判定できるし。Therefore, it can be easily determined even immediately after the seal is stamped.

例え規格を外れるものがあっても速かに再工事ができる
し、出荷時の検査も大幅にn11略化できる。
Even if something does not meet the standards, it can be quickly rebuilt, and inspections at the time of shipment can be greatly simplified.

以上一実施例で説g6したが、本考案は蛾、横の方向を
敦えてもよいし、イ片1域確保傭“語用の直■捺印を他
の記号文字などにしても良い。
Although the explanation has been given in one embodiment above, the present invention may be used to mark the lateral direction, or the word stamp may be replaced with other symbols or characters.

又、全体に捺印をし、その一部をスリット状にしたいわ
ゆる白黒反転のものでも同じ炙り果を有する。
Also, a so-called black-and-white reversal version, which has a seal stamped on the whole part and a slit-like part, has the same roasted result.

4・ 図面のjAl単な!WJ 第1図は従来の谷器表聞の4す;印表示を示す平面図、
第2図は本発明の実飽例による容器表iMlの捺印表示
を示す平面図でちる。
4. The drawing is simple! WJ Figure 1 is a plan view showing the 4 mark display of the conventional valley equipment table.
FIG. 2 is a plan view showing a stamp display on a container surface iMl according to an actual example of the present invention.

尚、図において、 1・・・・・・集積回路容器、11・・・・・・j(、
積回路容器の下端、2・・・・・・捺印表示、21・・
・・・・捺印表示の下端、3・・・・・・領域確保確認
用の直、y(p捺印、A・・・・・・捺印表示下端と果
槓回昂′f;器の下端までの長さ、B・・・・・・捺印
表示下端と領域確保確認用直線捺印までの長さ。
In the figure, 1... integrated circuit container, 11...j (,
Lower end of integrated circuit container, 2... Stamp indication, 21...
...lower end of the seal display, 3...direction for confirming area reservation, y (p stamp, A...lower end of the seal display and the bottom of the container) B: Length from the bottom edge of the stamp display to the straight line stamp for confirming area reservation.

Claims (1)

【特許請求の範囲】[Claims] 半導体装1dのd指表面に商律、品名等を捺印するに際
し、上記商標、品名等が捺印される個所から一定の空白
領域を確保したことを示す表示帯の捺印を上記商4q″
シ1品名等の捺印と一体化した刻印にて行うことを特偵
とする半導体装1面の容器の捺印表示方法。
When stamping the trade name, product name, etc. on the surface of the d finger of the semiconductor device 1d, a display band indicating that a certain blank area has been secured from the place where the trademark, product name, etc. is stamped shall be stamped on the quotient 4q''.
1. A method for marking and displaying a seal on one side of a container for semiconductor devices, which is performed by stamping integrated with a seal such as the product name.
JP59108038A 1984-05-28 1984-05-28 Method for stamp indication of container of semiconductor device Pending JPS60757A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59108038A JPS60757A (en) 1984-05-28 1984-05-28 Method for stamp indication of container of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59108038A JPS60757A (en) 1984-05-28 1984-05-28 Method for stamp indication of container of semiconductor device

Publications (1)

Publication Number Publication Date
JPS60757A true JPS60757A (en) 1985-01-05

Family

ID=14474370

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59108038A Pending JPS60757A (en) 1984-05-28 1984-05-28 Method for stamp indication of container of semiconductor device

Country Status (1)

Country Link
JP (1) JPS60757A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4580329A (en) * 1983-05-27 1986-04-08 Otto Bihler Processing machine for workpieces

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4580329A (en) * 1983-05-27 1986-04-08 Otto Bihler Processing machine for workpieces

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