JPS607469B2 - Motor rotation starting circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a motor rotation starting circuit suitable for application to, for example, a rotating magnetic head device of a VTR.

The rotating magnetic head device of a VTR has not only a pair of rotating magnetic heads but also a rotating drum that is rotationally integrated with the magnetic head, and these heads and rotating drums are generally controlled by a control circuit as shown in FIG. Its rotation is controlled by The control circuit consists of a speed control system IA for controlling the rotational speed of the rotating drum, which is a rotating body, and a rotational phase control system IB for controlling the rotational position of the rotating drum, that is, the rotational phase of the rotating magnetic head. The control signals obtained by these control systems IA and IB are supplied to the drive source of the rotating drum, for example, a DC motor M, which controls the rotating drum to a normal rotational speed, and also connects the magnetic head with an external synchronizing signal (video signal). The rotational phase with the vertical synchronization signal (or the same signal is used) is regulated.

Let's ask the speed control system IA to explain.

Reference numeral 2 indicates a detection element of the head structure constituting the frequency generator feed G, and therefore, a rotation signal SF' (see FIG. 2A) related to the rotation of the drum at zero rotation is obtained from this detection element 2.

Although the rotation signal SF' in this example is selected to have a moderate frequency of 360 Hz like the rotation position signal described later, the frequency can be arbitrarily selected. Rotation signal S
By supplying F' to the waveform shaping circuit 3, it is converted into a rectangular waveform signal SF as shown in FIG. 2B, and this signal SF is thereafter used as a rotation signal. The rotation signal SF is transmitted through first and second delay circuits 4 connected in series.
These delay circuits 4A and 4B are each configured with a mono multi-channel circuit that operates at the falling edge of the signal, and therefore the first delay output S is supplied to the first delay circuit 4A through the first delay circuit 4A.
, (C in FIG. 2) and supplying it to the second output 4B, the second delayed output So2 (circle in the figure) is obtained. The second delayed output SD2 is coupled to a sawtooth comparison signal generation circuit 5 to form a comparison signal So shown in FIG. 2B. As shown in the figure, the comparison signal generating circuit 5 is set at the falling edge of the second delayed output So2 and reset at the rising edge of the first delayed output So.

In order to obtain the comparison signal SD having such a period, the first and second delay circuits 4A and 4B described above are provided. The comparison signal So is sent to a sampling and holding circuit 6 to form a speed control signal for controlling the motor M.

That is, although this sampling and holding circuit 6 is formed from a sampling circuit (configured as a gate circuit) 6A for sampling the comparison signal So and a holding circuit 68 having a capacitor for charging and discharging, 2F) is formed based on the rotation signal SF. 7 shows a forming circuit for this purpose, and in this example, the sampling signal SP is formed using the negative polarity (falling polarity) of the rotation signal SF.

The comparison signal So sampled by the sampling signal SP is held in the subsequent hold circuit 6B,
This hold output is output from a DC multiplier 8 consisting of an arithmetic multiplier, etc.
A speed control signal S is supplied to the motor M through the motor M mentioned above. (Figure 2G). That is, since the sampling position differs depending on the rotation state (slow or fast) of the motor M, the DC level of the speed control signal So changes based on the difference, thereby controlling the rotation speed of the motor M.
Next, the rotational phase control system IB will be explained.

This rotational phase control signal is formed from a reference external synchronization signal Sv and a pulse signal PG related to the rotational position of the rotating drum. is provided. The head 11 shown in the figure constitutes a pulse generator. The synchronizing signal Pv is supplied to a generating circuit 12 similar to that described above to convert it into a sawtooth comparison signal, and then an error in the rotational phase supplied to a sampling and holding circuit 13 is detected. 14 indicates a pulse shaping circuit for obtaining the sampling signal SG.

This rotational phase control signal SE, which corresponds to the rotational phase error, is supplied to the above-mentioned control system IA via the DC multiplier 15.

Usually, the delay time of either one of the delay circuits 4A and 48 (
By varying the phase control signal SE, the speed of the motor M is controlled and the magnetic head is synchronized with the synchronization signal Sv. The present invention is suitable for application to a control circuit that is provided with two control systems IA and IB to control a rotating drum and a magnetic head, and is particularly applicable to a control circuit that controls a rotating drum and a magnetic head. This facilitates the startup operation and also facilitates the integration of this circuit into an IC.

0, which will explain the circuit of the present invention with reference to FIG. The purpose has been achieved.

That is, in the present invention, as shown in FIG.
When a starting circuit 20 is provided, the starting circuit 20 is configured to use the first and second delay outputs So and So2 as reference times necessary for frequency discrimination. Fig. 4 shows the specific configuration of this startup circuit 20.As shown in the figure, the startup circuit 20 includes a flip-flop circuit 21B and a control circuit (logic gate circuit) 21A disposed in front of the flip-flop circuit 21B. The explanation will be added starting from the control circuit 21A, but this has three control transistors Q, ~Q, which are connected in parallel to the DC power supply Vcc via a resistor 22 as shown in the figure. and the base input terminal 20a of the first control transistor Q.
is supplied with a rotation signal SF. Similarly, the input terminal 20b of the second control transistor Q2 has the first delayed output S.
D, and the input terminal 20 of the last transistor Q2
A second delayed output SD2 is supplied to each of the terminals c. Therefore, the control signal Sc having the level of VBE (base-emitter voltage of transistor Q) is obtained at the output terminal 23 only when the signals SF, SD, and SD2 are not supplied to the respective input terminals 20a to 20c. , signal SF, So
, and SD2, the control signal Sc cannot be obtained. That is, this control circuit 21A operates as a negative logic AND circuit. As is well known, the flip-flop circuit 21B has a pair of transistors Q4 and Q, and an output terminal 25 is led out from the collector of one of them, for example, a transistor Q5.

Note that transistors Q and Q7 connected in parallel with transistors Q and Q5, respectively, are provided to drive transistors Q4 and Q. Therefore, a differentiating circuit and a diode are used in place of these driving transistors Q6 and Q7. It is also possible to connect two circuits and drive the transistors Q and Q5 with one of the differential pulses. The above-mentioned control signal Sc is supplied to the base of one driving transistor Q6, and the second delayed output So2 is supplied to the base of the other transistor Q7.

That is, these outputs Sc and S. 2 to start circuit 20'
It is used as a time reference signal for frequency discrimination in this field.

As the name suggests, the starting signal Ss obtained at the Z output terminal 25 is used as a signal for starting the motor M, but in this example, this starting signal Ss is used as a signal for directly driving the motor. The case is shown in which the sampling circuit 6A is operated instead of being used as a circuit. Therefore, the start signal Ss is supplied as a drive signal to a current source 30 composed of a pair of transistors Q8 and Q9 as shown in the figure, and when the start signal Ss arrives, the operating current necessary to operate the sampling circuit 6A is Try to get i and get 2. Next, the starting operation of the motor will be explained with reference to FIGS. 5 and 6.

FIG. 5 shows a waveform chart from power-on to low and far rotation of the motor, but explanation of the waveform chart corresponding to the previous figure will be omitted.
2 First, at the time to when the power is turned on,
Since both transistors Q and ~Q3 are off,
Control signal Sc (fifth
Figure D) is obtained, which results in the activation signal Ss (Figure E)
is formed. Therefore, current i flows and 3 comparison signals S
. (F in the figure) is supplied to the subsequent hold circuit 6B via the sampling circuit 6A. Here, the comparison signal So obtained by the generation circuit 5 is the second delayed output S. 2 is not obtained, the predetermined voltage is always held, and as the sampling circuit 6A operates, the hold output of the hold circuit 6B is supplied to the motor M as the starting voltage. Motor M starts rotating.

When the rotation signal SF (A in the same figure) is obtained by the rotation of the motor M, the control signal Sc is inverted at the generation point L'.

However, since the second delayed output So2 is not supplied to the transistor Q7 at this time t, the control signal Ss
is not reversed. Therefore, the starting voltage of motor M continues to be supplied. Since the control signal Sc is the negative logic AND output as described above, the rotation signal SF and the first and second delayed outputs So, So2 (B and C in the same figure) are continuously obtained. During this time, the polarity does not reverse; it only reverses once it reaches a certain point.

In other words, when the rotation speed of the motor M is low and the frequency of the rotation signal (its duty is 50%) SF is low,
Both delay outputs S. ,,S. When the sum of the delay times d, , 72 of 2 is shorter than 1/2 cycle (=1/2 TF) of the rotation signal SF, a control signal Sc synchronized with the rotation signal SF as shown in FIG. 5D can be obtained. become.

On the other hand, the driving transistor Q7 has a second delay output SD.
2 is supplied, this delayed output S.

2 and the control signal Sc serve as trigger signals for the flip-flop circuit 218, and in this example, the flip-flop circuit 21B performs an inversion operation at each rising pulse (from time point t3).

Therefore, the starting signal Ss becomes as shown in the figure E, and the motor M is driven during the period s. Through the above startup operation, the motor M gradually speeds up its rotation and tries to approach the normal rotation speed, but the rotation signal SF does not reach a predetermined frequency, that is, 7, 10, 221' 2 TF. As is clear from FIGS. 6A to 6C, the control signal Sc does not invert and always maintains one state (low level in this example).

Therefore, the flip-flop circuit 21B also maintains the one state (also at a low level), and therefore the sampling operation is stopped. That is, when the frequency exceeds a predetermined value, the original operation of the starting circuit stops, and therefore, the motor M is thereafter driven by the sampling signal SF itself. in this way,
The starting circuit shown in Fig. 4 performs a frequency-dependent starting operation, so if the delay times 2 and 2 are appropriately selected, the starting operation will be continuous until the frequency determined by these values is reached. A startup behavior can be added. For example, when the frequency of the rotation signal SF to be locked is 360 Hz, this frequency may be selected to be about 100 to 200 Hz. As explained above, in the present invention, the starting circuit 20 is constructed as a frequency-dependent type, and the frequency discrimination function utilizes the first and second delay times 7·, 2, so that the present invention has the following characteristics.

First, it is easy to start up again.

That is, in the conventional circuit, generally, the bias of, for example, the DC multiplier 8 is forcibly changed for a certain period of time after the power is turned on, and the starting voltage is supplied to the motor M. Therefore, in this conventional startup method, startup is done by turning on the power,
Due to the off-state, once the motor M stops rotating for some reason, it can no longer be started unless the power supply is operated again. However, according to the present invention, since the starting circuit 20 is configured to operate according to the rotation of the motor M, it goes without saying that when the motor M becomes lower than a predetermined rotation speed, It has a feature that it can be started automatically even if the rotation has stopped.

Therefore, there is no need to turn the power on and off like a slave. Second, the first and second delay times,,
Since the starting circuit 20 is designed to perform frequency discrimination, it is not necessary to newly provide a time constant circuit for frequency discrimination, so it is extremely easy to use an IC for the starting circuit 20. This makes it easier, and the benefits in terms of circuit design increase accordingly.

In the above embodiment, the sampling circuit 6A is operated by the starting signal Ss obtained by the starting circuit 20, but it is also possible to start the motor by directly supplying the starting signal Ss to the capacitor of the hold circuit 6B. You can also do this.

[Brief explanation of drawings]

FIG. 1 is a system diagram showing an example of a motor rotation control circuit to explain the present invention, FIG. 2 is a waveform diagram to explain its operation, and FIG. 3 is a diagram showing an example of the circuit of the present invention. A similar system diagram, FIG. 4 is a connection diagram showing an example of a starting circuit, and FIGS. 5 and 6 are waveform diagrams for explaining its operation. IA is the speed control system, IB is the rotational phase control system, and M is the motor.
4A and 48 are first and second delay circuits, 5 is a comparison waveform generation circuit, 6 and 13 are sampling and hold circuits,
SF is a control signal, So is a speed control signal, Sv is an external synchronization signal, PG is a rotational position signal, SE is a rotational phase control signal,
20 is a starting circuit, 21A is a control circuit, and 21B is a flip-flop circuit. Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6

Claims (1)

[Claims] 1 In a motor speed servo system, a first delay circuit generates a pulse output with a pulse width τ_1 in response to a rotation pulse obtained in relation to the rotation of the motor, and a first delay circuit generates a pulse output in response to the output of the first delay circuit. A second delay circuit that generates a pulse output with a width τ_2 compares the phase of the pulse output of the second delay circuit with the rotation pulse, and controls the rotation of the motor with this comparison output, and controls the rotation of the motor with the comparison output. rotation pulse,
The rotation of the motor is such that a pulse with the pulse width τ_1 and a pulse with the pulse width τ_2 are applied to a logic gate to determine the rotation speed of the motor, and a rotation start pulse for the motor is obtained only at a set rotation speed or less. starting circuit.