JPS607456B2 - time limit device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a time limit device applied to a time limit type accident investigation device for power distribution system control.

One type of automation equipment for power distribution lines is a stationary time-limited accident investigation device.

A conventional example of automation using this accident investigation device will be explained using a multiple loop system. In other words, as shown in Figure 1, timed accident investigation devices are installed on automatic section switches S and mountains for sections and loop points, but the timed accident investigation system is constructed by installing timed accident investigation devices on substations and disconnectors B. Since the equipment itself is automatically controlled (judges the voltage conditions and closes and opens the switch) based on the premise of automatic reclosing, it can be If the re-closing relay for re-closing the substation or disconnector is locked in the event of an emergency power outage, not only will the automation function be lost, but if an accident occurs under such conditions, it may cause damage to others. There is also concern about the impact on healthy feeder lines. For example, in the event of an emergency disaster, if an accident occurs in a certain section on the distribution line L side and the substation SS, Noshiya disconnector CB, is suddenly disconnected, this will not be closed due to the re-closing lock, and the loop point will be separated from the healthy system L2. The switch is
is turned on and transmits power to the accident section. If the accident continues at this time, the breaker C& of substation SS2 will suddenly break. Since the disconnector C string also does not close due to the closing lock, there is a drawback that the healthy system L2 side also suffers a power outage. In order to eliminate the drawbacks of the prior art, the present invention collectively locks the automatic close function of the loop point segment switch when the reclose relay is locked, and when the reclose relay is unlocked, the loop point The purpose of the present invention is to provide a time-setting device built into a time-limited accident investigation device for loop points, which also releases the lock and does not interfere with regular automatic driving.

An embodiment of the present invention will be described below with reference to the drawings. First, as shown in FIG. 2, voltages on both sides of the power distribution lines L, L2 are applied through the transistors Tr, Tr2 to the loop point detector RyL incorporating the timer of the present invention.

Due to the action of the built-in time limit device, this investigation device RyL will open and close in sections after X seconds from that point if one end is without voltage, as shown in the time chart in Figure 3, after the voltage application time on both sides continues for Z seconds or more. The container S is configured to be inserted into the container S. Next, the detailed structure of the timer will be explained with reference to FIG. In FIG. 4, X and Z surrounded by two-dot chain lines represent an X timer and a Z timer, respectively. TR1 and TR2 are signal input transistors, TR3 is an X timer output circuit transistor, and TR4 is a Z timer recovery control transistor. In the X timer, FETI is a field effect transistor for driving the transistor TR3, FET2 is a field effect transistor that controls the timer function, CI is a capacitor for time-limiting the X timer, C2 is a holding capacitor, D1
, D2, D3 are both diodes for preventing wraparound, ZD
1, ZD2 is a Zener diode, R 1, R2, R3
, R4, R5, and R6 are all resistors. Next, to explain these connection relationships, the emitter of the input transistor TR2, which is supplied with a base current from the L2 side power supply, is connected to the negative bus N, and its collector is connected to the emitter of the LI side input transistor TRI. Ru.

The collector of the transistor TRI is connected to the cathode side of the diode DI, and its base is connected to one of the distribution lines L.
Receives I side voltage. Similarly, the voltage condition on the other distribution line IL2 side is applied to the base of the other transistor TR2. Connect the source and gate terminals of the field effect transistor FET2 that controls the timer function to the parallel circuit of the Jenner diode ZD1, the holding capacitor C2, and the discharging resistor R2 between the anode of the diode DI and the negative bus line N. . A series circuit of a charging resistor R1, a diode D3, and a time capacitor CI is constructed by connecting the resistor RI to the positive bus P, the negative side of the capacitor CI to the anode of the diode DI, and connecting the drain of the field effect transistor FET2 to the diode. Connect to the connection point of D3 and capacitor CI. The gate of the field effect transistor FETI for driving the transistor TR3 is connected to the connection point between the resistor RI and the anode of the diode D3, and the drain is connected to the positive bus P through the resistor R3.
Connect to. On the other hand, the source bias of FETI is connected to a separate circuit and receives a predetermined set voltage E2 (V). The output circuit transistor TR3 has its emitter connected to the positive bus P, and its base connected to a field effect transistor FET.
Connect to the drain of I. This output transistor TR
The three-way collector is connected to a closing circuit and a memory circuit of a closing control relay Y of a sectional switch (not shown). Next, like the diode DI, the diode D2 has its cathode connected to the collector of the input transistor TRI, and its anode connected to the connection point between the resistor R5 and the Zener diode ZD2.

This resistor R5, Jenner diode ZD2, and resistor R
The series circuit No. 6 is connected between the control buses P and N, and the base of the Z timer return control transistor TR4 is connected to the connection point between the Zener diode ZD2 and the resistor R6. The emitter of this transistor TR4 is connected to the negative bus, and the collector is connected to a Z timer circuit configured in the same manner as the X timer.

Since the Z timer has the same configuration as the X timer, corresponding symbols will be assigned and the explanation will be omitted. However, the settling time limits of the X timer and Z timer are set as shown in FIG. The contact Xa for the collective lock is a field effect transistor FE.
Connected between the source and gate of T2. Next, the operation of the device of the present invention will be explained.

First, when both side voltages L1 and L2 are applied to the timer, a voltage is applied between the PN bus lines and both input transistors TR1 and TR2 become conductive.

For this reason, the field effect transistor FE for timer function control
The potential difference between the gate and source of T2 becomes close to OV, and the drain and source are in a conductive state and the X time period is not counted. The Z timer recovery transistor TR4 becomes non-conductive. For this reason Z
The timer counts Z time periods. Even if a lock command is issued during the Z time period and the receiver contact Xa closes, the diode D
2, the Z timer recovery transistor TR4 maintains a non-conducting state. Therefore, while the state in which the voltages L1 and L2 are present on both sides continues, the Z time period continues to be counted, and the operation is completed. Then, when a collective lock release command is received, the receiver contact Xa is involved, so Z
If the L2 side voltage is lost after the timer operation is completed and only the LI side voltage is applied, the short circuit across the Jenner diode phantom DI is removed, the Jenner voltage Vzo is restored, and the drain of the field effect transistor FET2 for controlling the timer function is There is no conduction between the sources and the count of x time period starts.

If the response of the Z timer and the X timer is shown in a time chart, it is the same as that shown in FIG. 3 described above.

Next, a case where only the LI side voltage is applied will be explained.
In this case as well, voltage is applied to the P and N buses, but the L2 side voltage is not input and the other input transistor TR2 is non-conductive, so the holding capacitor C2 is not short-circuited at both ends and is charged through the resistor R4. Zener diode ZDI
rises to the Zener potential VzD. As a result, a Zener voltage Vzo is applied between the gate and source of the timer function control field effect transistor FET2, and the drain and
There is no conduction between the sources, and the time-limiting capacitor CI of the x timer is charged through the resistor RI. When the potential of this time-limiting capacitor CI rises, the potential of the gate of the field effect transistor FETI also rises, and the potential difference with the set potential B2 (V) applied to the source after X time period becomes less than a certain value, and the electric field for driving transistor TR3 effect transistor F
ETI becomes conductive and turns on the output circuit transistor TR3 to generate an output signal. Furthermore, even if the LI side power supply momentarily drops out during the
It gradually decreases due to the discharge time constant, so it remains in an unconductive state for a certain period of time. Therefore, when the power is restored immediately, the capacitor CI is charged again through the resistor RI and continues to count the x time period. When a collective lock command is issued while counting the X time period and the receiver contact Xa closes, the holding capacitor C2 is instantly discharged, and the potential difference between the gate and source of the field effect transistor FET2 for controlling the X timer function is reduced. Since it becomes OV, the drain and source become conductive, and the charge in the time limit capacitor CI of the x timer is instantly discharged, and the gate potential of the field effect transistor FETI for driving transistor TR3 is brought close to OV, and the count of the x time limit is stopped. do. In this way, the timer according to the invention can satisfy the following seven functions.

In other words, '11 When a batch lock command is received Investigator state before command Investigator state after command ■X time limit counting in progress.

→×Timed count canceled. ■Z time limit counting in progress. → Continue counting Z time period and memorize the result. ■The switch is being turned on.

→Keep the status as it is. '2' When the batch lock release command is input and ■X time count is stopped from the batch lock command input state.

→×Timed count resumed■Z timed count not completed in the case of.

→Even if one side of the power is turned on, it will stop turning on. ■When Z time limit count is complete.

→Counts X time in case of one side power supply.

■Lock while switch is closed With the instructions still in place If there was.

→Keep the status as it is. As described above, according to the present invention, when the re-closing relay is locked during an emergency disaster, the automatic closing function of the loop point section switch is locked all at once, and the lock of the re-closing relay is released. Since the lock of the loop point is also released, it is possible to obtain a time limit device for a time limit type accident investigation device for the loop point that does not interfere with regular automatic driving.

Note that the same function can be obtained by using a semiconductor circuit such as a transistor in place of the contact Xa of the receiver shown in FIG.

[Brief explanation of drawings]

Fig. 1 is a system diagram showing a general multi-loop high voltage distribution line, Fig. 2 is a conceptual configuration diagram showing the relationship between a loop point accident investigation device and a sectional switch, which is an example to which the present invention is applied. FIG. 3 is a time chart illustrating a part of the control function of the accident investigation device, and FIG. 4 is a circuit diagram showing a case where an embodiment of the timing device according to the present invention is applied to the accident investigation device. P, N... Control power bus, R1, R4...
Charging resistor, C1... Time limit capacitor, C
2... Holding capacitor, R2... Discharging resistor, FETI... Field effect transistor for driving output transistor, FET2... Field effect transistor for timer function control. Figure 1 Figure 2 Figure 3 Figure 4

Claims (1)

[Claims] 1 A holding capacitor is provided between the control power supply via a charging resistor and has a discharging resistor in parallel, and this holding capacitor is provided between the gate and the source, and is turned off when the charging voltage exceeds a predetermined value. A field-effect transistor for controlling the timer function, a time-limiting capacitor connected between the drain and source of the field-effect transistor for controlling the timer function as a discharging circuit, and a control power supply via a charging resistor, and the time-limiting capacitor for controlling the timer function. A field effect transistor for an output circuit that receives a charging voltage at its gate, receives a predetermined set voltage at its source, and further comprises an output circuit on its drain side and turns on when the charging voltage exceeds a predetermined value. A pair of signal input transistors are connected in series between both ends of the holding capacitors of the timer, Z time limit timer, and X time limit timer, and each receives a signal according to the voltage state from a different distribution line, and a pair of signal input transistors are connected in parallel with this pair of transistors. A switch element that is connected and closes when a collective lock command is issued to the connection point of the two distribution lines, and a switch element that is connected between the control power source and responds to the pair of signal input transistors or the collective lock command is turned off. and a circuit that shorts both ends of the time-limiting capacitor of the Z timer only when .