JPS6074327U

JPS6074327U - clip circuit

Info

Publication number: JPS6074327U
Application number: JP16651383U
Authority: JP
Inventors: 岩船　嘉助
Original assignee: 日本ビクター株式会社
Priority date: 1983-10-27
Filing date: 1983-10-27
Publication date: 1985-05-24

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

第１図は本考案回路を適用し得るノイズリダクション回
路の一例を示すブロック系統図、第２図及び第３図は夫
々従来のクリップ回路の各側を示す回路図、第４図は本
考案回路の第１実施例を示す回路図、第５図Ａ、　Ｂは
夫々第４図図示回路の動作説明用信号波形図、第６図は
本考案回路の第２実施例の要部を示す回路図である。１・・・・・・再生輝度信号入力端子、４・・・・・・
クリップ回路、６・・・・・・再生輝度信号出力端子、
７，１３゜１４．３０・・・・・・入力端子、１２．２
６．３６・・・・・・出力端子、３１〜３５．３７〜３
９・・・・・・定電流源、Ｑ１〜ＱＩＯ・・・・・・Ｎ
ＰＮトランジスタ、Ｃ□、　Ｃ２・・・・・・コンデン
サ。Figure 1 is a block diagram showing an example of a noise reduction circuit to which the circuit of the present invention can be applied, Figures 2 and 3 are circuit diagrams showing each side of a conventional clip circuit, and Figure 4 is the circuit of the present invention. 5A and 5B are signal waveform diagrams for explaining the operation of the circuit shown in FIG. 4, and FIG. 6 is a circuit diagram showing the main parts of the second embodiment of the circuit of the present invention. It is. 1...Reproduction brightness signal input terminal, 4...
Clip circuit, 6... Reproduction brightness signal output terminal,
7,13゜14.30... Input terminal, 12.2
6.36...Output terminal, 31~35.37~3
9... Constant current source, Q1~QIO...N
PN transistor, C□, C2... Capacitor.

Claims

[Scope of utility model registration request]

(1) First and second reference signal generation circuits that obtain reference signals related to DC components of first and second input signals that are in opposite phases to each other; and the first and second reference signal generation circuits. first and second transistors whose bases are supplied with a DC reference signal; first and second level shift circuits that shift the first and second input signals by a constant level; 1,
third and fourth transistors whose bases are supplied with the signal from the second level shift circuit; first and second constant current sources; and the emitters of the third and fourth transistors are connected to the first transistor.
, first and second resistors connected respectively to the emitter of the second transistor and the first and second constant current sources, and signals taken out from the collectors of the third and fourth transistors, respectively. A clipping circuit comprising a differential amplifier that dynamically amplifies and outputs a clipped signal of the first or second input signal.

(2) Each of the first to fourth transistors ct is NPN;
The clip circuit according to claim 1, which is a transistor.

(3) The first and second reference signal generation circuits include a capacitor for smoothing the first and second input signals, and means for causing a desired voltage drop in the signal supplied to the capacitor. A clip circuit according to claim 1 or 2 of the respective utility model registration claims.

(4) The first and second reference signal generation circuits are connected to third and fourth resistors that add and synthesize the first and second input signals, and the third and fourth resistors. a fifth resistor, one end of which is connected to a point, and one end of which is connected to the other end of the fifth resistor; Utility model registration claim 1 consisting of a constant current source that outputs a signal in common
The clip circuit according to item 1 or '2. \