JPS6073690A - Ecd driving method - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electrochromic display (hereinafter referred to as EC).
This relates to the driving method D).

Conventionally, for example, when a 5.times.7 dot ECD is driven in a matrix, even the ECDs that are not selected become colored or discolored, so 35 cells are driven individually. In other words, two interfaces, [erase] and "write", are required for each dot, and in a 5x7 dot ECD, there are a total of 70 interfaces.

Furthermore, displaying even more digits requires an enormous number of interfaces, which not only takes time and effort to manufacture, but also results in a large-scale device that lacks practicality. In addition, ECDs take longer to react than liquid crystals, etc. 1 For example, when using a standard ECD and its conventional driving method, it takes about 30 minutes to erase old characters to display a new character on the ECD. 1 second, it takes about 1 second to display a new character and about 2 seconds to react, so how to shorten the reaction time is an issue in the use of ECD.

The present invention has been made in view of the above-mentioned current situation, and provides a means for comparing the currently displayed number and the next number to be displayed and displaying only the necessary ECD dots, and a case of displaying multiple digits of the ECD. ECD that enables shortening of display time and downsizing of the device by using serial data transfer means
It provides a driving method, and only the ECD dots that are particularly required.

This relates to a driving force method for selectively creating erase and write data.

9- Hereinafter, the present invention will be explained in detail by one embodiment with reference to the drawings.

In this example, a 5×7 dot ECD display (2) was used as shown in FIG. According to Figure 2, the drive device (30) has a keyboard for inputting characters by the operator +t21.CRT O, o), CRT
video driver 04), CRT (
10) VRAM+ in which display data is stored
1til, serial interface (181, RAM+201.E which stores input characters, etc.) Transfers display signals to ROM (22), which stores pattern generators and processing programs for front thread on CD, and ECD drive (4) interface (26), c p TJ (241) that controls the whole, direct ECD display (2
), the ECD drive (4) that drives the EC for display
It consists of a D display section (2).

When the operator inputs characters etc. by operating the keyboard 41.21 while looking at -cRT (10), the input information is stored in the ROM (22+) in which dot patterned characters are stored. It is converted into a dot pattern according to the correspondence and is temporarily stored in RAM+201.

In said RAM M
The characters rAJ are between the 8-byte addresses of
A dot pattern of 1B'' is stored between the next 8-byte addresses from (n + 8) to (n + 8).

By the way, the ECD retains the previously displayed characters due to its memorability, which is a feature of the ECD.

In the present invention, in the ECD, the CPU (241
By doing this, if the state of the dot that was displayed last time and the dot that is displayed this time does not change, write data and erase data are not given to the dot that is newly displayed this time, and write data is applied to the dot that is newly displayed this time, and the state of the dot that is newly displayed this time is not changed. Erase data is now created. in fact,
Compare the dot pattern you displayed last time with the dot pattern you want to display this time (1st digit, 1st, 11th), first create an erase data, store it in RAM (201 memory, and repeat 5 times). This creates display data equivalent to one character in the first digit.In other words, one erase of the previous display for the ECD dot.
, and two operations of ``writing'' a new character are no longer necessary, and the character can be displayed with one operation of ``erase'' or ``write'' for each ECD dot. 5×
When erase data and write data are stored in memory for each dot of a 7-dot ECD, as shown in Figure 4 (6.5 dots of write data and erase data are stored between 70 bytes of memory). It turns out.

Based on the dot pattern characters temporarily stored in the RAM (201) and the dot pattern currently displayed on the ECD display section (2), the erase data and write data created by the CPU (24+) are transferred to the interface (26). ) Display column serial transfer is performed to the ECD driver (4).

5- ECD driver (4), D- connected in parallel to the interface (26) as shown in FIG.
F F (40) and an analog switch (421. (In the same figure, seven D - F F (40) for one row are shown together as one) 1 of the ECD display section (2) Corresponding to the column, there are I)-FF for erasing and D-FF for writing, and each of the above-mentioned D-F,
Connected to F, latches the signal from D-FF and connects E, C
There is an analog switch (421) that sends a signal to the ,D dot.Since E and CD consist of 5 columns, in order to display one digit of ECD, the D-FF for erase and write (40) and the analog switch (421) are used. Five sets of ri are required.

In order to explain the ECD driver (4) in more detail,
The IE and CD drive (4) for one column will be explained with reference to FIG. One row of D-FFs (4
0) consists of seven D-F, F (D-FF is indicated by F in the figure), and each 1"11 to Fi7 are connected to the interface (26).Fit to F1
7 is used for erase, F21 to F27 are used for writing, and F for erase and Fl for write each have one ECD dot (in the same figure, the ECD dots are used for S1 to S7). ). Also, each F
For analog switches (421 (A11 to A in the figure)
17 and A21 to A27 indicate respective analog switches. ) is connected, and the analog switch latches the signal from F and sends the signal to 31-8.7.

For example, the first row data is input from the interface (26) to Dll, which is the input terminal of the erase F11,
The output signal from terminal Q11 of Fll is F21 for writing.
The output signal from the terminal Q21 of F21 is further sent to F31 in the first row of the next column in sequence row by row.

Fll is connected to A11, F21 is connected to A21, and F
The signals from ll and F21 are latched by A21 and A21, and the SL is displayed.

In this way, each data is separated for each row of each ECD dot and transferred column serially, and sequentially moves to the next column and further to the next digit.

Specifically, a timing chart for the ECD driver (4) is shown in FIG. When changing the display state of the ECD from "LAST" to "NExT", the signal from the interface (26) is set to each terminal of F11 to F17, and after a time delay rdJ, the clock signal is At the rising edge, each D −F F (4q
) is latched with the same signal as the state of the D input. Next, the output from each Q becomes the D input of F21 to F2B of the next stage, and in the same way, it is transferred one after another to the next stage by clock pulses.

By the required number of latch pulses, the erase signal and write signal are determined at the positions D1 to D7 (D1 corresponds to the six EcD dots at the bottom of the "NExT" display). If you turn on the erase voltage circuit and write voltage circuit and turn them off after the time required for erasing and writing, the
The ECD display shown in "xT" is performed.

Here, two latch pulses are required for each row of ECD dots, one for erase and one for writing.
0 pieces are required. When 10 5x7 ECDs are arranged to display 10 digits, 10 (byte)/(1 digit) x 10 (digit) = 1oo (byte), that is, 100 clocks are set at each designated position. FIG. 8 is a flowchart of the transfer. Data is transferred from the memory corresponding to the memory address to the interface (26), and when the required number of transfer bytes are completed, the erase and write voltages are applied. , ECD display is performed. When a program written in machine language is executed based on such a flowchart, an 8-bit microprocessor such as A80, 6809 will be less than 2 QOus/1 digit,
In the case of 10 digits, each display driver can latch and output it in 2ms or less.

Here, the response speed of ECD takes about 1 second, so
The 2ms in the digit can be ignored, and even if we take a 100-digit display as an example, it is less than 20m5, so the display time is: 100-digit display time - 18 (ECD reaction time) + 20m5
Since 100 digits are displayed at the same time, it does not appear visually slow. That is, after the erase and write signals are transferred to the designated position, the erase and write voltages are applied to each segment, so that the time is displayed between each digit.

Above, we have explained the case of the 5x7 dot ECD display (2), but the 7 segment EcD driver, m
Systems such as Xn dot drivers and POP drivers can also be manufactured in the same manner.

As described above, the present invention produces the following effects.

In other words, the previous display state and the current display state are compared, and each ECD
By selectively applying ``erase'' or ``write'' data to the dots, the reaction time can be reduced by half, which is also effective in terms of power savings and longevity.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram showing a 5×7 don) E CD, FIG. 2 is a block diagram showing the device of the present invention, FIG. 3 is an explanatory diagram showing the memory state in the dot generator, and FIG. 5
×7 dots) An explanatory diagram of the display data in the memory corresponding to ECD, Figure 5 is a block diagram showing a 5 × 7 dot ECD driver for one digit, Figure 6 is a 5 × 7 dots for one column) EC
FIG. 7 is an explanatory diagram showing an ECD display example and a timing signal corresponding to the display example; FIG. 8 is a flowchart showing the transfer of display data. (2)...ECD display section (4)...ECD driver GO)...CRT (121...keyboard (1)
4)...Video driver (16)...V RAM
(I &... serial interface (201...
・RAM (2)...ROM (241...CPU(
26+...Interface (30)...Drive device (4υ...D-type flip-flop (D-FF) (
4. Analog Switch Patent Applicant Toppan Printing Co., Ltd. 11- Figure 2 Figure 7 Figure 8

Claims (1)

[Claims] This ECD driving method is characterized by comparing one dot pattern with the next display dot pattern (stored in memory) and creating erase data and write data only for ECD dots necessary for rewriting.