JPS607303A - Detecting method of coordinate-position - Google Patents

Abstract

PURPOSE:To achieve high performance, by canceling the effect of an offset voltage, which is generated at an analog part of a detecting circuit by obtaining the sum and the average value, thereby reducing the detection errors in input pen positions. CONSTITUTION:A reference signal e1 and a pen detecting signal are compared with a zero potential in comparators 3 and 4, respectively. The output signals are made to be pulse signals by monostable multivibrators. Namely, the rising part and the falling part of the output signal from the comparator 3 for the signal e1 are pulsed by the monostable multivibrators 51 and 52, respectively. An OR value is obtained by an OR circuit 12. The rising part and the falling part of the output signal from the comparator 4 for the input-pen detecting signal are pulsed by the monostable multivibrators 61 and 62, respectively. The outputs are added by an OR circuit 13. The outputs of the circuits 12 and 13 are inputted to the S terminal and the R terminal of an FF7. The clock signal of a reference oscillating device 9 is gated by a gate circuit 8 based on the output of the FF7. The number of the clocks after the gating are counted by a counter 10, and the phase difference is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION fal Technical Field of the Invention The present invention relates to a coordinate position detection method, and more particularly to a coordinate position detection method for accurately detecting a phase difference between a reference signal and a signal detected by an input pen.

(bl) Prior Art and Problems A tablet-type coordinate position detecting device using an input pen is known as an input device for an information processing machine.This coordinate position detecting device has recently been used in personal computers, etc., and demand has increased. It is in an increasing expansion.

One method of such a coordinate position detection device is to apply two alternating currents of equal frequency and different phases to opposing electrodes of a planar resistor, and detect the position of the input pen from the phase of the signal detected by the input pen. There is a method (electric field method) (see Japanese Patent Application No. 56-191004).

FIG. 1 shows a schematic diagram of such a coordinate position detection device, and FIG. 2 shows its signal operation diagram. Figure 1 shows a flat resistor 1.
Opposing electrodes DI in the X direction.

Although only D2 and the electrode changeover switches S1 and S2 connected thereto are shown, a similar electrode changeover switch is also provided in the Y direction, and the coordinate position of the input pen 2 is detected. Now, when detecting the X coordinate, switch Sl+32
is closed, and the two electrodes D1+' and D2 have the same frequency and amplitude, and the phase is φ &j and two different reference signals el
(phase θ) and a second signal e2 (phase θ+φ) are added. When the input pen 2 is brought close to the planar resistor l, a signal ep corresponding to the input position is generated due to the electrostatic coupling.
(phase θ+X) occurs, and the phase difference X (0<X<φ
) can be used to locate the input ben. Figure 2 (8
1 is the reference signal, the figure (bl is the second signal, figure 3 (C1
shows the signal detected by the input pen.

The detection circuit will be explained with reference to FIG. 1 and FIG. 2. The reference signal e1 shown in FIG. 2(a) is converted by the voltage comparator 3 into the signal shown in FIG. 2 fd+,
Furthermore, by the monostable multi-bi break 5 (Fig. 2 if)
It is converted into the signal shown in and output.

On the other hand, the signal ep detected from the input pen 2 passes through the amplifier A, is outputted by the comparator 4 as the signal shown in FIG. Ru.

The output from this monostable multi-bi break 5.6 is then converted by the RS flip-flop 7 into the signal shown in FIG. The number of clocks after the gate is counted by the counter 10 to determine the phase difference, and this is input to the conversion ROMII to detect the coordinate position. is the clock signal gated by the gate circuit, rXJ (j is the output value from the counter 10 (phase difference J).

In this way, the conventional detection method calculates the time or phase amount from the zero-crossing point (zero potential) of one of the AC signals (the reference signal in the above example) applied to both electrodes of the planar resistor to the zero-crossing point of the input pen detection signal. In other words, it was measuring the phase difference.

However, this conventional method has the disadvantage that if there is an offset in the threshold potential of the comparator, the phase difference between the reference signal and the input pen detection signal cannot be measured correctly, as shown in FIG. In the MS3 diagram, (al is the reference signal, (bl is the input pen detection signal, and (C) is the signal T1 that is erroneously output from the RS flip-flop due to the offset potential Bos. fd) is the signal T (T=
T, +t, +j2).

Such offsets exist not only in the comparator but also in all circuit parts of the device, such as the reference signal generation circuit and the input pen detection signal amplifier, and have exactly the same effect.
This causes a large error in the detection position of the input pen.

tc+ OBJECT OF THE INVENTION The object of the present invention is to provide an offset system using such a circuit.
To provide a coordinate position detection method in which the position of an input pen is correctly detected without being influenced by.

(dl Structure of the Invention The object is to apply a reference signal to one of the opposing electrodes of a planar resistor, add a second signal having the same frequency as the reference signal and a predetermined phase difference to the other, and In a coordinate position detection method in which the position of an input pen is detected by a signal detected by an input pen placed close to the surface of a flat resistor, the reference signal is a constant potential (zero potential or near zero potential) from the negative potential side. The time or equivalent phase amount from the moment when the signal detected by the input pen crosses the constant potential from the negative potential side to the positive potential side, and the time when the reference signal crosses the constant potential from the positive potential side to the positive potential side. Calculate the sum or average value of the time or the equivalent phase amount from the moment when the signal detected by the input pen crosses the constant potential from the positive potential side to the negative potential side, and calculate the value of the input pen. This is achieved by a coordinate position detection method that detects the position.

As a specific implementation means, the reference signal and the signal detected by the input pen are each compared with the constant potential by a voltage comparator, and the rising and falling edges of the output of the voltage comparator are converted into pulses, and the reference signal is The pulse obtained from the signal is connected to the S terminal of the RS flip-flop, the pulse obtained from the signal detected by the input pen is connected to the R terminal of the RS flip-flop, and the output from the RS flip-flop is controlled by the number of clocks. There is a coordinate position detection method in which the position of the input pen is detected from the counted value of the number of clocks.

In addition, as another specific implementation means, the reference signal and the signal detected by the input pen are each compared with the constant potential by a voltage comparator, and the output of the voltage comparator is inputted into an exclusive OR circuit. There is a coordinate position detection method in which the output from the exclusive OR circuit is converted into a clock number, and the position of the input pen is detected from the counted value of the black/seven number.

(el　Embodiments of the invention An embodiment will be described in detail below with reference to one drawing.

FIG. 4 is a signal operation diagram for explaining the phase difference detection method according to the present invention. The same figure (al is the reference signal, the figure f
bl is an input pen detection signal, tc+ in the same figure shows signals TI and T2 that are incorrectly output from the RS flip-flop due to the offset potential Eos, and (d) in the same figure is a signal T that should be correctly output from the RS flip-flop. It shows. In the same figure (C1 and (dl) TI + 72 =
The following relational expression holds true: (T t 1 t 2 ) + (TIt, +t, ,) 62T or (TI +72 ) / 2 =T. This is true if there is symmetry between the constant potential of the reference signal and the input pen detection signal and the threshold potential (threshold potential with an offset), and in reality, the constant potential is zero potential or a potential close to zero potential. This holds true because the amount of offcent is small.

FIG. 5 is a schematic diagram of an embodiment of the detection method according to the present invention, and FIG. 6 is a diagram of its signal operation, and the same parts as in the diagram explained above are given the same reference numerals. . As in FIG. 1, after the base sfi and the input pen detection signal are compared with zero potential by the comparators 3 and 4, the output signals are made into pulses by a monostable multivib break. The output signal from the reference signal comparator 3 is processed by a monostable multi-high break 5I that pulses the rising part (the moment the reference signal crosses the threshold from the negative potential side to the positive potential side) and the falling part (the moment the reference signal crosses the threshold from the negative potential side to the positive potential side). A monostable multi-vibration break 52 is provided, which converts the moment when the voltage crosses from the positive potential side to the negative potential side) into a pulse, and these are ORed.
A circuit 12 performs a logical sum.

Similarly, the output signal from the comparator 4 of the input pen detection signal is also provided with a monostable multi-by break 61 that pulses the rising part and a small stable multi-bi break 62 that pulses the falling part. OR circuit 13
Sum the sum.

6, ta+ is the reference signal, (bl is the second signal, (C) is the input pen detection signal, id) is the output signal from comparator 3, and (el is the output signal from comparator 4) Output signals (if) in the figure are pulse signals summed by the OR circuit 12, and gl (gl in the figure) are pulse signals summed by the OR circuit 13.

Further, the pulse signal summed by the OR circuit 12 on the reference signal side is input to the set <S> terminal of the RS flip-flop 7, and the pulse signal summed by the OR circuit 13 on the input pen detection signal side is input to the RS flip-flop 7. When input to the reset (R) terminal, the RS flip-flop outputs a signal as shown in FIG. 6 fhl. This output gates the clock signal from the reference oscillator 9 by a gate circuit 8, and the number of clocks after the gate is counted by a counter 10 to obtain a phase difference. FIG. 6(1) shows a gated clock signal,
fil indicates the output (sum of phase differences) from the counter.

In the embodiment shown in FIG. 5, the sum of two phase differences can be obtained for one period of the reference signal, but if you want to calculate the average value of the phase differences of 2''', the counter should be a binary counter. You can save money by ignoring the least significant bit of the output.

Next, FIGS. 7 and 8 show a schematic diagram and a signal operation diagram of another embodiment according to the present invention. The same figure numbers and the same parts as in FIGS. 5 and 6 are given the same reference numerals. In this example, the outputs from the two comparators 3.4 are input to the gate circuit 8 through the exclusive OR circuit 14, and by doing so, the circuit can be further simplified.

Effects of the Invention As is clear from the above explanation, according to the present invention, the phase difference between the reference signal and the input pen detection signal is not affected by the offset voltage generated in the analog part of the detection circuit. Since the input pen position is detected, the detection error of the input pen position is reduced.

Therefore, the coordinate position detecting device to which the present invention is applied is resistant to noise, eliminates the need for device adjustment, and has significantly improved performance.

[Brief explanation of the drawing]

FIG. 1 is a schematic diagram of a conventional coordinate reading device, FIG. 2 is a signal operation diagram thereof, FIG. 3 is a signal operation diagram showing problems with the conventional system, and FIG. 4 is a diagram showing a phase difference detection method of the present invention. Signal operation diagrams, FIGS. 5 and 6 are schematic diagrams of a coordinate reading device according to one embodiment of the present invention and its signal operation diagrams, and FIGS. 7 and 8 are coordinate diagrams of other embodiments according to the present invention. FIG. 2 is a schematic diagram of a reading device and its signal operation diagram. In the figure, 1 is a flat resistor, 2 is an input pen, 3 and 4 are comparators, and 5. 6.51.52.61.62 is monostable multi-by-break, 7 is RS flip-flop, 8 is gate circuit, 9 is reference oscillator, 10 is counter, 11 is conversion ROM, 12.13 is OR circuit, 14 is exclusive A logical sum circuit is shown. Figure 2 3rd UA

Claims (3)

[Claims] (1) A reference signal is connected to one of the opposing electrodes of the planar resistor,
A second signal having the same frequency as the reference signal and a predetermined phase difference is added to the reference signal, and the position of the input pen is detected by the signal detected by the input pen placed close to the plane resistor surface. In the coordinate position detection method, the time from the moment when the reference signal crosses the constant potential from the negative potential side to the positive potential side to the moment when the signal detected by the input pen crosses the constant potential from the negative potential side to the positive potential side. Alternatively, the equivalent phase amount and the time from the moment when the reference signal crosses the constant potential from the positive potential side to the negative potential side to the moment when the signal detected by the input pen also crosses the constant potential from the positive potential side to the negative potential side. Alternatively, the coordinate position detection method is characterized in that the position of the input pen is detected by calculating the sum or average value of the corresponding phase amount. (2), comparing the reference signal and the signal detected by the input pen with the constant potential by a voltage comparator, respectively;
The rising and falling edges of the output of the voltage comparator are converted into pulses, the pulse obtained from the reference signal is connected to the S terminal of the RS flip-flop, and the pulse obtained from the signal detected by the input pen is converted into RS. The RS flip-flop is connected to the R terminal of the flip-flop, the output from the RS flip-flop is converted into a clock number, and the position of the input pen is detected from the counted value of the clock number. The coordinate position detection method described in Range 1. (3) comparing the reference signal and the signal detected by the input pen with the constant potential by a voltage comparator, respectively;
The output of the voltage comparator is input into an exclusive OR circuit, the output from the exclusive OR circuit is converted into a clock number, and the position of the input pen is detected from the counted value of the clock number. A coordinate position detection method according to claim 1, characterized in that: