JPS6071965A - Capacity measuring device - Google Patents
Capacity measuring deviceInfo
- Publication number
- JPS6071965A JPS6071965A JP17911383A JP17911383A JPS6071965A JP S6071965 A JPS6071965 A JP S6071965A JP 17911383 A JP17911383 A JP 17911383A JP 17911383 A JP17911383 A JP 17911383A JP S6071965 A JPS6071965 A JP S6071965A
- Authority
- JP
- Japan
- Prior art keywords
- operational amplifier
- switch
- capacitance
- measured
- input terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
- G01R27/26—Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants ; Measuring impedance or related variables
- G01R27/2605—Measuring capacitance
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は微小容量を高精度に測定する容量測定装置に関
する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a capacitance measuring device that measures minute capacitances with high precision.
従、来、との種の装置としては第１図のごとき構成をと
るものがあった（参照文献（Ｐｒｏｃｅｅｄｉｎｇｓ
ｏｆＩＥＥＥ ｌ８８ＣＣ１９８２χこの第１図を用い
て従来構成における容量測定法の原理を説明する。第１
図において容量Ｃ１は被測定容量、容量Ｃ２は基準容量
である。今演算増幅器１の利得及び帯域幅が無限大で。In the past, there was a type of device with the configuration shown in Figure 1 (see Proceedings
of IEEE 188CC1982χ The principle of the capacitance measurement method in the conventional configuration will be explained using FIG. 1st
In the figure, capacitance C1 is the measured capacitance, and capacitance C2 is the reference capacitance. Now the gain and bandwidth of operational amplifier 1 are infinite.
演算増幅器１の直流的飽和を避ける為に設けられた抵抗
Ｒ及び積分器２により構成される系の直流帰還路のイン
ピーダンスが十分大きいとすると、入力交流信号３によ
和演算増幅器１の出力端にはＣ１／Ｃ２，倍の信号が現
われるため、もしＣ２の値が既知あれば被測定容量の容
量値を知ることとなる。Assuming that the impedance of the DC feedback path of the system consisting of the resistor R provided to avoid DC saturation of the operational amplifier 1 and the integrator 2 is sufficiently large, the input AC signal 3 causes the output terminal of the summing operational amplifier 1 to Since a signal multiplied by C1/C2 appears in , if the value of C2 is known, the capacitance value of the capacitor to be measured can be known.
・ しかしながらこの様な構成をとる測定法においては
演算増幅器１が非理想的すなわち有限の直流利得及び有
限の利得帯域中種金持つ場合に、前記抵抗Ｒと及び積分
器２と被測定容量Ｃ１で構成ばれる帰還路が存在するた
め、第１図の測定系は発振を生ずる場合があり、このた
め、基準容量Ｃ２は発振防止の機能もあわせ持たねばな
らなかった。- However, in a measurement method that uses such a configuration, when the operational amplifier 1 is non-ideal, that is, has a finite DC gain and a finite gain band, the resistance R, the integrator 2, and the capacitance to be measured C1 are Because of the presence of the feedback path, the measurement system of FIG. 1 may cause oscillation, and therefore the reference capacitor C2 had to also have the function of preventing oscillation.
このため、基か容１−０２の値はＣ１に比較して小さく
することが出来ず、前記測定電圧ＣＩ／Ｃ２を減少六せ
ることとなり測定制度の劣化をもたらしていた。For this reason, the value of the capacitance 1-02 cannot be made smaller than C1, and the measurement voltage CI/C2 has to be reduced, resulting in deterioration of measurement accuracy.
本発明はこの様な点に鑑みてなされたものであり測定精
塵の優れた容量測定装置を提供するととを目的とするも
のである。The present invention has been made in view of these points, and it is an object of the present invention to provide a capacitance measuring device with excellent measurement accuracy.
本発明は演算増幅器の直流的飽和を避ける為に設けられ
た同演算増幅器負入力端点への直流帰還路をスイッチＳ
ＷＩに置換したことにある。The present invention connects the DC feedback path to the negative input end point of the operational amplifier with a switch S, which is provided to avoid DC saturation of the operational amplifier.
The problem lies in replacing it with WI.
以下本発明を図面を参照して詳細に説明する。 The present invention will be explained in detail below with reference to the drawings.
第２図は本発明の一実施例を示すもので、第１図の従来
装置と異なる点は抵抗Ｒと積分器２で構成される演算増
幅器１の直流帰還路に代えて、演算増幅器１の入出力間
にスイッチ４を設けた点である。このような構成の動作
は次の通りである。FIG. 2 shows an embodiment of the present invention, which differs from the conventional device shown in FIG. The point is that a switch 4 is provided between the input and output. The operation of such a configuration is as follows.
つる時刻にスイッチ４を閉じ、演算増幅器１の負入力端
を直流バイアスする。もし演算増幅器１が利得無限下の
理桐的々ものであり、すべての端点にもれ電流がないと
すると、スイッチ４を開いた時に、演算増幅器１出力端
に交流信号３のＣ１／Ｃ２倍の電圧が現われる。この時
、スイッチ４は開いているため、帰還路は容ｔＣ２及び
Ｃ１だけにより構成され、従って位相まわりが生ぜず、
系は発振することがない。このため、基準容量Ｃ２は被
測定容量の値に応じて発振の恐れなく変化させることが
できる。従って非常に小さな容量値をも精度よく測定す
ることが可能となる。ただし実際の使用においては、演
算増幅器１等にもれ電流が存在するのでスイッチ４は適
宜開閉し、スイッチが開時において測定を行えばよい。At the closing time, the switch 4 is closed and the negative input terminal of the operational amplifier 1 is biased to DC. If the operational amplifier 1 is a logical type with an infinite gain and there is no leakage current at all end points, when the switch 4 is opened, the output terminal of the operational amplifier 1 will be C1/C2 times the AC signal 3. voltage appears. At this time, switch 4 is open, so the feedback path is made up of only capacitors tC2 and C1, so no phase shift occurs.
The system never oscillates. Therefore, the reference capacitance C2 can be changed according to the value of the capacitance to be measured without fear of oscillation. Therefore, it is possible to accurately measure even very small capacitance values. However, in actual use, since there is a leakage current in the operational amplifier 1, etc., the switch 4 may be opened and closed as appropriate, and the measurement may be performed when the switch is open.
本発明による容量測定装置は第２図の実施例に限定され
ることはない。例えば、前記第２図の信号源に直流オフ
セットを与えるごとき変形を考えると、被測定容量の容
量値がバイアス依存性をもつ素子の測定にも応用するこ
とができる。The capacitance measuring device according to the invention is not limited to the embodiment shown in FIG. For example, considering a modification in which a DC offset is applied to the signal source in FIG. 2, the present invention can also be applied to the measurement of elements in which the capacitance value of the capacitance to be measured is bias dependent.
さらに第３図で示される変形も又可能である。Furthermore, the variant shown in FIG. 3 is also possible.
この図ではスイッチ４をＭＯ１９ＦＥＴ ）ランジスタ
で作り、被測定容量をＭＯ８ＦＥＴトランジスタ５に寄
生する容量とした鳩舎である。信号源をＶＤ（Ｄ端）と
して励振させ、演算増幅器１の出力を観測するとＤ端と
Ｇ端の間に寄生する容量値を知ることができる。In this figure, the switch 4 is made of an MO19FET transistor, and the capacitance to be measured is a capacitance parasitic to the MO8FET transistor 5. By exciting the signal source as VD (D terminal) and observing the output of the operational amplifier 1, it is possible to know the parasitic capacitance value between the D terminal and the G terminal.
第１図は従来の容量測定装置を示す図、第２図は本発明
の一実施例を示す図、
第３図は本発明の他の実施例を示す図である。
１・・・演算増幅器、２・・・積分器、３・・・入力信
号、４・・・スイッチ
Ｃ１・・・被測定容量、 Ｃ２・・・基準容量。
代理人 弁理士 則近憲佑（ほか１名）第１図
第２図FIG. 1 is a diagram showing a conventional capacitance measuring device, FIG. 2 is a diagram showing one embodiment of the present invention, and FIG. 3 is a diagram showing another embodiment of the present invention. DESCRIPTION OF SYMBOLS 1...Operation amplifier, 2...Integrator, 3...Input signal, 4...Switch C1...Capacitance to be measured, C2...Reference capacitance. Agent: Patent attorney Kensuke Norichika (and 1 other person) Figure 1 Figure 2
Claims (3)
量の他端を演算増幅器の負入力端子に接続し、基準容ｔ
を前記演算増幅器の負入力端子及び出力端子の間に接続
し、前記演賛増幅器の正入力端子に直流バイアス信号を
印加し、さらに前記演算増幅器の負入力端子及び出力端
子を制御信号によ勺開閉可能なスイッチにより接続する
ことを特徴とする容量測定装置。(1) Apply the original signal from one end of the measuring capacitor, connect the other end of the capacitor to be measured to the negative input terminal of the operational amplifier, and connect the reference capacitor t.
is connected between the negative input terminal and the output terminal of the operational amplifier, a DC bias signal is applied to the positive input terminal of the amplifier, and the negative input terminal and the output terminal of the operational amplifier are controlled by the control signal. A capacitance measuring device characterized in that it is connected by a switch that can be opened and closed.
生する容量であることを特徴とする特許請求の範囲第１
項記載の容量測定装置。(2) The capacitance to be measured is a capacitance parasitic to a transistor (MOSFET).
Capacitance measuring device as described in section.
特許請求の範囲第１項記諦の容量測定装置。(3) The capacitance measuring device according to claim 1, wherein the switch is comprised of a FET.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17911383A JPS6071965A (en) | 1983-09-29 | 1983-09-29 | Capacity measuring device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17911383A JPS6071965A (en) | 1983-09-29 | 1983-09-29 | Capacity measuring device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6071965A true JPS6071965A (en) | 1985-04-23 |
Family
ID=16060235
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17911383A Pending JPS6071965A (en) | 1983-09-29 | 1983-09-29 | Capacity measuring device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6071965A (en) |
-
1983
- 1983-09-29 JP JP17911383A patent/JPS6071965A/en active Pending
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