JPS6070921U - Tape recorder control circuit - Google Patents
Tape recorder control circuitInfo
- Publication number
- JPS6070921U JPS6070921U JP16213883U JP16213883U JPS6070921U JP S6070921 U JPS6070921 U JP S6070921U JP 16213883 U JP16213883 U JP 16213883U JP 16213883 U JP16213883 U JP 16213883U JP S6070921 U JPS6070921 U JP S6070921U
- Authority
- JP
- Japan
- Prior art keywords
- gate circuit
- tape recorder
- switch
- control circuit
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Management Or Editing Of Information On Record Carriers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
図は本考案のテープレコーダの制御回路図である。
１ａ、１ｂ・・・第１、第２スイツチ、２ａ、２ｂ・・
・第１、第２ナンド回路、５・・・ダビングスイッチ、
７・・・第１トランジスタ、８〜１１・・・第２〜第５
トランジスタ、１２ａ、１２ｂ・・・第１、第２モータ
、１３・・・時定数回路。The figure is a control circuit diagram of the tape recorder of the present invention. 1a, 1b...first, second switch, 2a, 2b...
・First and second NAND circuits, 5... dubbing switch,
7...first transistor, 8-11...second-fifth transistor
Transistors, 12a, 12b...first and second motors, 13...time constant circuit.
Claims (1)
されスライドベースが非動作位置に復帰されるとオフさ
れる第１、第２スイツチと、前記第１、第２スイツチに
て制御される第１、第２ゲート回路と、該第２ゲート回
路を強制的に非動作状態にする非動作電圧を前記第２ゲ
ート回路に加えるダビングスイッチと、第１ゲート回路
の出力信号にて制御され前記非動作電圧が第２ゲート回
路に加えられるのを阻止する阻止トランジスタと、第１
、第２ゲート回路の出力信号にて制御さ−れそれぞれモ
ータを動作不動作させる制御トランジスタと、第２スイ
ツチがオフされるときに暫時前記制御トランジスタをオ
ンさせるオン電圧を供給する時定数回路とよりなるテー
プレコーダの制御回路。first and second switches that are kept in the on state by pressing a push button and are turned off when the slide base is returned to the non-operating position; and a first switch that is controlled by the first and second switches. , a second gate circuit, a dubbing switch that applies a non-operating voltage to the second gate circuit to force the second gate circuit into a non-operating state; a blocking transistor that prevents voltage from being applied to the second gate circuit;
, a control transistor that is controlled by the output signal of the second gate circuit and disables the motor, and a time constant circuit that supplies an on-voltage that temporarily turns on the control transistor when the second switch is turned off. A tape recorder control circuit consisting of:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16213883U JPS6070921U (en) | 1983-10-19 | 1983-10-19 | Tape recorder control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16213883U JPS6070921U (en) | 1983-10-19 | 1983-10-19 | Tape recorder control circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6070921U true JPS6070921U (en) | 1985-05-20 |
| JPH0119244Y2 JPH0119244Y2 (en) | 1989-06-05 |
Family
ID=30356133
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16213883U Granted JPS6070921U (en) | 1983-10-19 | 1983-10-19 | Tape recorder control circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6070921U (en) |
-
1983
- 1983-10-19 JP JP16213883U patent/JPS6070921U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0119244Y2 (en) | 1989-06-05 |
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