JPS6070805A - Circuit for preventing output fluctuation due to power supply of transistor circuit - Google Patents
Circuit for preventing output fluctuation due to power supply of transistor circuitInfo
- Publication number
- JPS6070805A JPS6070805A JP58178788A JP17878883A JPS6070805A JP S6070805 A JPS6070805 A JP S6070805A JP 58178788 A JP58178788 A JP 58178788A JP 17878883 A JP17878883 A JP 17878883A JP S6070805 A JPS6070805 A JP S6070805A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- power supply
- circuit
- base
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
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Abstract
Description
【発明の詳細な説明】
（１）発明の技術分野
本発明は所定ベース電圧によってエミッタ電流を定め、
その電流値によって負荷回路を制御するトランジスタ回
路の電源電圧が変動してもエミッタ電流を一定に保つよ
うにした電源の変動による出力変動の防止回路に関する
ものである。DETAILED DESCRIPTION OF THE INVENTION (1) Technical field of the invention The present invention defines an emitter current by a predetermined base voltage,
The present invention relates to a circuit for preventing output fluctuations due to fluctuations in the power supply, which maintains an emitter current constant even if the power supply voltage of a transistor circuit that controls a load circuit changes depending on the current value.
（２）従来技術と問題点
従来、第１図に示すような一コレクタ側を負荷回路２を
介して接地し、エミッタ側に抵抗（Ｒ１）３を介して電
源電圧−■を供給するトランジスタ１において、ベース
電圧Ｅによってエミッタ電流を定め、その電流値によっ
て負荷回路２を制御し、コレクタから出力を取出すトラ
ンジスタ回路が多用される。(2) Prior art and problems Conventionally, as shown in FIG. 1, a transistor 1 whose collector side is grounded via a load circuit 2 and whose emitter side is supplied with a power supply voltage -■ via a resistor (R1) 3 In this case, a transistor circuit is often used in which the emitter current is determined by the base voltage E, the load circuit 2 is controlled by the current value, and the output is taken out from the collector.
この場合の問題点は、電源電圧＝■が電源変動によシー
ｖ＋△τ だけ変動した時、Ｅは固定すると、トランジ
スタ１のエミッタに流れる電流は無変動時よシも署円（
Ａ）増えることになり、負荷回路２の出力が変動する。The problem in this case is that when the power supply voltage = ■ fluctuates by v+△τ due to fluctuations in the power supply, if E is fixed, the current flowing to the emitter of transistor 1 will be smaller than when there is no fluctuation.
A) The output of the load circuit 2 will fluctuate.
これに対し、第２図に示すように、ベースから抵抗（ｒ
ｌ ） ４を介して電源電圧−Ｖと接地間の分圧抵抗（
デ２）５と（τ３）６の分圧点に接続し、この点がベー
ス電圧Ｅとなるように設定する。この場合の変動はΔτ
×□となシ、軽減はできるｒ３＋４”２
が不充分である。また第３図に示すように、エミッタ回
路に抵抗（Ｒ１）３と直列に抵抗（Ｒ４Ｎ接続し、その
接続点に定電圧ダイオード８を接続し、所定電位を保持
する。しかし、とくにトランジスタに流れる電流が大き
い場合には消費電力の増大を招き好ましくない。On the other hand, as shown in Figure 2, the resistance (r
l) Voltage dividing resistor (
Connect to the voltage dividing point of D2)5 and (τ3)6, and set this point to be the base voltage E. The variation in this case is Δτ
×□, r3+4"2 which can be reduced is insufficient. Also, as shown in Figure 3, a resistor (R4N) is connected in series with resistor (R1) 3 in the emitter circuit, and a constant voltage is applied to the connection point. A diode 8 is connected to maintain a predetermined potential.However, especially when the current flowing through the transistor is large, power consumption increases, which is undesirable.
（３）発明の目的
本発明の目的はトランジスタ回路の電源電圧が変動して
もエミッタ電流を高精度に一定に保つようにした電源に
よる出力変動の防止回路を提供することである。(3) Object of the Invention An object of the present invention is to provide a circuit for preventing output fluctuations caused by a power supply, which keeps the emitter current constant with high precision even if the power supply voltage of a transistor circuit fluctuates.
（４）発明の構成
前記目的を達成するため、本発明の電源による出力変動
の防止回路は所定ベース電圧によってエミッタ電流を定
め、その電流値によって負荷回路を制御するトランジス
タ回路において、前記所定ベース電圧を一方の入力とし
、電源電圧の抵抗分圧による所定バイアスを他方の入力
とじた演算増幅器を前記トランジスタのベースに接続し
、電源電圧の変動に応じベース電圧を変化してエミッタ
電流を一定に保つようにしたことを特徴とするものであ
る。(4) Structure of the Invention In order to achieve the above object, the circuit for preventing output fluctuation due to a power supply of the present invention determines an emitter current based on a predetermined base voltage, and in a transistor circuit that controls a load circuit based on the current value, An operational amplifier is connected to the base of the transistor, with one input having a predetermined bias applied to the other input by resistor division of the power supply voltage, and the emitter current being kept constant by varying the base voltage in response to fluctuations in the power supply voltage. It is characterized by the following.
（５）発明の実施例
本発明の原理は、第２図の電源電圧−■と接地間の分圧
抵抗の分圧点に接続する方式を改善し、演算増幅器を用
いて電源電圧の変動分△τだけＥを変化させ、エミッタ
電流を一定に保つことを考えたものである。(5) Embodiments of the Invention The principle of the present invention is to improve the method of connecting the voltage dividing point of the voltage dividing resistor between the power supply voltage -■ and ground in Fig. 2, and use an operational amplifier to compensate for fluctuations in the power supply voltage. The idea is to change E by Δτ and keep the emitter current constant.
第４図は本発明の実施例の構成説明図である。FIG. 4 is an explanatory diagram of the configuration of an embodiment of the present invention.
同図において、トランジスタ１のベースに対し、負帰還
抵抗（Ｒ２）１１を設けた演算増幅器１０の出力を与え
、その負端子入力として抵抗（Ｒ３）１２を介し固定電
圧Ｅを、正端子入力として抵抗（几４）１３を介して、
電源電圧−■と接地間に設けた分圧抵抗（Ｒ５）１４と
（Ｒ６）１５の分圧点の電圧ＶＯを加えるようにする。In the figure, the output of an operational amplifier 10 provided with a negative feedback resistor (R2) 11 is applied to the base of a transistor 1, and a fixed voltage E is applied as its negative terminal input via a resistor (R3) 12, and as its positive terminal input. Through the resistor (几4) 13,
The voltage VO at the voltage dividing point of the voltage dividing resistors (R5) 14 and (R6) 15 provided between the power supply voltage -■ and the ground is applied.
この回路において、演算増幅器１０の正端子人力（Ｖ）
だけ増加した電圧が入力されることになる。In this circuit, the positive terminal human power (V) of the operational amplifier 10
Therefore, the voltage increased by this amount will be input.
演算増幅器の出力、すなわちトランジスタ１のベースに
加える電圧をＢｂとすれば、演算増幅器の使用時特性か
ら、
Ｒ６＝脅）（Ｖｏ−Ｅ） ＋Ｖｏ （”）いま、電源変
動時、ｖｏがＶＯ＋△Ｖとなった時、ＢｂがＥｂ＋△ｇ
ｂとなったものとすれば、２
Ｅ６＋△Ｅｂ＝ （Ｖｏ＋ΔＶ、−Ｅ）＋Ｖ、＋ΔＶｏ
（２）従ッテ△Ｅｂ＝△Ｖｏ（１＋””） （３）３
前述によシ Δ■ｏ−」Ｌ−△ｖ（４）Ｒ５＋Ｒ６
式（３）と（４）から
ΔＥｂ＝（Ｒ５−△τ）（１＋堅）
Ｒ５＋几６ 部 （５）
式（５）において−Ｒ５＝ Ｒ５−とおけばＲ５十几６
Ｒ２＋Ｒ３
△Ｅｂ ＝△ｖ（６）
となシ、トランジスタ１０ベースの変動△Ｅｂを電源電
圧−■の変動ムラと等しくすることができる。If the output of the operational amplifier, that is, the voltage applied to the base of transistor 1, is Bb, then from the operating characteristics of the operational amplifier, R6 = Threat) (Vo-E) +Vo ('') Now, when the power supply fluctuates, vo becomes VO + △ When it becomes V, Bb becomes Eb+△g
b, then 2 E6+△Eb= (Vo+ΔV, -E)+V, +ΔVo
(2) According to the above, △Eb = △Vo (1 + “”) (3) 3 According to the above, ∆■o-” L - △v (4) R5 + R6 From equations (3) and (4), △Eb = (R5 -△τ) (1 + solid) R5 + 6 parts (5) If -R5 = R5- in formula (5), R5 10 6 parts
R2+R3 ΔEb = Δv (6) Therefore, the fluctuation ΔEb of the base of the transistor 10 can be made equal to the fluctuation unevenness of the power supply voltage -■.
よってこの回路によれば、−■の変動による工ぐツタ電
流の変化、すなわち負荷回路２の出力の変化は生じない
。Therefore, according to this circuit, a change in the output current due to a change in -■, that is, a change in the output of the load circuit 2 does not occur.
（６）発明の詳細
な説明したように、本発明によれば、トランジスタ の
ベースに演算増幅器を接続し、この一方の入力に固定の
ベース電圧Ｅを、他方の入力に電源電圧と接地間の分圧
抵抗の分圧点の電圧を与えることによシ、定数を適当に
設定すればベース変動を電源電圧変動に等しくすること
ができ、エミッタ電流を高精度に一定に保持し、従って
負荷回路の出力を常に一定とすることができ芯。(6) As described in detail, according to the present invention, an operational amplifier is connected to the base of the transistor, a fixed base voltage E is applied to one input of the operational amplifier, and a voltage between the power supply voltage and the ground is applied to the other input. By giving the voltage at the voltage dividing point of the voltage dividing resistor, if the constant is set appropriately, the base fluctuation can be made equal to the power supply voltage fluctuation, and the emitter current can be kept constant with high precision, thus making it possible to control the load circuit. The output of the wick can always be kept constant.
第１図〜第３図はそれぞれ従来例の構成説明図、第４図
は本発明の実施例の構成説明図であシ、図中、１はトラ
ンジスタ、２は負荷回路、１０は演算増幅器、３，１１
．１２，１３，１４．１５は抵抗を示す。
特許出願人 富士通株式会社
復代理人 弁理士 １）坂 善 重1 to 3 are respectively explanatory diagrams of the configuration of the conventional example, and FIG. 4 is an explanatory diagram of the configuration of the embodiment of the present invention. In the figures, 1 is a transistor, 2 is a load circuit, 10 is an operational amplifier, 3,11
．． 12, 13, 14.15 indicate resistance. Patent applicant Fujitsu Ltd. sub-agent Patent attorney 1) Yoshishige Saka
Claims (1)
値によって負荷回路を制御するトランジスタ回路におい
て、前記所定ベース電圧を一方の入力とし、電源電圧の
抵抗分圧による所定バイアスを他方の入力とした演算増
幅器を前記トランジスタのベースに接続し、電源電圧の
変動に応じベース電圧を変化してエミッタ電流を一定に
保つようにしたことを特徴とするトランジスタ回路の電
源による出力変動の防止回路。In a transistor circuit in which an emitter current is determined by a predetermined base voltage and a load circuit is controlled by the current value, an operational amplifier is provided with the predetermined base voltage as one input and a predetermined bias obtained by resistor division of the power supply voltage as the other input. A circuit for preventing output fluctuations caused by a power supply of a transistor circuit, characterized in that the circuit is connected to the base of the transistor and changes the base voltage according to fluctuations in the power supply voltage to keep the emitter current constant.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58178788A JPS6070805A (en) | 1983-09-27 | 1983-09-27 | Circuit for preventing output fluctuation due to power supply of transistor circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58178788A JPS6070805A (en) | 1983-09-27 | 1983-09-27 | Circuit for preventing output fluctuation due to power supply of transistor circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6070805A true JPS6070805A (en) | 1985-04-22 |
| JPH0155767B2 JPH0155767B2 (en) | 1989-11-27 |
Family
ID=16054646
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58178788A Granted JPS6070805A (en) | 1983-09-27 | 1983-09-27 | Circuit for preventing output fluctuation due to power supply of transistor circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6070805A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4532041A (en) * | 1983-05-13 | 1985-07-30 | Exxon Research And Engineering Co. | Asymmetric polyimide reverse osmosis membrane, method for preparation of same and use thereof for organic liquid separations |
-
1983
- 1983-09-27 JP JP58178788A patent/JPS6070805A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4532041A (en) * | 1983-05-13 | 1985-07-30 | Exxon Research And Engineering Co. | Asymmetric polyimide reverse osmosis membrane, method for preparation of same and use thereof for organic liquid separations |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0155767B2 (en) | 1989-11-27 |
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