JPS6068414A - Generating circuit of reference voltage - Google Patents

Generating circuit of reference voltage

Info

Publication number
JPS6068414A
JPS6068414A JP17620683A JP17620683A JPS6068414A JP S6068414 A JPS6068414 A JP S6068414A JP 17620683 A JP17620683 A JP 17620683A JP 17620683 A JP17620683 A JP 17620683A JP S6068414 A JPS6068414 A JP S6068414A
Authority
JP
Japan
Prior art keywords
elements
voltage
circuit
reference voltage
same
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17620683A
Other languages
Japanese (ja)
Inventor
Kozaburo Kurita
公三郎 栗田
Masahiro Ueno
雅弘 上野
Takashi Sase
隆志 佐瀬
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP17620683A priority Critical patent/JPS6068414A/en
Publication of JPS6068414A publication Critical patent/JPS6068414A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is dc
    • G05F3/10Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/24Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
    • G05F3/242Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage
    • G05F3/245Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage producing a voltage or current as a predetermined function of the temperature

Abstract

PURPOSE:To obtain a generating circuit of reference voltage having high temperature stability by using two MOS elements connected in parallel to each other that have the same conduction type, the same threshold voltage and same size as the 1st or 2nd MOS element which extracts the reference voltage and a bias circuit to constitute a constant current source. CONSTITUTION:A series circuit of a depression type NMOS element 11 and a resistance 13 is connected in parallel to a series circuit of an enhancement type NMOS element 12 and a resistance 14. An end of this series circuit is connected to a battery voltage terminal 2; while the other end is grounded via a parallel circuit of MOS elements 31 and 32. The voltages at junctions between elements 11/12 and resistances 13/14 are connected to an operational amplifier 21. The output of the amplifier 21 is fed back to the gate of the element 12. The elements 31 and 32 have the same conduction type as the elements 11 and 12 together with the same threshold voltage and same size respectively. A constant voltage source 30 supplies the bias voltage to the elements 31 and 32. The gate of the element 11 is grounded. Thus it is possible to obtain the reference voltage having high temperature stability at an output terminal 1 by controlling the size ratio between elements 11 and 12 and the temperature coefficient of the bias voltage.

Description

【発明の詳細な説明】 〔究明の利用分野〕 本発明は基準電圧発生回路に係り1特に、減反に対して
安定な基早鵡圧を得ることのできる基準゛4電圧生回路
に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Investigation] The present invention relates to a reference voltage generation circuit, and particularly to a reference voltage generation circuit capable of obtaining a stable basic mass pressure with respect to veneer reduction.

〔究明の背景〕[Background of the investigation]

従来の基準電圧発生回路の一例として、IEEEJou
rhal of 5olid−8tate C1rcu
it、 VOI、 S C−13,ho、 6. p、
p、767−774.1)ec、1978”’C<DB
、 A、 B1auschild他によるrANeWN
MO8Tewperature−8table Vol
tagel(、eferenceJで第1図の回路が提
案されている。
As an example of a conventional reference voltage generation circuit, IEEEJou
rhal of 5olid-8tate C1rcu
it, VOI, SC-13, ho, 6. p,
p, 767-774.1) ec, 1978"'C<DB
, A. rANeWN by B1auschild et al.
MO8Tewperature-8table Vol.
The circuit shown in FIG. 1 has been proposed in EfferenceJ.

図に2いて、llはデプレンショ/形NMO8素子であ
fi、12はエンハンスメント形NMO8素子でめる。
In the figure, 11 is a depletion/type NMO8 element fi, and 12 is an enhancement type NMO8 element.

MO8素子llと抵抗13の直列回路およびMO8累子
l2と抵抗14の直列回路は並列に越続され、その一端
は′屯TM、−圧端子2に接続され、他端は定−流源2
0に接続されている。抵抗13とMO8累子1lの嵌成
点と、抵抗14とMO8系子12の皮就点とは、演算増
幅器21に接続されている。演算増1隔器20の出力は
、MO8緒子1ZGりゲート1C帰還され、mos素子
11と12のそれぞれのドレイン・ンース電圧を等しく
するように制御しておシ、抵抗13と14のイ7ピーダ
/スを等しくすることによ!D、MO8素子11と12
に2の2の流れる電流を等しくしている。MO8素子1
1のゲートを接地することにより、MO8素子12のゲ
ートに接続された出力端子から、MO8素子11と12
のゲート−ンース電圧差全基準成圧として得ている。
The series circuit of the MO8 element 11 and the resistor 13 and the series circuit of the MO8 regulator 12 and the resistor 14 are connected in parallel, one end of which is connected to the -voltage terminal 2, and the other end is connected to the constant-current source 2.
Connected to 0. A fitting point between the resistor 13 and the MO8 resistor 1 l and a connecting point between the resistor 14 and the MO8 resistor 12 are connected to an operational amplifier 21 . The output of the operational amplifier 1 separator 20 is fed back to the MO8 gate 1ZG gate 1C, and is controlled to equalize the drain-to-source voltages of the MOS elements 11 and 12. By making P/S equal! D, MO8 elements 11 and 12
The current flowing through 2 and 2 is made equal. MO8 element 1
By grounding the gate of MO8 element 1, the output terminal connected to the gate of MO8 element 12 can be connected to MO8 elements 11 and 12.
The gate-to-back voltage difference is obtained as the total reference pressure.

ところで、MO8素子のゲート・ンース電圧をVt、、
シきい通圧全VthX芙効移wJ匿をμ、チャネル長を
L1チャネル幅をW1単位面積当)のゲート容址をC0
工とすると、MO8累子0飽和領域動作時のドレイン4
流Idは、 と表わされ心。従って、ゲート・ソース1圧V z s
は、 となる。
By the way, the gate-to-source voltage of the MO8 element is Vt,
The gate capacity (per unit area) is C0 where the threshold voltage (total VthX)
Drain 4 when operating in MO8 regulator 0 saturation region
The flow Id is expressed as the heart. Therefore, the gate-source voltage V z s
becomes .

(3) 第1図で、MO8素子11.12のしきい直圧をVt+
+H、VthI2、実効’lk動ek μt+、μ+2
、チャネル長をLt++Ltt、チャネル幅をW、、、
W、とする。
(3) In Figure 1, the threshold direct pressure of MO8 element 11.12 is Vt+
+H, VthI2, effective 'lk movement ek μt+, μ+2
, the channel length is Lt++Ltt, and the channel width is W.
Let it be W.

MO8素子ii、12に流れる′電流に寺しくなるため
、この電流を工とすると、MO8索子llと12のゲー
ト・ソース電圧差でらる出力基準電圧Vr * f は
、(2)式より、 Vrer = (Vth、2−vL hll )となる
。(3)式より、出力基準上圧の温度係数・・・・・・
(4) となる。
Since the current flowing through the MO8 elements ii and 12 becomes unstable, if this current is used as a function, the output reference voltage Vr * f, which is the gate-source voltage difference between the MO8 elements ll and 12, is calculated from equation (2). , Vrer = (Vth, 2-vL hll ). From equation (3), the temperature coefficient of the output standard upper pressure...
(4) It becomes.

実効移動度μの温度変化について考えると、夾効移dJ
度μは絶対温度Tの指数関数で表わすことができる。従
って、温度T、のときの実効移動度をμ。、実効移動度
の温度指数をαとすると、実効#動度μは、 と表わされる。(5)式よシ、実効移動度の温度係数M
O8素子で、格子散乱がキャリアの散乱を支配している
ため、実効#−励度の製置指数αは理論的には−1,5
であシ実測値でも約−1,5と一定となる。従って、(
4)式へ(6)式を代入すると、出力基進となる。
Considering the temperature change of the effective mobility μ, the effective mobility dJ
The degree μ can be expressed as an exponential function of the absolute temperature T. Therefore, the effective mobility at temperature T is μ. , when the temperature index of effective mobility is α, the effective #mobility μ is expressed as follows. According to equation (5), temperature coefficient M of effective mobility
In an O8 element, since lattice scattering dominates carrier scattering, the effective #-excitation exponent α is theoretically -1.5.
Even the actual measured value is constant at about -1.5. Therefore, (
Substituting equation (6) into equation (4) yields the output base.

MO8素子11.12に流れる′−流■とその温第1図
の基準電圧発生回路では、定電流源20の影響をなくす
ため、差動対のMO8素子11.12うに、MO8素子
11,120寸法比W/Lを決める。このときの出力基
準4圧Vr # fと、その温度Vret=(VtbB
Vtム1.)・・・・・・・・・(8)となる。
In the reference voltage generation circuit shown in FIG. Determine the size ratio W/L. At this time, the output reference 4 pressure Vr # f and its temperature Vret = (VtbB
Vtmu1. )......(8).

ところで、しきい電圧差(Vtb42 VtbH)は若
干の温度係数を持っている。例えば、MO8素子12の
チャネル部へ燐忙イオ/打込みして、MO8素子11の
しきい1圧金小さくしてしさい電圧差(V=h1z V
tb+t ) k得た場合、しきい電圧差(VthI2
 VtbH)は0.5 m V/ CCDfMJl係i
’を持つ。従って、基準電圧Vr * fも若干の温度
係数金持つことになる。
By the way, the threshold voltage difference (Vtb42 VtbH) has a slight temperature coefficient. For example, by implanting phosphorous ions into the channel part of the MO8 element 12 and reducing the threshold voltage of the MO8 element 11, the voltage difference (V=h1z V
tb+t) If k is obtained, the threshold voltage difference (VthI2
VtbH) is 0.5 m V/CCDfMJl
'have. Therefore, the reference voltage Vr*f also has a slight temperature coefficient.

MO8素子11.12の寸法比、定電流源20の′成流
値2よびその温度係数を設定する必要がある。
It is necessary to set the size ratio of the MO8 elements 11 and 12, the current flow value 2 of the constant current source 20, and its temperature coefficient.

このため、定電流6g20は、電流の絶対値とその温度
係数を要求されるため、回路構成が複雑となる問題がめ
った。
For this reason, since the constant current 6g20 requires the absolute value of the current and its temperature coefficient, a problem frequently arises in that the circuit configuration becomes complicated.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、温度安定な基準電圧を得ることのでき
る基準也圧尤生回路を提供するにある。
An object of the present invention is to provide a reference voltage generating circuit that can obtain a temperature-stable reference voltage.

〔兄明の概要〕[Overview of Brother Mei]

本発明の特徴は、異なるしきい電圧を持つ同導電形の一
対のMO8素子に、等しい直流を流したときのゲート・
ソース畦圧差を基準電圧として発生する基準電圧発生回
路に2いて、一対のMO8素子ヘシ流直流給する足4流
源を一対のMO8素子どちらか一方と同等′4形で、か
つ、しきい電圧と素子寸法の等しいMO8素子二つの並
列回路とバイアス回路とで構成しfcことに16゜以下
、本発明の一実施例を第2図によシ説明する。第2図に
2いて、31.32はMoS索子l12と同導電形で、
かつ、しきい電圧と素子寸法の等しいMO8素子でめり
、30はMO8素子30.31へバイアス電圧を供給す
る定電圧源である。MO8素子31.32と冗成圧[3
0は定電流源として動作する。MO8素子31.32に
流れる成流工は、MO8素子31.32とMO8素子1
2が同導電形で、かつ、同じしきい電圧と素子寸法でろ
るkめ、MO8素子31,320)(イアスミ圧をyb
とすると、(1)式よりと表わすことができる。
The feature of the present invention is that when an equal direct current is passed through a pair of MO8 elements of the same conductivity type with different threshold voltages, the gate
In the reference voltage generation circuit that generates the source voltage difference as a reference voltage, a pair of MO8 elements are connected to a four-current source that supplies direct current to one of the MO8 elements, and the threshold voltage is equal to one of the two MO8 elements. An embodiment of the present invention will be described with reference to FIG. 2, which is composed of a parallel circuit of two MO8 elements having the same element dimensions, and a bias circuit, fc being less than 16 degrees. 2 in Figure 2, 31.32 is the same conductivity type as MoS cord l12,
Furthermore, the MO8 elements having the same threshold voltage and the same element size are used, and 30 is a constant voltage source that supplies a bias voltage to the MO8 elements 30 and 31. MO8 element 31.32 and redundant pressure [3
0 operates as a constant current source. The stream flowing to MO8 element 31.32 is connected to MO8 element 31.32 and MO8 element 1.
2 is of the same conductivity type, and has the same threshold voltage and element size, MO8 elements 31 and 320) (Iasumi pressure is yb
Then, it can be expressed as from equation (1).

演算増幅器21の働きによム抵抗13,14のインピー
ダンスが等しければ、MO8素子ll。
If the impedances of the comb resistors 13 and 14 are equal due to the operation of the operational amplifier 21, the MO8 element ll.

12には(10)式の′直流が流れる/ヒめ、出力基準
電圧■1.!は(3)、(io)式↓シ、・・・・・・
(11) となる。(11)式において、第2項目のとにより、μ
、iとμm、の温此依存性が同じである・・・・・・(
12) となり、差動対のMOB素子11.12の寸法比圧が得
られる。
In 12, the DC current of equation (10) flows, and the output reference voltage ■1. ! is (3), (io) formula ↓,...
(11) becomes. In equation (11), due to the second term, μ
, i and μm have the same temperature dependence...(
12) Then, the dimensional specific pressure of the MOB elements 11 and 12 of the differential pair is obtained.

Mo5s子のしきい電圧は一2mV/C程度の温度係数
を持っている。それゆえ、MO8素子のしきい電圧の温
度係数よシ1桁程度小さい温度係ば、バイアス電圧の減
反係数全無視すること力1でとなるように差一対のM0
8素子11,12の寸できるため、温度安定な基準′1
圧を第2図の回路で実現することができ、回路が簡単と
なめ。
The threshold voltage of Mo5s has a temperature coefficient of about -2 mV/C. Therefore, if the temperature coefficient is one order of magnitude smaller than the temperature coefficient of the threshold voltage of the MO8 element, then by ignoring the bias voltage reduction coefficient, the difference between the pair of M0 becomes
8 elements 11 and 12 are available, making it a temperature stable standard '1
The pressure can be realized with the circuit shown in Figure 2, and the circuit is simple.

第3図は本発明の他の実施例奮示す。第3図に2いて、
抵抗33.34は直列接続され、一端は出力端子2へ接
続され、他端は接地されており、抵抗33.34の接続
点はMO8素子31.32のゲートへ接続されている。
FIG. 3 shows another embodiment of the invention. 2 in Figure 3,
The resistors 33, 34 are connected in series, one end is connected to the output terminal 2, the other end is grounded, and the connection point of the resistors 33, 34 is connected to the gate of the MO8 element 31, 32.

MO8素子31゜32のバイアス電圧は、抵抗33.3
4で出力成力を分圧することによ9得ており、ノ(イア
ス回路を抵抗33.34で構成している。出力電圧は温
度安定性が期待できるため、その分圧底圧も温IL安定
となる。従って、温度安定な)(イアス回路を抵抗2個
だけで構成することができ、基準電圧発生回路の回路構
成が簡単となる。
The bias voltage of MO8 element 31°32 is the resistance 33.3
9 is obtained by dividing the output component by 4, and the output voltage is composed of resistors 33 and 34. Since the output voltage can be expected to be temperature stable, the bottom pressure of the partial voltage is also Therefore, the IAS circuit can be configured with only two resistors, and the circuit configuration of the reference voltage generation circuit can be simplified.

番台 鎮91匁 匣3園において、抵抗1a、14の代
りに、MO8素子のゲートとドレインを接続したMOS
ダイオードを用いても同様の結果が得られる。
Bandai Chin 91 Momme In the 3rd box, instead of resistors 1a and 14, a MOS with the gate and drain of MO8 elements connected
Similar results can be obtained using diodes.

なお、図中1は入力端子である。Note that 1 in the figure is an input terminal.

〔光切の効果〕[Effect of light cutting]

本発明によれば、差動対のMO8素子のどちらか一方の
特性と、定電流源として用いるMO8索子特性とを一致
できるので、製置安定な基準電圧が得られる。
According to the present invention, since the characteristics of either one of the MO8 elements of the differential pair can match the characteristics of the MO8 element used as a constant current source, a reference voltage that is stable during installation can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、基準磁圧発生回路の従来回路図、第2図、第
3図は、本発明の一実施例の基準電圧発生回路図でろる
。 11・・・デプレツショ/形1vlO8素子、12,3
1゜32・・・エノハンスメント形MO8素子、30・
・・定第 1 口 第Z 図 第3図
FIG. 1 is a conventional circuit diagram of a reference magnetic pressure generation circuit, and FIGS. 2 and 3 are diagrams of a reference voltage generation circuit according to an embodiment of the present invention. 11...depression/type 1vlO8 element, 12,3
1゜32...Enovation type MO8 element, 30.
・・Date No. 1 Mouth No. Z Fig. 3

Claims (1)

【特許請求の範囲】 1、第I LDMOS素子、第1)MO8素子と同導電
形でしきい電圧の異なる第2のMO8素子、前記第1.
第2のMO8素子に定電流を供給する定−流源、前記第
1.第2のMO8素子に略同−の電流fc*す手段から
なシ、前記第1.第2のMOSバ子のゲート・ソース電
圧差を基準賦圧として出力端子より取り出す基準電圧発
生回路において、前記足−流源を前記第1又は第2のM
O8素子と同尋厄形で、かつしきい−圧と菓子寸法の等
しいMoS水子二つを並列接続したものと、バイアス回
路とよシg成されることを特徴とする基準゛厄圧元生回
路。 2 前記バイアス回路を出力′電圧の分圧回路により構
成することを特徴とする特許請求の範囲第1項記載の基
準′電圧発生回路。
[Claims] 1. A second MO8 element having the same conductivity type as the first MO8 element but having a different threshold voltage;
a constant current source that supplies a constant current to the second MO8 element; There is no means for supplying approximately the same current fc* to the second MO8 element. In a reference voltage generation circuit that outputs a gate-source voltage difference of a second MOS gate from an output terminal as a reference voltage, the foot-current source is connected to the first or second M
A reference pressure source characterized by being constructed by connecting two MoS water elements in parallel, which are of the same shape as the O8 element, and have the same threshold pressure and size, and a bias circuit. Raw circuit. 2. The reference voltage generating circuit according to claim 1, wherein the bias circuit is constituted by a voltage dividing circuit for the output voltage.
JP17620683A 1983-09-26 1983-09-26 Generating circuit of reference voltage Pending JPS6068414A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17620683A JPS6068414A (en) 1983-09-26 1983-09-26 Generating circuit of reference voltage

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17620683A JPS6068414A (en) 1983-09-26 1983-09-26 Generating circuit of reference voltage

Publications (1)

Publication Number Publication Date
JPS6068414A true JPS6068414A (en) 1985-04-19

Family

ID=16009474

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17620683A Pending JPS6068414A (en) 1983-09-26 1983-09-26 Generating circuit of reference voltage

Country Status (1)

Country Link
JP (1) JPS6068414A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62264315A (en) * 1986-05-12 1987-11-17 Nec Corp Reference voltage generator
JPS6425220A (en) * 1987-07-13 1989-01-27 Ibm Reference voltage generation circuit
KR20030012753A (en) * 2001-08-04 2003-02-12 허일 Self-Start-Up Voltage Stabilization Circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62264315A (en) * 1986-05-12 1987-11-17 Nec Corp Reference voltage generator
JPS6425220A (en) * 1987-07-13 1989-01-27 Ibm Reference voltage generation circuit
KR20030012753A (en) * 2001-08-04 2003-02-12 허일 Self-Start-Up Voltage Stabilization Circuit

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