JPS6063971A - Negative resistance light emitting element - Google Patents

Abstract

PURPOSE:To enable the manufacture of a GND having a multilayer structure with the carrier concentration controlled at a time of crystal growth by a method wherein the cooling speed is controlled in the process of cooling a solution added with a dopant acting as an impurity for both polarities. CONSTITUTION:A mixture (raw material) of a fixed ratio of composition is uniformly dissolved. It is cooled to 905 deg.C at a cooling speed of 1 deg.C/min by the epitaxial growing method and then kept at this temperature for 5min. An N1 layer is formed in this process. Successively, a P1 layer is formed by cooling to 903 deg.C at a cooling speed of 0.05 deg.C/min. When the P1 layer is formed, a low carrier concentration layer is formed by cooling to 901 deg.C by the setting of the cooling speed at CR close to the region of inversion temperature. When this layer is formed, it is cooled to 891 deg.C and kept for 5min by an increase in the cooling speed to 2 deg.C/min. An N2 layer is formed in this process. Further, the cooling speed is set at 0.1 deg.C/min, and then a P2 layer is formed by cooling to 880 deg.C. Thereafter, the cooling speed is gradually increased with the decrease in the temperature inside a furnace, and a multilayer single crystal prepared after cooling inside the furnace is taken out.

Description

DETAILED DESCRIPTION OF THE INVENTION Convenience Overview The present invention relates to an element structure of a negative resistance element in which the switching voltage and the holding current are each increased by a certain level or more.

For example, the switching elements used in electronic lighters are
A certain value or more required for igniting the gas can be used as an innoting element using a Si SCR, a Si RNPN diode, or a PNPN light emitting diode (hereinafter referred to as GND) made of GaAs. Among the above, GND has the characteristic of emitting light at the same time as the switching operation, and the light emission serves as an indicator and has decorative value, so further development is desired.

<Prior Art> Here, to briefly explain the structure and manufacturing method of the conventional GND, as described in Patent No. 763787, "Manufacturing method of multilayer semiconductor", an invention by one of the present inventors, III-V group In a method of growing P-type and N-type semiconductor layers by cooling a melt added with a dopant that acts as an amphoteric impurity for a compound semiconductor,
There is a manufacturing method in which the cooling rate is repeatedly changed during the cooling period of the melt so that the melt repeatedly passes through an inversion temperature region, and N-type and P-type layers are sequentially deposited. GND/7 made using this method
) 柟：&pu'e ”n 11moeIff ;斗ト r+-
by rs +rJr 'k 1 θ”l h74FI
I IW hl First P-type layer PI, second N-type layer N2
, a second P-type layer P2. This GN
Switching voltage of D V8 and GND Due to the second constraint in manufacturing technology, the thickness of the base layer is large relative to the carrier diffusion length, so the breakdown voltage of junction J2 formed by layer P1 and layer N2 is The holding current I is determined by
h is the injection efficiency of the junction J1 formed by the layer N1 and the layer P1, the electron transport efficiency in the layer P1, and the layer N2 and the layer P2.
It is determined by the injection efficiency of the junction J3 formed in and the hole transport efficiency in the layer N2.

The GND switching voltage Vs of this structure is 2o volts ±
3 volts, and the holding current Ih is 1 to 10 mA.

Next, an electric circuit diagram of an electronic lighter, which is an example in which the GND manufactured according to the present invention is used, will be explained with reference to FIG. 2.

S is a switch, JZ is a relatively low voltage battery power supply, O20
is a blocking oscillation circuit that operates by receiving power from a battery power source E via a switch S. The blocking oscillator circuit O8C is conventionally known and includes a capacitor C1, a resistor R, a transistor Q, and three windings.
It consists of a transformer T having L2 and L3. C2 is a charging/discharging capacitor connected to both ends of the output winding L3 of the transformer T via the rectifying diode D1.

Ru. D2 is a GND having negative resistance such as a GaAs negative resistance light emitting element, and is connected to the primary winding ML of the high voltage generation transformer T2.
4 in series and connected to both ends of the charging/discharging capacitor C2. P is the secondary winding L5 of the high voltage generation transformer T2
This is the spark plug connected to the ignition plug.

Figure 3 shows the voltage (V) of GND D2, which has negative resistance.
In the current (I) characteristic diagram, the cutoff region of high resistance state ■, voltage V
When the current I increases, the current I decreases (<J resistance region 1] and the conduction region 1 has the same low resistance value as an ordinary light emitting diode.
■As the optical output is approximately proportional to the input current,
Almost no light is emitted in the state of the cutoff region ■, and the conduction region 1u
It emits strong light at large currents. Note that Vs is a switching voltage of the semiconductor light emitting element D2, and Ih is a conduction holding current.

Now, when the switch S is closed, a base current is supplied from the battery power supply E to the transistor Q via the base winding and the resistor R, and a collector current flows through the collector winding L2. Here, since the base winding aL 1 and the collector winding L2 apply positive feedback to the base current by their induced voltages, the collector current is further increased. In this way, when transistor Q becomes saturated due to positive feedback,
Since there is no feedback to the base winding, the transistor Q is cut off. Then, during the cutoff, the capacitor C1 is discharged, and when the discharge is finished, the supply of base current is started again, and the above operation is repeated.

The voltage output from the output winding L3 of the generator transformer T1 needs to be equal to or higher than the switching voltage ratio Vs of GND I)2, as will be described later. Here, the switching value voltage Vs is set to approximately 30V, Depending on the winding ratio of the transformer T1, the low voltage of about 1.3 to 3V of the battery power source E is primarily boosted, and the oscillation circuit itself is used to pull down the voltage primarily, especially in a blocking oscillation circuit. In this case, the oscillation circuit can be used effectively, and a lower voltage battery can be used as the battery power source E, which is useful.In addition, the voltage output from the output winding of the oscillator transformer T1 is In reality, the charge/discharge capacitor C is used as a load.
2 is connected, it does not become the value of the open circuit voltage itself. FIG. 4 is a time chart showing the voltage waveform at the connection point between the output winding L3 and the rectifier diode D1, and the peak voltage (2) p1 pulse width W and the repetition period r vary depending on the charging state of the charging/discharging capacitor C2. peak voltage.

Vp is approximately the same as the charging voltage of capacitor C2, and as the charging voltage increases, the peak voltage Vp also increases accordingly. Still, the pulse width W and the repetition period r are determined by the charging voltage of the charging/discharging capacitor C2, that is, the peak voltage V.
p affects the inside of the blocking oscillation circuit O8C,
Even if the charging voltage is not high, the oscillator transformer T
The voltage output from the output winding of , after being rectified by the rectifying diode D, every - repetition period r,
The charging/discharging capacitor C2 is sequentially charged.

This is repeated an appropriate number of times, and when the voltage across the charging/discharging capacitor C2 reaches the threshold voltage Vs of GND D2 as shown in FIG. 5(a), it is switched on and the charging/discharging capacitors C2, G A closed circuit is formed by NDD2 and the primary winding L4 of the step-up transformer T2, and a rapid discharge current flows. As a result, GND D2 emits light and l is applied to the secondary winding L5 of the step-up transformer T2.
A voltage close to 0 KV is generated, the ignition plug P is discharged, and gas, etc. is ignited. When the discharge of the charging/discharging capacitor C2 is completed, GND D2 is turned off, and the voltage output from the output winding L3 of the oscillator transformer T1 causes the discharging capacitor C2 to be turned off successively at each repetition period r.
is charged. This continues while the switch S is closed, and the ignition repetition period r is here approximately 1/2 to 1/3 second.

For the off operation of GND D2, it is necessary to apply a reverse voltage to GND D2 or to maintain the conduction holding current Ih or less for the turn-off period or longer. For example, the blocking oscillation 1i-! The frequency of circuit O8C is 500KH
2, that is, the repetition period r is less than the turn-off period, and the conduction holding current Ih = 0.1 mA.
Even if it is not possible to flow the following current,
), a reverse voltage is generated in the voltage waveform of the primary winding L4 of the step-up transformer T2.
2 off operations can be performed. Of course, if the output from the blocking oscillation circuit O8C can maintain the conduction holding current Ih or less during the turn-off period, it is possible to perform the off operation. If such a high voltage is generated, the spark plug P will discharge, and the spark will ignite the 91I gas or the like.

On the other hand, since GND D2 emits light every time a current flows, the operating state can be displayed. This means that if the gas does not ignite, you can confirm that there is no gas if GND D, + lights up, and if it does not light up, it means that the battery power supply E has fallen below a predetermined value or that the blocking oscillation circuit O
It can be determined that 8C is malfunctioning.

An electronic lighter requires at least 1 mJ of energy to ignite the gas, and the efficiency of a high-voltage transformer is usually 10 mJ.
%, so in order to reliably ignite with one switching, the energy stored in capacitor C2 is 10%.
More than mJ is required.

If the four capacitors are 100 µF, a capacitance of 2 μF and 25 V is required to be 32 /l F or more, and if it is 9 V, a capacitance of 250 μF or more is required. However, the volume of capacitors generally increases as customer use increases.
There is a table relationship.

Table 1 To store capacitors, other electronic parts, gas cylinders, valve opening/closing mechanisms, and other structural parts in a 7-day type lighter, use a capacitor 25■.

The capacitor with a capacitance of 33μF is the limit, and if a capacitor with a larger capacity is used, the electronic lighter will become larger and it will be inconvenient to carry.0 Considering the above, the switching voltage of GND is 25V or more. , a holding current of 2 mA or more is required. The reason why 2 mA or more is required is that in the circuit described above, GNI) is the current value necessary for repeating oscillation, and if it is 2 mA or less, G'ND remains on and does not oscillate.

As mentioned above, the GND commonly used in the past has a switching voltage of 20V±3v1 and a holding current of 1 to 10mA, and in order to further increase the switching voltage, the layer P1
and the carrier concentration in layer N2 must be reduced.

However, since this increases the carrier injection efficiency, the holding current becomes 1 mA or less, which no longer satisfies the above-mentioned condition of 2 mA or more.

<Description of the Present Invention> In view of the above points, the present invention provides a GND suitable for, for example, a switching element for an electronic lighter.

That is, the present invention provides an element structure capable of obtaining a GND whose switching voltage and holding current are larger than desired values.

The GND constructed according to the present invention is made sufficiently large so as not to increase the injection efficiency of the carrier concentration of the base layer P and the base layer N2, and is slightly larger than the spread of the depletion layer near the junction J2 that determines the switching voltage. It has a structure with one P layer or one N layer, and has a switching voltage of 25 V or more and a holding current of 5 mA or more.

As mentioned above, the GND is used for the cooling period of the melt when P-type and N-type semiconductor layers are grown by liquid phase epitaxial growth by cooling the melt in which Sl, which is an amphoteric impurity, is added to the GaAs compound semiconductor. , the cooling rate is repeatedly changed to repeatedly pass through the inversion temperature region. In this manufacturing process, the carrier concentrations in the base layer P1 and base layer N2 are increased so as not to increase the injection efficiency. 1 junction J
In the vicinity of 2, there is a P type or N type that is slightly larger than the spread of the depletion layer.
A type carrier concentration layer P- (or N-) having a thickness of 2 μm is provided to produce a five-layer structure of PNP-PN (or pNN PN). This structure is shown in FIG.

In addition to Si, Ge, Sn, etc. are known as amphoteric impurities.

Regarding GaAs liquid phase growth using only Si as an impurity, the above-mentioned patent number 763787 "Method for manufacturing multilayer semiconductor"
As described in , the conductivity type changes depending on the cooling rate, and a PNPN four-layer structure can be created in one liquid phase growth, but the carrier concentration at this time is the conductivity reversal temperature for both N-type and P-type. The closer it gets to , the lower it becomes. Figure 7 shows the conductivity region determined by the relative relationship between the cooling rate (°C/min) and the conductivity inversion temperature (°C) when the Si concentration in the GaAs melt is 005 to 00 wt%. FIG. The curves in the figure indicate the inversion temperature region on the (1,0,0) plane, and are the boundaries of each conductivity type.

The gold layer N2 is optically separated from the inversion temperature region and the cooling rate is 2℃/
The cooling rate when manufacturing layer P1 was 0.05°C/min and 0.07°C/min.

When the switching voltage Vss and the holding current Ih are changed in three types at 0.10° C./min, the result is as shown in FIG.

The PN junction that determines the switching voltage Vs is manufactured by forced inversion, so it is thought to be a step junction.
The value of VS is expressed by the following equation.

Vs = 60 (Eg/l, 1)""(NB/10") -
``''・■ Still, the spread D of the depletion layer at this time is determined by the following equation.

D-577 block 〒1〒〒〒〒〒〒〒〒〒〒〒〒〒〒〒〒〒〒〒〒〒〒〒〒〒〒〒〒〒〒〒〒1. r is expressed by the following formula.

1 r=(1+NBW/ ) −・・・・・・・・・−・■
EL Here, in order to raise Vs to 30 V or more, the cooling rate of layer P1 must be further increased, but if the cooling rate is increased, the high -AslIIE part in the GaAs melt will locally become the N layer. As a result, a PN two-layer structure is formed, resulting in poor yield. Furthermore, according to formulas (1) and (2), the carrier concentration in the layer P1 becomes lower, so the injection efficiency increases to -, and Ih becomes 1 mA or less. Therefore, in order to increase the holding current Ih and the switching voltage Vs, the cooling rate of Pl is made sufficiently slow, and the cooling rate of layer N2 is made sufficiently fast to prevent the injection efficiency from increasing. If a low carrier concentration layer with a thickness wider than the spread of the depletion layer is created at a cooling rate near the inversion temperature region, that is, at a cooling rate such that the carrier concentration is sufficiently low, based on equation 0, the switching voltage V can be reduced.
s is a voltage determined by the carrier concentration of this low carrier concentration layer. Here, it has been found from experimental results that the spread of the depletion layer when the switching voltage Vs=30V is 09 μm.

<Description of 1st example> Based on the above considerations, one embodiment of the present invention will be described in detail below.

A mixture is prepared at a ratio of 20 mg of Si and 2 g of GaAs polycrystal to 10 g of Ga, placed in a crucible made of high purity graphite, quartz, etc., and melted in a furnace by high frequency heating and resistance heating. A vacuum, an inert gas such as argon, or high-purity hydrogen gas is flowed inside the furnace, and the temperature and cooling rate inside the furnace are controlled by a work coil, a heater, or the like. The control profile of the furnace temperature and cooling rate is performed as shown in FIG.

The manufacturing method of the present invention will be explained in more detail with reference to FIGS. 7 and 9. A mixture (raw material) having the above-mentioned composition ratio is uniformly melted. Thereafter, it was cooled to 905° C. at a cooling rate of 1° C./min by liquid phase epitaxy, and held at this temperature for 5 minutes. Layer N1 is formed in this step. Subsequently, the mixture was cooled to 903°C at a cooling rate of 0.05°C/min.
A layer P is formed. When the layer P1 is formed, the cooling rate is set to a cooling rate CR near the reversal temperature region, and the layer is cooled to 9o1° C. to form a low carrier concentration layer.

In Figure 9, the cooling rate CR of the low carrier concentration layer is 01
°C/min, 012 °C/min, 015 °C/min.

As a result of trying five different cooling rates: 0.2°C/min, o, and 5°C/min, the switching voltage Vs and holding current Ih were the 10th.
The results shown in the figure were obtained. From the results of this experiment, it was found that in order to make the switching voltage Vs 25 V or more, the cooling rate CR of the low carrier concentration layer should be set between 0.1° C./min and 0.3° C./min. Further, the holding current Ih at this time was approximately constant at 7 mA±1 mA.

When a low carrier concentration layer is formed, the cooling rate is increased to 2° C./min, and the temperature is cooled to 891° C. and held for 5 minutes. Layer N2 is formed in this step. In the next step, the cooling rate is increased to 0.1
C./min and cooled to 880.degree. C. to form layer P2. Thereafter, the cooling rate is gradually increased in accordance with the decrease in the temperature in the furnace, and after the cooling in the furnace is completed, the produced multilayer single crystal is taken out.

In order to increase the holding current Ih and the switching voltage Vs during each of the above steps, the cooling rate of the layer P is sufficiently slow.
The cooling rate of layer N2 is set sufficiently high so that the injection efficiency does not increase.

The thickness of the low carrier concentration layer formed is layer P1 and layer N2.
It becomes thicker than the depletion layer spreads between.

Due to ``2'', the switching voltage is 25V or more, and the holding current is 5V.
A GND having electrical characteristics of less than mA is manufactured.

<Effects of the Invention> The present invention forms a low carrier concentration layer and a high carrier concentration layer by controlling the cooling rate in the process of cooling a melt containing a dopant that acts as an amphoteric impurity. A GND having a multilayer structure with a controlled carrier concentration can be manufactured by crystal growth. GNDi-i of the present invention: If the ends are removed, more than 95% of the products satisfy the conditions of switching voltage Vs 25V or more and holding current Ih 2mA or more, resulting in very high yield efficiency and reliable results. can get.

Further, when the GND of the present invention is compared with the conventional GND, the results are as shown in Table 2.

In Table 2, the sample plate 1 is a conventional normal G'ND, and the sample plate 2 is a conventional one, but manufactured so that the switching voltage is increased. Sample plate 3 is GN'D produced according to the present invention.

Table 2 As is clear from Table 2, according to the present invention, an element with a switching voltage of 40 V and a holding current of 5 mA can be easily manufactured.

[Brief explanation of drawings]

FIG. 1 is a diagram explaining the structure of a conventional GND. Second
The figure is an electrical circuit diagram of an electronic lighter in which the GND of the present invention is used. FIG. 3 is a voltage-current characteristic diagram of GND. FIG. 4 is a signal waveform diagram of the main part in FIG. 2. 5(a) and 5(b) are signal waveform diagrams of other important parts in FIG. 2. FIG. 6 is a diagram illustrating the structure of GND showing one embodiment of the present invention. Figure 7 shows Ga dissolving Si.
FIG. 3 is a state diagram showing the relationship between the cooling rate of the As melt and the conductivity type inversion temperature, and each conductivity type region. FIG. 8 is a graph showing the relationship between the cooling rate, switching voltage, and holding current when manufacturing P1. FIG. 9 is an explanatory diagram showing a control profile of the furnace temperature and cooling rate for producing the GND of the present invention. 1st
Figure 0 is a graph showing the relationship between the cooling rate, switching voltage, and holding current when manufacturing a low carrier concentration layer.

Claims (1)

[Claims] 1. In a PNPN structure negative resistance light emitting device made by adding a dopant that acts as an amphoteric impurity to a IIILV group compound semiconductor, a depletion layer is formed at the center 1) N junction position of the PN junction of the PNPN structure, which determines the switching voltage. 1. A negative resistance light emitting device characterized in that a low carrier concentration layer thicker than the spreading layer is interposed, and the carrier concentration of a P-type layer and an N-type layer bonded to the low carrier concentration layer is set to be high.