JPS6062232A - Semiconductor interrupting circuit - Google Patents

Semiconductor interrupting circuit

Info

Publication number
JPS6062232A
JPS6062232A JP17030683A JP17030683A JPS6062232A JP S6062232 A JPS6062232 A JP S6062232A JP 17030683 A JP17030683 A JP 17030683A JP 17030683 A JP17030683 A JP 17030683A JP S6062232 A JPS6062232 A JP S6062232A
Authority
JP
Japan
Prior art keywords
voltage
thyristor
terminal
base
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17030683A
Other languages
Japanese (ja)
Inventor
Manabu Yabuki
學 矢吹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to JP17030683A priority Critical patent/JPS6062232A/en
Publication of JPS6062232A publication Critical patent/JPS6062232A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/567Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT

Landscapes

  • Thyristor Switches And Gates (AREA)

Abstract

PURPOSE:To supply the main circuit holding voltage of a cascaded three-terminal bilateral thyristor stably by utilizing the leak current of a transistor (TR). CONSTITUTION:A positive voltage is supplied to a terminal A1 and a negative voltage is supplied to a terminal A2. Then, an NPN TR having a diode connected between the collector and emitter reversely in parallel and the three- terminal bilateral thyristor TC are cascaded. A switch SW is connected between its base terminal B and gate terminal G. This switch SW is turned on and off to form a short circuit between the base and gate, and a base voltage and a gate voltage as driving voltages are generated and applied to respective control electrodes. A resistance R6 is connected between the collector and base and when the thyristor turns off, a stabilized DC voltage is supplied to the switch SW for the base terminal B to supply the main circuit voltage of the thyristor TC stably by utilizing the leak current of TR.

Description

【発明の詳細な説明】 本発明は直流電圧源下において、誘起電圧の発生に対処
した半導体断続回路に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor switching circuit that copes with the generation of induced voltage under a DC voltage source.

三端子双方向性サイリスタを用いて、誘導性負荷を駆動
させる場合、駆動回路の他サイリスタをオフさせる為の
回路や、保持電流を安定的に供給する回路を必要とする
。例えば、トランジスタとサイリスタを直列に接続した
回路がある。この場合、ベース回路、ゲート回路双方の
駆動回路が必要となり、トランジスタ動作による主電流
でサイリスタをトリガさせていた。従つて、非同期の不
安定要因、サイリスタの動作安定性等において、かくあ
る以上の信頼性が得られなかつた。
When driving an inductive load using a three-terminal bidirectional thyristor, in addition to the drive circuit, a circuit for turning off the thyristor and a circuit for stably supplying a holding current are required. For example, there is a circuit in which a transistor and a thyristor are connected in series. In this case, drive circuits for both the base circuit and the gate circuit are required, and the thyristor is triggered by the main current generated by the transistor operation. Therefore, it has not been possible to obtain higher reliability in terms of asynchronous instability factors, thyristor operational stability, etc.

本発明は上述の問題点にかんがみてなされたものであり
、コレクタ・エミツタ間にダイオードを逆並列接続した
NPN型トランジスタと、三端子双方向性サイリスタを
縦続接続し、上述トランジスタのベースの漏れ電流を利
用する事により、側路された回路による電流電圧で、サ
イリスタをトリガさせた。その結果、制御電極ベース・
ゲート端子間を短絡する開閉制御のみでトランジスタ動
作の保持電流を得た。更にサイリスタの断続時のパワ−
等に配慮してトランジスタ動作を補償したので、逆電圧
を無理なく電源側に返し、このことから保持電流の安定
供給が計れた。即ち、直流電圧源下において、誘起電圧
に対処した信頼性の高い半導体断続回路を提供するもの
である。
The present invention was made in view of the above-mentioned problems, and consists of an NPN transistor in which a diode is connected in anti-parallel between the collector and emitter, and a three-terminal bidirectional thyristor connected in cascade. By using this, the thyristor was triggered by the current voltage from the bypassed circuit. As a result, the control electrode base
The holding current for transistor operation was obtained only by opening/closing control by shorting the gate terminals. Furthermore, the power when the thyristor is on and off
Since the transistor operation was compensated for, the reverse voltage was returned to the power supply side without difficulty, and from this, a stable supply of holding current was achieved. That is, the present invention provides a highly reliable semiconductor switching circuit that can cope with induced voltage under a DC voltage source.

以下、本発明を図面に示す実施例回路において詳細に説
明する。
Hereinafter, the present invention will be explained in detail with reference to embodiment circuits shown in the drawings.

第1図は本発明の基本回路を示す。FIG. 1 shows the basic circuit of the invention.

負荷を介した直流電圧が、A1端子に正の電圧を、A2
端子に負の電圧を印加供給する。TRはコレクタ・エミ
ツタ端子間の(D)なるダイオードを逆並列接続したN
PN型トランジスタであり、コレクタ(C)、ベース(
B)、エミツタ(E)端子を有す。TCは三端子双方向
性サイリスタ(以降、単にサイリスタという)であり、
電極(T2)、電極(T1)、ゲート(G)端子を有す
。前記エミツタ(E)端子と電極(T2)が縦続接続さ
れ、このトランジスタ縦続接続サイリスタ(TR・TC
)の駆動を計るべく、ベース(B)端子とゲート(G)
端子間にスイツチ(SW)が接続される。このスイツナ
(SW)を開閉制御し、ベース・ゲート間を短絡する事
により、駆動電圧なるベース電圧(∇b)とゲート電圧
(∇g)とを発生させ、各制御極(B・G)に印加供給
する。抵抗(R6)はコレクタ・ベース間に接続され(
例えば、主回路に対して側路された回路として構成され
安定化される)、サイリスタがオフすると、安定化され
た直流電圧をベース(B)端子とスイツチ(SW)に供
給し、トランジスタのベースの漏れ電流を利用する事に
より、サイリスタ(TC)の主回路電圧(∇t2)を安
定的供給する。そして、トランジスタ縦続接続サイリス
タ(TR・TC)がオンすると、(R6)は電流を制限
する抵抗である。
The DC voltage across the load causes a positive voltage at the A1 terminal and a positive voltage at the A2 terminal.
Apply and supply negative voltage to the terminal. TR is N with diodes (D) connected in antiparallel between the collector and emitter terminals.
It is a PN type transistor, with a collector (C) and a base (
B), has an emitter (E) terminal. TC is a three-terminal bidirectional thyristor (hereinafter simply referred to as a thyristor),
It has an electrode (T2), an electrode (T1), and a gate (G) terminal. The emitter (E) terminal and the electrode (T2) are cascade-connected, and this transistor cascade-connected thyristor (TR/TC
), the base (B) terminal and gate (G)
A switch (SW) is connected between the terminals. By controlling the opening and closing of this sweetener (SW) and shorting between the base and gate, a base voltage (∇b) and a gate voltage (∇g), which are drive voltages, are generated, and each control pole (B, G) is Apply and supply. A resistor (R6) is connected between the collector and base (
For example, when the thyristor is turned off, it supplies the stabilized DC voltage to the base (B) terminal and the switch (SW), and supplies the stabilized DC voltage to the base (B) terminal and the switch (SW). By using the leakage current, the main circuit voltage (∇t2) of the thyristor (TC) is stably supplied. When the transistor cascade-connected thyristor (TR/TC) is turned on, (R6) is a resistor that limits the current.

かかる構成にすると、トリガモードが選択されているサ
イリスタ(TC)は、ベースの漏れ電流を利用して供給
された主回路電圧(∇t2)と、べース・ゲート電圧(
∇b・∇g)なるスイツチ(SW)による駆動電圧とで
トリガされてオンする。このトリガ電圧(∇t2・∇b
・∇g)は、側路された抵抗(R6)を供給源としてい
るので、主回路電圧の安定化の外、誤点弧による誤動作
の防止が計れる。即ち、目的に合わせ選択した、又は新
たに作り出したトランジスタ(TR)のベースの漏れ電
流を利用して十分なる主回路電圧(∇t2)を供給する
事により、この主回路電圧に同期化された極く微少な一
定値以上の駆動電圧(∇b・∇g)で、サイリスタ(T
C)を確実にして安定的にトリガさせる事ができる様に
なる。
With this configuration, the thyristor (TC) in which the trigger mode is selected is connected to the main circuit voltage (∇t2) supplied using the base leakage current and the base-gate voltage (
∇b, ∇g) is triggered by a drive voltage from a switch (SW) and turns on. This trigger voltage (∇t2・∇b
・∇g) uses the shunted resistor (R6) as a supply source, so it not only stabilizes the main circuit voltage but also prevents malfunctions due to erroneous firing. That is, by supplying sufficient main circuit voltage (∇t2) using the leakage current at the base of a transistor (TR) selected or newly created according to the purpose, the main circuit voltage can be synchronized. The thyristor (T
C) can be reliably triggered and stably triggered.

以下、第2図例にて詳細に説明する。This will be explained in detail below using the example in FIG.

負荷(L)を介した商用周波電源(AC)は、ダイオー
ドブリツジ(BR)により全波整流され、A1・A2端
子にそれぞれ正・負の直流電圧を印加供給する。この直
流電圧を断続する為にトランジスタ縦続接続サイリスタ
(TR・TC)と、スイツチ(SW)が図示の様に接続
される。このスイツチ(SW)には、例えば容量(C9
)接続抵抗(R9)接続スイツチ素子(SW)が対応さ
れ、供給電圧の無誘導化を計る。R9aは容量(C9)
に並列接続された起動抵抗であり、Mはパルストランス
である。尚、Zはdv/dt抑制用のサージアブソーバ
であり、A1・A2端子間に接続される。
A commercial frequency power source (AC) passing through a load (L) is full-wave rectified by a diode bridge (BR), and supplies positive and negative DC voltages to terminals A1 and A2, respectively. In order to intermittent this DC voltage, a transistor cascade-connected thyristor (TR/TC) and a switch (SW) are connected as shown. This switch (SW) has a capacity (C9
) A connection resistor (R9) and a connection switch element (SW) are used to make the supply voltage non-inductive. R9a is the capacity (C9)
is a starting resistor connected in parallel with M, and M is a pulse transformer. Note that Z is a surge absorber for dv/dt suppression, and is connected between A1 and A2 terminals.

かかる構成にすると、主回路電圧(∇t2)が安定的に
供給されているサイリスタ(TC)は、既述駆動電圧(
∇g・∇b)の供給を受けてトリガされオンし、既述抵
抗(R6)により制限を受けたカソード電流(It1)
を流す。このカソード電流(It1)が流れる事によつ
て、トランジスタ(TR)がオンし、コレクタ電流なる
主電流が流れる。即ち、上述カソード電流(It1)は
、駆動電流(IgIb)に比例して増加するが故にスイ
ツチ(SW)の開閉制御−つで、極く簡単にベース電流
(Ib)が流し込め、トランジスタ動作の接続容量なる
保持電流(It2)を得る事ができる。この保持電流(
It2)が減少するとサイリスタ(TC)がオフし、続
いてトランジスタ(TR)がオフする。以下、スイツチ
の開閉制御によりトランジスタ縦続接続サイリスタ(T
R・TC)は継続する。即ち、ベースの漏れ電流を利用
する事により、側路された回路(R6)からサイリスタ
(TC)をトリガさせる為の全ての電圧を供給したので
、トリガ動作が極めて安定化され、スイツチ(SW)の
短絡容量に応じた、(Ib)なるベース電流を流し込め
る様になる。
With such a configuration, the thyristor (TC) to which the main circuit voltage (∇t2) is stably supplied will have the aforementioned drive voltage (
The cathode current (It1) is triggered and turned on in response to the supply of ∇g and ∇b), and is limited by the aforementioned resistor (R6).
flow. When this cathode current (It1) flows, the transistor (TR) is turned on, and a main current, which is a collector current, flows. In other words, since the cathode current (It1) increases in proportion to the drive current (IgIb), the base current (Ib) can be input very easily by controlling the opening and closing of the switch (SW), and the transistor operation can be controlled. A holding current (It2), which is the connection capacitance, can be obtained. This holding current (
When It2) decreases, the thyristor (TC) is turned off, and subsequently the transistor (TR) is turned off. Below, the transistor cascade-connected thyristor (T
R・TC) will continue. That is, by using the leakage current of the base, all the voltage for triggering the thyristor (TC) was supplied from the bypassed circuit (R6), so the trigger operation was extremely stable, and the switch (SW) A base current of (Ib) corresponding to the short-circuit capacity of .

第3図で、誘起電圧を発生する回路例にて継続動作を補
促説明する。
Referring to FIG. 3, the continuous operation will be further explained using an example of a circuit that generates an induced voltage.

第2図例と相違し、ダイオードブリツジ(BR)の直流
出力端子間に図示の様に平滑コンデンサ(C1)が接続
され、この直流平滑電圧が負荷(L1L2)を介してそ
れぞれA1・A2端子に印加供給される。
Unlike the example in Fig. 2, a smoothing capacitor (C1) is connected between the DC output terminals of the diode bridge (BR) as shown in the figure, and this DC smoothed voltage is applied to the A1 and A2 terminals respectively through loads (L1L2). is applied and supplied.

以下、要約する。負荷(L1L2)の駆動に際し、図示
の様に第1図例の基本回路が二個接続される。そして、
スイツチ(SW1)とスイツチ(SW2)の位相をずら
せて(例えば、SW1に対してSW2の駆動を早く又は
遅く)交互に各順・逆方向に開閉制御すれば、双方向特
性のサイリスタ(TC)は各トリガされて駆動する。以
下、順電流を遮断すると、サージ電圧と誘起電圧が発生
する。サージ電圧は、ダイオード(D)と既述側路され
た回路とで分割吸収され、このサージ電圧を利用しベー
スから流れ出すベース電流を側路された回路に吸収させ
る。又、誘起電圧はダイオード(D)を介しサイリスタ
に印加され、サイリスタ(TC)を逆方向駆動させる事
により、無理なく電源側に返す。即ち、ダイオード(D
)は、サージ電圧や誘起電圧によつて生ずる逆電圧を無
理なく電源側に返して、トランジスタの破壊や雑音発生
等の防止を計り、更に誘導性負荷の状態に即応したベー
ス電流を確保する。
The following is a summary. When driving the load (L1L2), two basic circuits of the example in FIG. 1 are connected as shown. and,
By shifting the phase of the switch (SW1) and switch (SW2) (for example, driving SW2 earlier or later than SW1) and controlling the opening and closing in each forward and reverse direction alternately, a thyristor (TC) with bidirectional characteristics can be created. is each triggered to drive. Hereafter, when the forward current is cut off, a surge voltage and an induced voltage are generated. The surge voltage is divided and absorbed by the diode (D) and the bypassed circuit described above, and this surge voltage is used to cause the base current flowing from the base to be absorbed by the bypassed circuit. Further, the induced voltage is applied to the thyristor via the diode (D), and by driving the thyristor (TC) in the reverse direction, it is easily returned to the power supply side. That is, the diode (D
) safely returns the reverse voltage generated by surge voltage or induced voltage to the power supply side to prevent transistor destruction and noise generation, and also ensures a base current that responds quickly to the state of the inductive load.

上述の様にトランジスタと三端子双方向性サイリスタを
縦続接続し、トランジスタのベースの漏れ電流を利用す
れば、側路された直流電圧でサイリスタをトリガしオン
させ、その電流の流れでトランジスタをオンさせる。そ
の手段としてベース、ゲート間に接続されたスイツチの
開閉制御のみで、トランジスタの接続容量なる保持電流
が得られ、直流電圧を自在に断続する事ができる。又、
コレクタ、エミツタ間にダイオードを逆並列接続する事
により、サイリスタの双方向特性や断続時のパワーに、
トランジスタ動作を合わせる事が可能となる。このこと
から、負荷の動作状態に即応した保持電流を自動的にし
て安全的に供給できる。誤点弧による誤動作の防止が計
れる。雑音発生や発熱の防止等、極めて信頼性の高い継
続回路が作り出されたものであり、例えば、電力制御回
路としてインバーター、コンバーター、サイクロコンバ
ーター等に活用が計れる。
As mentioned above, if a transistor and a three-terminal bidirectional thyristor are connected in cascade and the leakage current at the base of the transistor is used, the thyristor is triggered and turned on by the bypassed DC voltage, and the transistor is turned on by the current flow. let As a means of achieving this, simply by controlling the opening and closing of the switch connected between the base and gate, a holding current, which is the connection capacitance of the transistor, can be obtained, and the DC voltage can be switched on and off at will. or,
By connecting a diode in anti-parallel between the collector and emitter, the bidirectional characteristics of the thyristor and the power during intermittent operation can be improved.
It becomes possible to match transistor operations. From this, it is possible to automatically and safely supply a holding current that immediately corresponds to the operating state of the load. Prevents malfunctions due to erroneous ignition. An extremely reliable continuity circuit has been created that prevents noise generation and heat generation, and can be used, for example, as a power control circuit in inverters, converters, cycloconverters, etc.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の基本回路である。第2図は具体的な駆
動回路図例である。第3図は誘起電圧を発生する負荷の
駆動回路図例を示す。 尚、図面において、TRをNPN型トランジスタ、Dは
ダイオード、TCは三端子双方向性サイリスタ、SWは
スイツチ、R6は電流制限抵抗、Lは負荷、BRはダイ
オードブリツジ、Zはサージアブソーバである。
FIG. 1 shows the basic circuit of the present invention. FIG. 2 is an example of a specific drive circuit diagram. FIG. 3 shows an example of a drive circuit diagram of a load that generates an induced voltage. In the drawing, TR is an NPN transistor, D is a diode, TC is a three-terminal bidirectional thyristor, SW is a switch, R6 is a current limiting resistor, L is a load, BR is a diode bridge, and Z is a surge absorber. .

Claims (1)

【特許請求の範囲】[Claims] (1)コレクタ・エミツタ間にダイオードを逆並列接続
したNPN型トランジスタと、三端子双方向性サイリス
タを縦続接続し、前記トランジスタのベースの漏れ電流
を利用する事により、縦続下の三端子双方向性サイリス
タの保持電流を供給した事を特徴とする半導体断続回路
(1) By cascading an NPN transistor with diodes connected in antiparallel between the collector and emitter and a three-terminal bidirectional thyristor, and utilizing the leakage current of the base of the transistor, the three-terminal bidirectional A semiconductor intermittent circuit characterized by supplying a holding current of a thyristor.
JP17030683A 1983-09-14 1983-09-14 Semiconductor interrupting circuit Pending JPS6062232A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17030683A JPS6062232A (en) 1983-09-14 1983-09-14 Semiconductor interrupting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17030683A JPS6062232A (en) 1983-09-14 1983-09-14 Semiconductor interrupting circuit

Publications (1)

Publication Number Publication Date
JPS6062232A true JPS6062232A (en) 1985-04-10

Family

ID=15902523

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17030683A Pending JPS6062232A (en) 1983-09-14 1983-09-14 Semiconductor interrupting circuit

Country Status (1)

Country Link
JP (1) JPS6062232A (en)

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