JPS6059745A - Probe substrate for measuring semiconductor integrated circuit - Google Patents
Probe substrate for measuring semiconductor integrated circuitInfo
- Publication number
- JPS6059745A JPS6059745A JP16868783A JP16868783A JPS6059745A JP S6059745 A JPS6059745 A JP S6059745A JP 16868783 A JP16868783 A JP 16868783A JP 16868783 A JP16868783 A JP 16868783A JP S6059745 A JPS6059745 A JP S6059745A
- Authority
- JP
- Japan
- Prior art keywords
- probes
- wafer
- semiconductor integrated
- pitch
- probe
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Measuring Leads Or Probes (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は半導体基板上に一定ピッチで配列された半導体
集積回路の測定に用いる探針基板に関する0
最近のLSI製造技術の進歩にともない、LSIチップ
の機能も大巾にアップするようになり、その特性の測定
に要する時間も増加の一途をたどっている。この時間増
はLSIの生産に際し能率低下という重大な影響をもた
らす。この為、同時に複数個のLSIを並行して測定(
以降並列測定と略す)する事が行われているが、パッケ
ージに組立てられた後の測定ではと・もかく、半導体基
板であるウェーハ上にLSIが並んでいて、切り離され
ていない状態での測定(以降ウェーハ測定と略す)では
、種々の問題をともなう。これらの問題の一つとして、
測定用探針基板(以降グローブカードと略す)の問題が
ある。Detailed Description of the Invention The present invention relates to a probe substrate used for measuring semiconductor integrated circuits arranged at a constant pitch on a semiconductor substrate.With the recent progress in LSI manufacturing technology, the functions of LSI chips have also expanded dramatically. The amount of time it takes to measure these characteristics is also increasing. This increase in time has a serious effect of reducing efficiency during LSI production. For this reason, it is possible to measure multiple LSIs in parallel at the same time (
(hereinafter abbreviated as "parallel measurement"), but in any case, measurements are taken after the LSIs have been assembled into a package, but measurements are taken when the LSIs are lined up on a wafer, which is a semiconductor substrate, and are not separated. (hereinafter abbreviated as wafer measurement) involves various problems. One of these issues is
There is a problem with the measurement probe board (hereinafter referred to as the globe card).
従来性なわれているウェーハ測定での並列測定では、せ
いぜい2〜4個同時の測定であったが。In the conventional parallel measurement of wafers, at most two to four wafers were measured simultaneously.
最近では、8個以上の並列測定も研究されるようになり
ている。この際、プローブカード設計上の問題として、
ウェーハ上のLSIと電気的接続をする為の探針の配置
が問題として浮び上ってくる。Recently, parallel measurement of eight or more units has also been studied. At this time, as a problem in probe card design,
The placement of the probe for electrical connection with the LSI on the wafer has emerged as a problem.
第1図は、従来の2個並列測定のできるプローブカード
の平面図である。図において、絶縁板1に開口部2が設
けられ、開口部の縁にそって探針3aが複数および探針
3bが複数連べられている。FIG. 1 is a plan view of a conventional probe card that can perform two parallel measurements. In the figure, an opening 2 is provided in an insulating plate 1, and a plurality of probes 3a and a plurality of probes 3b are arranged along the edge of the opening.
X及びyは測定されるLSIがウェーハ上に並んでいる
ピッチである。第1図から明かなように、2個並列測定
を、4個や8個の並列測定用に開口部2を大キくシ、探
針を配置しようとすると、探針3aや3bのうち、端の
ものはLSIのピッチよりll′l:み出している為、
新たに必要になる隣接するLSI用の探針が配置できな
い。X and y are the pitches at which the LSIs to be measured are arranged on the wafer. As is clear from Fig. 1, when trying to make the aperture 2 larger and arrange the probes for two parallel measurements, four or eight probes, one of the probes 3a and 3b. Because the edge part protrudes from the LSI pitch,
A newly required probe for an adjacent LSI cannot be placed.
本発明の目的は、このような問題′!i−解決し、3個
以上のLSIの並列測定をも可能にした半導体集積回路
測定用探針基板を提供するにある。The purpose of the present invention is to solve such a problem! An object of the present invention is to provide a probe substrate for measuring semiconductor integrated circuits which solves the above problems and makes it possible to measure three or more LSIs in parallel.
本発明の探針基板は、絶縁板に複数の開口を設け、これ
ら開口の縁に沿って多数の探針を配置した構成音響する
。The probe substrate of the present invention has a structure in which a plurality of openings are provided in an insulating plate and a large number of probes are arranged along the edges of these openings.
つぎに本発明を実施例により説明する。Next, the present invention will be explained by examples.
第2図は本発明の一実施例の外形を省略した開口部を示
す平面図である。第2図において、絶縁板1には2個の
開口部4と5が設けられ、開口部4と5のそれぞれの縁
に沿って、各個別のLSIを対象とする探針4a、4b
および5a、5bが配置されている。なお、X、yは、
第1図と同様LSIの並んでいるピッチである〇二つの
開口部4と5との間の距離2は、ピッチyの整数倍にな
るようにとる。このようにすれば、ピッチから外の隣に
はみ出している探針があっても、2個並列測定から4個
並列測定用のプローブカードに拡張する事ができる0ま
た、このグローブカードを用いてウェーハ測定を行う場
合、ウェー/・の送りピッチは、X方向に関してはXの
ままでよいが、Y方向に関してはZ/y回yだけ送った
らば、Z+yだけ先に飛び、再びZ/y回yだけ送ると
いう方式をとらなくてはならないのは明らかである0以
上説明したように、グローブカードに探針を並べる開口
部を複数個もうけるという本発明により、並列測定の数
をふやせ、ウェーッ・測定の時間を短縮でき、大きな生
産能率向上効果が得られる0FIG. 2 is a plan view showing an opening in an embodiment of the present invention, with the external outline omitted. In FIG. 2, two openings 4 and 5 are provided in the insulating plate 1, and probes 4a and 4b are provided along the respective edges of the openings 4 and 5 to target each individual LSI.
and 5a, 5b are arranged. In addition, X and y are
As in FIG. 1, the distance 2 between the two openings 4 and 5, which is the pitch at which the LSIs are lined up, is set to be an integral multiple of the pitch y. In this way, even if there is a probe protruding from the pitch and adjacent to it, it is possible to expand the probe card from 2 probes in parallel to 4 probes in parallel. When measuring a wafer, the feeding pitch of the wafer in the X direction can remain as X, but in the Y direction, if it is fed Z/y times, it will jump forward by Z + y, and then it will move Z/y times again. It is clear that we must adopt a method of sending only y. Measurement time can be shortened and production efficiency can be greatly improved.
第1図は従来の半導体集積回路測定用探針基板の平面図
、第2図は本発明の一実施例の平面図でちる0
1・・・・・・絶縁板、2,4.5・・・・・・開口部
、3a。
3b、4a、4b、5a、5b・−−−−・探針Orr
+ +’、
代理人 弁理士 内 原 、l −、ハ、”j j 、
、ソ
第1 区
情2図Fig. 1 is a plan view of a conventional probe substrate for measuring semiconductor integrated circuits, and Fig. 2 is a plan view of an embodiment of the present invention. ...Opening, 3a. 3b, 4a, 4b, 5a, 5b・----・Tip Orr
+ +', Agent Patent Attorney Uchihara, l -, Ha, "j j,
, Section 1 District Information 2
Claims (1)
探針が配置された半導体集積回路測定用探針基板におい
て、前記探針の配置された開口を複数個有することを特
徴とする半導体集積回路測定用探針基板。A probe substrate for semiconductor integrated circuit measurement in which an opening is provided in an insulating plate and a large number of probes are arranged along the edge of the opening, characterized by having a plurality of openings in which the probes are arranged. A probe substrate for measuring semiconductor integrated circuits.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16868783A JPS6059745A (en) | 1983-09-13 | 1983-09-13 | Probe substrate for measuring semiconductor integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16868783A JPS6059745A (en) | 1983-09-13 | 1983-09-13 | Probe substrate for measuring semiconductor integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6059745A true JPS6059745A (en) | 1985-04-06 |
Family
ID=15872603
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16868783A Pending JPS6059745A (en) | 1983-09-13 | 1983-09-13 | Probe substrate for measuring semiconductor integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6059745A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6435926A (en) * | 1987-07-30 | 1989-02-07 | Tokyo Electron Ltd | Reliability testing system for semiconductor element |
-
1983
- 1983-09-13 JP JP16868783A patent/JPS6059745A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6435926A (en) * | 1987-07-30 | 1989-02-07 | Tokyo Electron Ltd | Reliability testing system for semiconductor element |
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