JPS6058645A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To facilitate the installation of metal on an element electrode by a method wherein projections are formed on the surface of an insulation substrate at fixed intervals, the gaps among them are filled with an insulation substance, metallic projections are formed on the projections by electrolytic plating, and these projections are transcribed by exfoliation on the electrode provided on the surface of a semiconductor element. CONSTITUTION:Many projections 51 are formed on the surface of a base 40 made of glass, ceramic, resin, etc. at fixed intervals, and recesses 52 positioned among them are filled with the insulation substance 53 such as SiO2, Si3N4, and polyimide resin. The metallic projections 22 are adhered on the projections 51, respectively, by electrolytic plating, and made to abut against the electrode 23 provided on one surface of the semiconductor element 24 and then pressed by heating, and oxides and the like produced on the surface of the projections 22 are made to flow to the direction shown by arrows 54, resulting in obtaining an electrode of secure contact with the electrode 23 and the projection 22. Such a manner enables the commitment of processes up to the formation of the projections 22 to professional manufacturers, leading to the reduction of the cost for electrode installation.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method of forming metal protrusions on electrode terminals of semiconductor devices, etc., by which the metal protrusions can be bonded all at once on electrode terminals, without performing any processing on the electrode terminals. It is a method for joining all at once, and it is possible to achieve reliable joining with high reliability through an extremely simple process.

Conventional configurations and their problems In recent years, semiconductor devices such as ICs and LSIs have been introduced into various home appliances and industrial equipment fields. In order to expand the scope of use or to expand the scope of use, so-called portable devices, which are smaller and thinner, are being promoted.

In order to respond to the portupling of semiconductor devices,
There is a growing demand for packaging to be more compact and thinner. After the diffusion process and electrode wiring process have been completed, the silicon slice is cut into chips for each semiconductor element, and electrode leads are taken out from the aluminum electrode terminals provided around the chip to external terminals for easy handling and packaging for mechanical protection. will be processed. Normally, DIL, chip carrier, flip chip, tape carrier methods, etc. are used for packaging these semiconductor devices.
, chip carriers, etc., are connected one by one from the electrode terminals of the semiconductor element to the external terminals using ultrafine Au or Al wires of 26 to 36 .mu..phi. For this reason, as the number of electrode terminals on a semiconductor device increases, not only does the reliability of the connection points decrease, but the number of external terminals also increases at regular intervals, resulting in an increase in packaging thickness. The stiffness also increases.

In LSIs such as Ilo, which are connected to LSIs for memory and microcomputers, as the number of functions increases, the number of electrode terminals also increases significantly to 60 to 100 terminals, and as mentioned above, the size of the packaging increases. However, in order to handle only a few tens of semiconductor elements, the size becomes several tens of centimeters.

This has hindered the promotion of smaller and thinner devices.

On the other hand, there is a 7-lip chip carrier system that has high reliability at connection points and can provide smaller, thinner packaging. In packaging a semiconductor element using a chip carrier or tape carrier method, a multilayer metal film called a barrier metal is provided on the electrode terminals on the semiconductor element, and metal protrusions are further provided on this multilayer metal film by electroplating. In the case of the flip-chip method, the metal protrusions are made of a solder material, and the metal protrusions and the wiring patterns on the circuit board are aligned and bonded together by solder reflow.

On the other hand, in the case of the film carrier method, metal lead terminals are provided on a long polyimide tape of a constant width, and the metal protrusions on the electrode terminals of the semiconductor element and the lead terminals are connected simultaneously regardless of the number of electrode terminals. It is something to do. Therefore, in both methods, the reliability of the connection points is higher than in the wire bonding method described above, in which ultra-fine wires are connected to the electrode terminals one by one. ) and IJ-Do Togeko's breaking strength ￥f≠E 40 a N P Hon Asu Nime L
Semiconductor elements can be held only by banks or lead terminals.

Furthermore, for this reason, devices can be mounted by simply applying a thin protective coat to the surface of the semiconductor element, and it can be used as thinner and smaller packaging.

In this way, flip-chip and tape carrier methods offer reliability, small size, and thin packaging, and in the case of tape carrier methods, they can be handled in the form of long tapes, making them easy to operate at production sites where semiconductor devices are mounted. It has many features such as outstanding performance. However, a problem with this flip chip and tape carrier method is the formation of metal protrusions on the electrode terminals of the semiconductor device. In other words, it is assembly factories for televisions, radios, videos, etc. that produce portable devices that are smaller and thinner. These assembly factories must purchase semiconductor elements from semiconductor manufacturers to be incorporated into equipment. The problem at this time is that semiconductor manufacturers do not necessarily have the ability or equipment to form metal protrusions on all semiconductor elements.

Even with packaging technology that makes it smaller and thinner, it is not possible to demonstrate the commercial appeal of equipment in assembly plants.

Furthermore, even if a semiconductor manufacturer were able to form metal protrusions, there would be the following problems.

First, a conventional method for forming metal protrusions on a semiconductor element in a conventional flip-chip or tape carrier method will be described with reference to FIG. A barrier metal 4 is formed on the electrode terminal 3 which is covered with the protective film 2 on the semiconductor element 1 and is partially opened and exposed (FIG. 1a).

Barrier metal 4 is Or-Cu, Ti-Pa, Ni
It is made of a multi-layer vapor deposited film of -Cu, etc., and is formed by continuous vapor deposition in a high degree of vacuum, and the materials such as Cr, Ti, and Ni function to have adhesive strength with the electrode terminal 3.

Next, a photosensitive resin is applied to the entire surface of the semiconductor element 1,
A photosensitive resin pattern 6 having openings 5 formed only on the electrode terminal 3 is formed (FIG. 1b).

If the barrier metal 4 made of a multi-layered vapor deposited film is used as a negative electrode and electrolytic plating is performed (for example, using a solder material in the 7-lip chip method and an Au material in the film carrier method), only the area 5 in which the photosensitive resin pattern 6 has holes will be coated as shown in FIG. The metal protrusion 7 can be formed to a desired height as shown in FIG.

Next, the photosensitive resin pattern 6 is removed and a second photosensitive resin is applied anew, leaving the second photosensitive resin pattern 8 only around the metal protrusion (Fig. 1d). If the exposed rear metal is removed using the second photosensitive resin turn 8 as an etching mask and the unnecessary second photosensitive resin turn 8 is also removed, the structure shown in Figure 1e can be obtained. Obtainable. In the case of the flip-chip method, the wiring pattern is aligned with the wiring pattern on the circuit board in the state shown in FIG. 1e, and the metal protrusion and the wiring pattern are joined by solder reflow. In the case of film carrier method,
A metal protrusion 7 formed on a polyimide resin 9 is superimposed on the metal protrusion 7 on the completed semiconductor element 1, and the two can be bonded by applying pressure and heating using a jig 11 as shown at 12. If the metal protrusion 7 is plated with Au and the metal lead 10 is plated with Su, the Au can be plated by heating and pressurizing.
-A eutectic of Sn can be formed and bonded (first
Figure f)c However, in such a conventional process, the following problems were encountered.

(2) Since the barrier metal has a multilayer metal structure, it is necessary to pay attention to the adhesion between the metal films and the occurrence of barrier resistance in the metal layer. That is, if the adhesion between the metal films is weak, simply applying an external force to the metal lead 1o will cause separation between the metal films or separation between the barrier metal and the protrusion, which is impractical. Similarly, an increase in barrier resistance impairs the original electrical characteristics of a semiconductor element.

■ In order to carry out such a conventional process, a wide range of highly precise processes are required, including a metal film formation process, a plating process, a metal film etching process, and a photoetch process, and the metal projections are formed accordingly. Not only does this increase the cost of doing so, but it also causes a decrease in yield.

■ Furthermore, since highly dangerous chemicals are used to etch the barrier metal, they are harmful to the human body and require investment in pollution prevention. For example, potassium ferricyanide and caustic sorter solutions must be used for etching Cr, and HF-based solutions must be used for etching Ti.

■ In the film carrier method as shown in FIG. 1(f), eutectic 13 is generated when metal lead 1Q and metal protrusion 7 are bonded, and the eutectic also falls on the surface layer of semiconductor element 1. Since it is a high-temperature eutectic, it causes cracks in the protective film 2, reducing the protective effect of the electrode terminal 3 and lowering reliability.

OBJECTS OF THE INVENTION The present invention aims to provide a method for forming metal on a semiconductor device using a new bonding method that can further aggravate the above-mentioned problems of the conventional seven-chip one-film carrier method. .

Structure of the Invention The main feature of the present invention is that metal protrusions formed on a substrate are collectively bonded onto electrodes of a semiconductor element by a transfer method.

DESCRIPTION OF THE EMBODIMENTS Next, an embodiment of the present invention will be described with reference to FIG. A plurality of metal protrusions 22 are formed on the substrate 21 by, for example, electrolytic plating at positions corresponding to the electrodes of the semiconductor element. The metal protrusion 22 is made of Au. The semiconductor element 24 having the electrode 23 is absorbed by a tool 26 that can be pressurized and heated, the electrode 23 of the semiconductor element 24 and the metal protrusion 22 on the substrate 21 are aligned, and the tool 25 is lowered in the direction of the arrow 26 ( Figure 2 a).

Next, by applying pressure and heating using the tool 26, the metal protrusion 22 is peeled off from the substrate 21 and transferred and bonded to the aluminum wiring side, which is the electrode 23, of the semiconductor element 24 using an Au-Aλ alloy. become. This state is shown in FIG.

When transferring and bonding the metal protrusion 22 to the electrode 13 of the semiconductor element 14, it is possible to transfer and bond the metal protrusion 22 to the electrode 13 of the semiconductor element 14 by simply pressing the tool 26, or by applying ultrasonic vibration to the tool 15 or the substrate 11 side. By doing so, the efficiency of transfer bonding can be further improved.

The pressure during the transfer bonding is at least 5 lbs. per bump.
y~100fi, and the temperature can be selected from a range of 100°C to 560°C per 1 C (semiconductor element).

Next, the method of lifting the semiconductor element 24 with the metal protrusion transferred and bonded together with the tool 16 in the direction of the arrow in FIG. 2 and connecting it to a circuit board or film carrier type lead will be explained with reference to FIGS. 3 and 4. .

By aligning the wiring pattern 31 of the circuit board 30 and the metal protrusion 22 bonded to the electrode 23 of the semiconductor element 24, and applying pressure and heat to the semiconductor element 24 with the tool 32, or by applying ultrasonic vibration. , the metal protrusion 22 is joined to the wiring pattern 31 of the circuit board 30 to obtain the state shown in FIG.

That is, a connection using the conventional 7-lip chip structure can be easily obtained.

Next, the connection to the leads of the film carrier will be described in FIG. The film carrier is a long polyimide resin film 33 having openings at predetermined positions.
Lead 34 made of etched U foil and subjected to Sn plating treatment
has a structure that protrudes to the opening.

Metal protrusion 2 transferred and bonded onto the electrode of semiconductor element 24
2 and the lead 34 are aligned, and the tool 35 applies pressure and heat. The pressing force at this time is 5y per lead.
~100f, and the tool temperature is preferably in the range of 200°C to 660°C. Here, the lead 34 and the metal protrusion 22 are bonded by Sn on the lead side and Au on the metal protrusion forming a eutectic alloy. 34 crushes the metal protrusion 22 and forms a new bonding surface between the electrode 23 of the semiconductor element 24 and the aluminum wiring, so that the metal protrusion 22 and the electrode 23 can obtain stronger bonding force.

In the above-mentioned embodiment, the means for applying pressure and heating using only the tool 35 was described, but while applying pressure and heating using the tool 35, the opposite surface 36 of the semiconductor element 24 may also be heated. In such a system, tool 35
This has the effect of allowing the pressure and temperature to be set low.

Next, we will discuss the structure of the substrate on which metal protrusions are formed and peeled off. FIG. 6 shows one of the embodiments. Substrate 21
The base 40 is made of an insulating material such as glass, ceramic, or resin, and a metal film 41 is provided on its surface to form a conductive path during electrolytic plating. The metal film 41 must be made of a material that allows the metal protrusions 22 to be easily formed by electrolytic plating, while also being easily peeled off when aligned with the electrodes of the semiconductor element, pressurized, and heated. As a result of experiments, it has been found that materials such as Pd, Pt, ITO, Mo, and SuS are suitable for the metal film 41. The structure of the substrate 21 of the present invention is such that after forming the metal protrusions 22, the metal protrusions 22 are peeled off, transferred, and then plated again to form the metal protrusions 22 on the base 4o, and this cycle can be repeated multiple times. . Therefore, the plating mask material 42 is made of a material having durability and heat resistance, and is 5i02. Si3N4. Heat-resistant resin (e.g. polyimide resin), high resistance IT
A film of O, 0r203, etc. can be used.

Another embodiment of the substrate will be described in FIG. Figure 6 (a
), a protrusion 51 is formed at a predetermined position where a metal protrusion is formed on the surface of the base Q, which becomes a conductive path for plating,
The concave portion 62 is filled with an insulating material 53 so that a portion of the convex portion 61 protrudes. In such a state, the conductive path 4
0, the metal protrusion 22 is formed in the recess 52 as shown in the figure.

Next, when the electrode 23 of the semiconductor element 24 and the metal protrusion 22 are aligned, pressurized, and heated, the metal protrusion 22 is bitten into the center by the convex part 51 of the conductive path 40, and the metal protrusion 22 is bitten into the center part of the semiconductor element 24. The metal protrusion 2 is caused to flow in the direction of the arrow 54 as shown in FIG. 6(b) on the side near the electrode 23.
Substances that weaken the bond, such as oxides, that were formed on the surface of the electrode 2 are removed, and the fresh electrode surface comes into contact with the metal protrusion, making it possible to obtain a stronger bond.

By the method described above, metal protrusions can be bonded to electrodes of semiconductor elements in an extremely simple and inexpensive manner.

Next, we will discuss the case using the above method.

(2) In the conventional Noritsu chip and film carrier type bonding, the barrier metal on the semiconductor element is composed of a multilayer metal film, which causes problems such as adhesion between the multilayer films and the occurrence of barrier resistance. However, in the case of the present invention, since the metal interposed between the metal protrusion and the electrode wiring on the semiconductor element can be composed only of the metal protrusion, there is no separation between deposited films or occurrence of barrier resistance, which has been a problem in the past. Furthermore, since all the joints can be made into an alloyed state, the strength of the joints is high,
Moreover, barrier resistance can be significantly reduced and reliability can be improved.

■ Also, in the case of the method of the present invention, compared to conventional flip-chip and film carrier methods, when forming metal protrusions, there is a process of forming a multilayer film such as a barrier metal, and a process of forming this into a desired shape. photolithography process,
Not only does the process of etching and removing the multilayer film become unnecessary, but also the cost of materials can be eliminated, making it possible to realize a much cheaper and more economical process.

(2) Moreover, since the barrier metal, which is a multilayer film, is unnecessary and the etching of the barrier metal is unnecessary, there is no need to treat the solution used when etching these barrier metals.

For example, if a part of the barrier metal is made of a material such as Cr, the Or etching solution would use so-called polluting substances such as potassium ferricyanide and caustic soda, but with the structure of the present invention, there is no concern about pollution.

■ In the conventional configuration in which metal protrusions are formed on the semiconductor element, the metal protrusions are also formed on the semiconductor element, which causes poor electrical and appearance characteristics, which not only increases the cost of the process of forming the metal protrusions, but also increases the cost of the process of forming the metal protrusions. The price itself is affected by the yield of semiconductor devices. In the case of the method of the present invention, metal protrusions are bonded only to non-defective semiconductor elements, so
There is no waste in material costs or processes, and the economical effects are outstanding.

■ In the conventional film carrier method, the film tape can be supplied by a specialized manufacturer, but the process of forming metal protrusions on the semiconductor element through multilayer barrier metal is difficult for IC.

This cannot be done in a normal assembly factory where LSIs are most used. Forming metal protrusions requires an atmosphere and equipment similar to those used in semiconductor manufacturing. In other words, in order to form metal protrusions on a semiconductor element through a multilayer barrier metal, a photoetching process, which is characterized by a vapor deposition process, a photoetching process, a plating process, an etching removal process, a water washing process, etc., and which affects the yield, and a vapor deposition process are required. The cleaning process requires clean rooms and equipment used in semiconductor manufacturing. Owning these processes requires a huge amount of financial investment and semiconductor technology, so in assembly factories that have traditionally mounted electronic components by soldering, having these metal protrusion processes is not possible using the Flinop chip or film carrier method. The implementation is smaller.

Although it is highly possible to achieve thinning, it has been difficult.

Effects of the Invention In the method using the present invention, the film tape can be outsourced to a specialized manufacturer as in the past. Furthermore, since the metal protrusions are simply formed by plating on a designated substrate, there is no need to consider the adhesion strength of the plating itself. This is because the metal protrusions are transferred onto the electrodes of the semiconductor element, so it is better for the adhesion strength to be weaker.

Therefore, processing can be commissioned to a manufacturer specializing in plating. Furthermore, since the substrate of the present invention can be repeatedly recycled, the mounting cost can be further reduced. By using the method of the present invention, it is possible to entrust the production of film tapes and substrates with metal protrusions to specialized manufacturers, which eliminates the need to have in-house equipment and technology, unlike conventional flip-chip and tape carrier methods. Instead, in-house companies only need to prepare a so-called bonder that simply heats and pressurizes the product. At the assembly factory, we obtain a good quality semiconductor element with electrode wiring completed, transfer the metal protrusions using the bonder,
Then, all you have to do is bond it to the electrode wiring of the semiconductor element, connect it to a commissioned film tape, or directly bond it to the wiring pattern of the circuit board, so you can freely design products that are thin and compact. It is something that you have.

As described above, the present invention exhibits excellent industrial value in assembling and mounting electronic components such as semiconductor devices.

[Brief explanation of the drawing]

1(a) to 1(f) are process cross-sectional views showing the conventional Noribut chip and fill forming method, FIG. 3 is a 7-lip chip method for forming a semiconductor element having metal protrusions, and circuit (b) is a circuit using the metal protrusions of the present invention. FIG. 21...Substrate, 22...Metal protrusion, 2
3... Electrode, 24... Semiconductor element, 2
5...Tool, 3゜...Circuit board, 3
1...Wiring pattern, 33...Polyimide resin, 34...Lead, 40...
Base. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2 Figure 3 Figure 4 Figure 5 Figure 0 Figure 6 (a) (b)

Claims (1)

Scope of Claims: (1) A metal protrusion formed on a substrate is pressed into contact with an electrode extraction area on the semiconductor element, and the metal protrusion on the substrate is peeled off and transferred from the substrate, and the metal protrusion on the substrate is peeled off and transferred onto the semiconductor element. 1. A method of manufacturing a semiconductor device, the method comprising: bonding to an electrode extraction region of the semiconductor device. (2) A substrate for forming metal protrusions has an opening pattern for a mesh key at a position corresponding to an electrode extraction area of the semiconductor element, and the metal protrusion is formed in the opening pattern, and the semiconductor element Transferred to the upper electrode extraction area,
2. The method of manufacturing a semiconductor device according to claim 1, wherein after the bonding, the plating hole pattern of the substrate is plated again to form metal protrusions. (3) The method for manufacturing a semiconductor device according to claim 1, wherein pressure and heat are applied when transferring and bonding the metal protrusions on the substrate to the electrode extraction area of the semiconductor element. (4) The method for manufacturing a semiconductor device according to claim 1, wherein ultrasonic vibration is applied when transferring and bonding the metal protrusion on the substrate to the electrode extraction area of the semiconductor element. (6) Pressing the metal protrusion formed on the substrate to the electrode extraction area on the semiconductor element, peeling off and transferring the metal protrusion on the substrate from the substrate, and bonding to the electrode extraction area on the semiconductor element. A method for manufacturing a semiconductor device, comprising: aligning and bonding a conductor and a metal protrusion of the semiconductor element. (6) The method for manufacturing a semiconductor device according to claim 5, wherein the conductor is a circuit wiring pattern. (The method for manufacturing a semiconductor device according to claim 6, wherein the force conductor is formed on a conductor lead formed on a long insulating film or on a long conductive film. .