JPS605742Y2 - Voltage doubler rectifier circuit - Google Patents

Voltage doubler rectifier circuit

Info

Publication number
JPS605742Y2
JPS605742Y2 JP1818280U JP1818280U JPS605742Y2 JP S605742 Y2 JPS605742 Y2 JP S605742Y2 JP 1818280 U JP1818280 U JP 1818280U JP 1818280 U JP1818280 U JP 1818280U JP S605742 Y2 JPS605742 Y2 JP S605742Y2
Authority
JP
Japan
Prior art keywords
rectifier circuit
doubler rectifier
capacitor
voltage doubler
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1818280U
Other languages
Japanese (ja)
Other versions
JPS56120792U (en
Inventor
進 徳井
芳克 酒井
Original Assignee
横河電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 横河電機株式会社 filed Critical 横河電機株式会社
Priority to JP1818280U priority Critical patent/JPS605742Y2/en
Publication of JPS56120792U publication Critical patent/JPS56120792U/ja
Application granted granted Critical
Publication of JPS605742Y2 publication Critical patent/JPS605742Y2/en
Expired legal-status Critical Current

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  • Rectifiers (AREA)
  • Dc-Dc Converters (AREA)

Description

【考案の詳細な説明】 本考案は、±Eの両電源から実の片電源を作り負荷に与
える倍電圧整流回路の改良に関する。
[Detailed Description of the Invention] The present invention relates to an improvement in a voltage doubler rectifier circuit that creates a real single power supply from dual power supplies of ±E and supplies it to a load.

一般にこの種倍電圧整流回路は第1図に示すように、正
の直流電源+E1負の直流電源−E、ダイオードD1.
D2、コンデンサC1,C2およびA接点とB接点とを
発振器Oの出力によって交互に切換えるスイッチSWと
を有している。
In general, this kind of voltage doubler rectifier circuit, as shown in FIG. 1, consists of a positive DC power supply +E1, a negative DC power supply -E, a diode D1.
D2, capacitors C1 and C2, and a switch SW that alternately switches the A contact and the B contact by the output of the oscillator O.

スイッチSWがA接点(−E側)に接続されていると、
コンデンサC工に顧なる電圧が充電される。
When switch SW is connected to A contact (-E side),
The relevant voltage is charged to the capacitor C.

スイッチSWがB接点(基準点側)に切換わるとC工の
顧なる電圧がダイオードD2を介してコンデンサC2に
移り、負荷RLに顧の電圧を与える。
When the switch SW is switched to the B contact (reference point side), the voltage connected to the circuit C is transferred to the capacitor C2 via the diode D2, and the voltage applied to the load RL is applied.

とこころで倍電圧整流回路では出力電圧EOを沃塩上に
上げることは原理的にできないが、顧より少し下げるこ
とはできる。
By the way, although it is not possible in principle to raise the output voltage EO higher than that of the iodine with a voltage doubler rectifier circuit, it is possible to lower it slightly.

この手段として従来は、出力電圧調整用の可変抵抗器R
を第2図のように負荷RLに並列に接続したり、第3図
のようにRLに直列に接続することが行われている。
As a conventional means for this purpose, a variable resistor R for adjusting the output voltage has been used.
are connected in parallel to the load RL as shown in FIG. 2, or in series to the load RL as shown in FIG.

しかしながら第2図の回路では消費電流が増える欠点が
あり、第3図の回路では負荷変動が出力電圧に大きく影
響する欠点がある。
However, the circuit shown in FIG. 2 has the disadvantage that current consumption increases, and the circuit shown in FIG. 3 has the disadvantage that load fluctuations greatly affect the output voltage.

本考案の目的は、上述の如き欠点のない出力電圧調整手
段を有する倍電圧整流回路を実現するにある。
The object of the present invention is to realize a voltage doubler rectifier circuit having an output voltage adjusting means that does not have the above-mentioned drawbacks.

第4図は本考案回路の一実施例を示す接続図である。FIG. 4 is a connection diagram showing one embodiment of the circuit of the present invention.

第4図において、第2図および第3図の従来例と異ると
ころは、出力電圧調整用の可変抵抗器Rを正の直流電源
十EとダイオードD1との間に接続した点である。
The difference in FIG. 4 from the conventional examples shown in FIGS. 2 and 3 is that a variable resistor R for adjusting the output voltage is connected between the positive DC power source 1E and the diode D1.

このように構成すると可変抵抗器Rの大きさに応じてコ
ンデンサC□への充電がおさえられ、出力電圧Eoの調
整ができる。
With this configuration, charging of the capacitor C□ can be suppressed depending on the size of the variable resistor R, and the output voltage Eo can be adjusted.

すなわちRの抵抗値が零のとき出力電圧Eoが最大で消
費電流も最大となり、抵抗値を上げていけば出力電圧E
EOが下がると同時に消費電流も下がる方向になる。
In other words, when the resistance value of R is zero, the output voltage Eo is maximum and the current consumption is also maximum, and as the resistance value is increased, the output voltage E
As EO decreases, current consumption also decreases.

またコンデンサC2の容量が適当であれば負荷変動の影
響も小さい。
Furthermore, if the capacitance of the capacitor C2 is appropriate, the influence of load fluctuations will be small.

以上説明したように本考案の倍電圧整流回路によれば、
消費電流を増やすことなく、また負可変動の影響を大き
くすることなく出力電圧の調整を行うことができる。
As explained above, according to the voltage doubler rectifier circuit of the present invention,
The output voltage can be adjusted without increasing current consumption or increasing the influence of negative variable fluctuation.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図〜第3図は従来の倍電圧整流回路の一例を示す接
続図、第4図は本考案の倍電圧整流回路の一実施例を示
す接続図である。 +E・・・・・・正の直流電源、−E・・・・・・負の
直流電源、C1,C2・・・・・・コンデンサ、Dl、
D2・・・・・・ダイオード、SW・・・・・・スイッ
チ、RJ−、・・・・7.負荷、変抵抗器。 R・・・・・・可
1 to 3 are connection diagrams showing an example of a conventional voltage doubler rectifier circuit, and FIG. 4 is a connection diagram showing an embodiment of the voltage doubler rectifier circuit of the present invention. +E...Positive DC power supply, -E...Negative DC power supply, C1, C2...Capacitor, Dl,
D2...Diode, SW...Switch, RJ-,...7. load, resistor. R・・・・・・possible

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 正の直流電源が第1のダイオードを介して一端に接続さ
れている第1のコンデンサと、このコンデンサの他端を
負の直流電源と基準点とに交互に切換接続するためのス
イッチと、前記第1のコンデンサに貯えられた充電電圧
を第2のダイオードを介して取り出すための第2のコン
デンサを有する倍電圧整流回路において、前記正の直流
電源と前記第1のダイオードとの間に出力電圧調整用の
可変抵抗器を接続したことを特徴とする倍電圧整流回路
a first capacitor having one end connected to a positive DC power source via a first diode; a switch for alternately connecting the other end of the capacitor to a negative DC power source and a reference point; In a voltage doubler rectifier circuit having a second capacitor for taking out the charging voltage stored in the first capacitor via a second diode, an output voltage is set between the positive DC power supply and the first diode. A voltage doubler rectifier circuit characterized by connecting a variable resistor for adjustment.
JP1818280U 1980-02-15 1980-02-15 Voltage doubler rectifier circuit Expired JPS605742Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1818280U JPS605742Y2 (en) 1980-02-15 1980-02-15 Voltage doubler rectifier circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1818280U JPS605742Y2 (en) 1980-02-15 1980-02-15 Voltage doubler rectifier circuit

Publications (2)

Publication Number Publication Date
JPS56120792U JPS56120792U (en) 1981-09-14
JPS605742Y2 true JPS605742Y2 (en) 1985-02-22

Family

ID=29614503

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1818280U Expired JPS605742Y2 (en) 1980-02-15 1980-02-15 Voltage doubler rectifier circuit

Country Status (1)

Country Link
JP (1) JPS605742Y2 (en)

Also Published As

Publication number Publication date
JPS56120792U (en) 1981-09-14

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