JPS6054755B2 - induction heating cooker - Google Patents

Description

[Detailed description of the invention] The present invention relates to an induction heating cooker.

Induction heating cookers rectify commercial AC power and convert it into DC voltage such as pulsating voltage.
A magnetic field is generated by oscillating at a high frequency of about 0 to 40 KHz and the resulting high-frequency alternating current is applied to an induction coil, and this magnetic field is applied to a cooking pot made of ferrous metal placed close to the induction coil. This is heated by induction.

A self-controlled oscillation method is known as an inverter driving method for this type of cooker.

When such a self-controlled oscillation inverter is used, a control means is required for generating an oscillation trigger signal by the inverter itself to open and close switching elements built into the inverter. The present invention uses such control means to control the opening and closing of the switching elements, and at the same time provides oscillation protection means in case this control means does not operate normally and an abnormality occurs in oscillation.

Embodiments of the present invention will be described below based on the drawings.

FIG. 1 shows the appearance of the induction heating cooker according to the present invention,
1 is a top plate on which a pot is placed, and is made of an insulating plate made of ceramic or the like. 2 is a power switch, and 3 is a slide knob for output adjustment, which can be set arbitrarily between output "strong" (1200W) and output "weak" (200W).

FIG. 2 shows a circuit diagram of an embodiment of the present invention, in which 4 is a commercial AC power source, 2 is the power switch, 5 is a fan motor for cooling circuit components, and 6 is a thermostat that connects the fan motor 5.
There is a device to protect circuit components from abnormal heating due to stoppage and dry cooking.

7 is a rectifier circuit formed by bridge-connecting diodes 8 is a filter circuit, which includes a coil 9 and a filter capacitor 1
Consists of 0.

Reference numeral 11 is an induction coil wound into a flat plate shape and placed close to the back surface of the top plate 1 (FIG. 1).

12 is a switching element connected in series with the induction coil 11, and in this embodiment, it is a GCS (gate controlled
Switch) (product name) is used.

13 is a flywheel diode connected in antiparallel between the anode and cathode of the GCS 12, and 14 is a resonant capacitor. These induction coil 11, GCSI 2, flywheel diode 13, and resonant capacitor 14 constitute an inverter 15.

This inverter 15 is called a self-limiting inverter, and a starting signal generating circuit 24 that outputs the first trigger pulse
The device includes a gate signal generation circuit 23 that continues oscillation after activation, and once triggered, continues oscillation by the gate signal. The activation signal generation circuit 24 and gate signal generation circuit 23 will be described later. P
1 is a cooking pot made of ferrous metal such as iron or stainless steel placed on a top plate 1 (FIG. 1), to which a high frequency alternating magnetic field generated by an induction coil 11 is applied.

16 is an inverter drive circuit that gives a positive or negative on/off signal to the gate of GCS12, 17 is a flip-flop that controls this inverter drive circuit 16, and 18 and 19 are AC power supply voltages applied via a step-down transformer. The rectifier circuit 20 is a constant voltage circuit into which the voltage rectified by the rectifier circuits 18 and 19 is input, and the DC voltmeter VB (±12V) is stabilized from the input side of the circuit 20 and stabilized from the output side. A DC voltage Vcc (8V) is taken out.

Here, the voltage regulator VB is used as a drive power source for the inverter drive circuit 16, and the voltage Vcc is supplied as a drive power source to each control circuit described later. Further, the voltage +VB is supplied as a power source to the inverter 15 via the resistor 21 and the diode 22, and when the power supply voltage of the inverter 15 drops below the value of +VB, it serves to assist this and maintain the lowest voltage at approximately +VB. . To add an explanation here, in the inverter 15 according to this embodiment, the capacitance of the capacitor 10 is set to be small in order to improve the power factor, and therefore the power supply voltage of the inverter 15 is almost flat. It is a pulsating flow that does not slip. Therefore, when the power supply voltage reaches its minimum, it will be less than about 10V, and there is a possibility that the inverter will not be able to continue oscillating. In this embodiment, in order to prevent this drawback, DC voltage +VB is provided as an auxiliary power source. Next, 23 generates a trigger pulse for self-controlled oscillation, and GCS12
This is a gate signal generation circuit that gives on/off signals to the gate of
is detected by the diode 4 (6, transistor 47), and its output sets the flip-flop 17, and the GCSl
Give a gate signal to 2.

Furthermore, this gate signal generation circuit 23 includes a current transformer CT which is wound around the line between the cathode and ground of the GCS12 and detects the current, and an output signal VCT<5 of the current transformer CT on the input side of the induction coil 11. It is equipped with a comparator circuit COM2 which takes the voltage VA as two inputs and compares the two with the voltage V^ as a reference level, so that VCT≧′γ■
When it becomes calm, the flip-flop 17 is reset with the output, and the gate signal of GCSl2 is cut off.
This is to turn off No. 2.

Reference numeral 24 denotes a starting signal generating circuit that provides the first starting pulse for the inverter 15, and generates starting pulses at a predetermined period τ, for example, at a period of 0.4 seconds.

Although this oscillation cycle can be set arbitrarily, it is not desirable for the inverter 15 to start oscillating too late after the power is turned on.
In practice, it is sufficient to set the time to about 1 second or less. 25, even if the gate signal generation circuit 23 does not operate after GCS12 is made conductive by the activation pulse, GCS12 is unconditionally switched off after a certain period of time has passed after conduction to prevent destruction of GCS12 due to excessive current. , a protection circuit for preventing frequency drop, etc.; 26 detects the suitability of the cooking pot P;
If an unsuitable load is placed on the top plate 1, such as an overloaded copper pot or aluminum pan, or an underloaded knife or fork, etc., the load detection circuit 27 that stops the inverter oscillation detects that the load is unsuitable. 28 is an output control circuit that adjusts the output in the range of approximately 200 to 1200 W. Actual operation is performed using the slide knob 3 (Fig. 1). ) by sliding it.

Reference numeral 29 denotes an initial clear circuit, which is composed of an integrating circuit consisting of a resistor 30 and a capacitor 31, and is used to reset the flip-flop 17 when the power is turned on.

Next, various operations of the induction heating cooker having the above configuration will be described in detail with reference to waveform diagrams.

(1) Normal heating operation (Fig. 3) When a suitable load such as an iron pot is placed on the top plate 1 and the power switch 2 is turned on, the initial clear circuit 2
9 works and the L level signal is NAND gate N7VsJ
Dl and sets its output to H level.

In this state, the activation signal generation circuit 24, which is composed of an astable oscillation circuit, starts operating. That is, this starting signal generation circuit 24 includes a comparison circuit COMl, whose signal terminal e is given the output of a time constant circuit made up of a resistor 32 and a capacitor 33, and the reference terminal 4 is supplied with a voltage Vcc from a resistor 34, A reference level V+ obtained by voltage division at 35 and 36 is added. Therefore, when the time τ (0.4 seconds) determined by the above time constant has elapsed after the power is turned on, the charging voltage of the capacitor 33 reaches the reference level V+, and the output of the comparator circuit COMl is reversed from H level to L level. do. This falling signal to the L level is shaped into an L level pulse through a differentiating circuit comprising a capacitor 37 and a resistor 38 at the next stage, and is input to the NAND gate NAND3. Since the other inputs of this NAND gate NAND3 are now at H level, its output becomes H level and is applied to the next stage NAND gates N and AND4.

At this time, the other inputs of the NAND gate NAND4 are both high.
Since it is at the level, an L level pulse is obtained at its output,
Flip-flop 17 is inverted and NAND gate NAND
The output of l is set to L level. As a result, transistors 39 and 40 in the inverter drive circuit 16 are both turned on, transistors 41 and 42 are turned off, and transistor 4 is turned on.
3 is turned on, and a forward bias voltage +VB is applied to the gate of GCSI2, making it conductive. Thus inverter 1
5 starts oscillating.

To further explain the oscillation operation after this, first, GCSl2
Due to conduction, a load current 1L flows through the induction coil 11 and GCS12. This load current 1L is detected by the current transformer CT, converted into a voltage signal VCT proportional to its magnitude, applied to the gate signal generation circuit 23, and inputted to the signal terminal e of the comparison circuit COM2. The reference terminal 1 of this comparison circuit COM2 is connected to the power supply voltage VA to the load.
is input after being divided by resistors 44 and 45, and a reference level V+ that changes in accordance with the power supply voltage is added to this level V.
+ determines the peak current of GCS12. Here, reference level ■+ will be explained. The power supply voltage used in this embodiment is hardly smoothed because the capacitor 10 has a small capacity in order to improve the power factor, and the voltage is approximately 150mm at maximum.
Draw a pulsating waveform in a minimum range of about 12V. Therefore, the signal detected by the current transformer CT also pulsates proportionally. Therefore, if the reference level V+ is set and fixed according to the maximum value of the power supply voltage, when the power supply voltage becomes low, the detection voltage CT will also decrease and the difference from the reference level V+ will become extremely large. . As a result, when the voltage drops, the output of the comparator circuit COM2 becomes an extremely low frequency signal of several KHz, which generates loud noise and reduces the product value. In addition, the load current 1L is expressed by the following equation.

In the formula, L is the equivalent inductance of the induction coil 11, and R is the equivalent resistance. In the above equation, the time T1 for IL to reach the peak value 1p is expressed by the following equation. From this formula, L.
．． If R and Ip are constant, T1 depends only on V^, and a current frequency-modulated according to the pulsating voltage VA flows through the induction coil 11.

In order to prevent such a phenomenon from occurring, in this embodiment, the oscillation frequency is stabilized by changing the reference level V0 in proportion to the power supply voltage as described above. Now, in the comparator circuit COM2, the input signal ■ to the signal terminal e.

, rises and becomes equal to the reference level V+, its output is inverted to H-+L and resets the outputs of the NAND gates N and ANDl to H. As a result, transistors 39, 40
turns off, transistor 41 turns on, transistor 43 turns off, transistor 42 turns on, and G
Reverse bias-VB is applied to the gate of CSl2, and GC
Sl2 is turned off. Let us now assume that the conduction period of GCS12 is T1. Next, by turning off the GCS12, charging of the resonant capacitor 14 is started by the electromagnetic energy accumulated in the induction coil 11, and when the discharging of the electromagnetic energy is completed, discharging of the resonant capacitor 14 starts.

The period for charging and discharging the resonant capacitor 14 is defined as T2.
When the resonant capacitor 14 finishes discharging, the electromagnetic energy accumulated in the induction coil 11 in the opposite direction to that of the previous discharge is discharged through the flywheel diode 13. The conduction period of the flywheel diode 13 is defined as T3. During this T3 period, a reverse bias voltage C corresponding to the forward ON voltage value of the flywheel diode 13 is applied between the anode and cathode of GCSl2, so even if a positive electric signal is applied to the gate. This also does not conduct. On the other hand, the voltage ■C is applied to the gate signal generation circuit 23.

That is, voltage Vc is applied to the base of transistor 47 via diode 46, turning it off during period T. Therefore, the collector voltage of transistor 47 is T,
During this period, it becomes H level, and the rising signal is shaped into an H level pulse through the capacitor 48 and resistor 49 in the next stage, and then input to the NAND gate NAND5. At this time, since the other inputs of the NAND gate NAND5 are at the H level, an L level pulse is obtained as its output, which is input to the next stage NAND gate NAND3. This NAND gate NAND
3, the other inputs are at H level, so an H level pulse is obtained as an output and is further applied to the next NAND gate NAND. Since the other inputs of this NAND gate NAND are both at H level, its output is L.
A level pulse is obtained and applied to the NAND gate NAND2 of flip-flop 17.

As a result, the flip-flop 17 is reset and the output of the NAND gate NAND1 changes to L level. This L level signal turns on the transistors 39 and 40 again, turns off the transistor 41, turns on the transistor 43, and turns off the transistor 42, so that a forward bias voltage +VB is applied to the gate of CCS12. This operation is performed at the beginning of the T3 period, and this state is maintained during this period.
Therefore, the release of electromagnetic energy from the induction coil 11 via the flywheel diode 13 ends, and at the same time the voltage Vc changes to positive, GCSl2 becomes conductive and the load current becomes 1L again.
flows through this GCSl2 and the next cycle of self-controlled oscillation begins.

In this manner, after the oscillation is started by the starting pulse, self-controlled oscillation is performed at a frequency of about 20 to 40 KHz depending on the load condition. In such a self-controlled oscillation state, the output of the NAND gate NANDl repeats ゛"H゛゜゜L" corresponding to the oscillation frequency, but this L level signal is
and the signal terminal e of the comparator circuit COMl via the resistor 51.
clamp to a low level. Therefore, the output of the comparator circuit COM1 is also clamped to H level, and no starting pulse is generated. (2) Load detection operation (Figure 4) For induction heating cookers, if the load is inappropriate, if the load is heated as is, an excessive current will flow to the inverter, damaging the GCS12, or causing damage to knives, forks, etc. If you heat up a small load and unknowingly touch it, you may get burned. If you heat it without a load, an excessive voltage will be generated in the inverter, destroying the CCS12, or wasting power. The problem of putting it away occurs.

Therefore, if these unsuitable loads are placed on the top plate 1, or if there is no load, it is necessary to stop driving the inverter 15 and stop the heating operation. Load detection is performed by a load detection circuit 26 as described below. This circuit will be explained using FIG. 4A, starting with the appropriate load detection operation. On top plate 1,
When a suitable load such as an iron pot or a stainless steel pot is placed, during the T3 period when the voltage Vc is negative, the transistor 47 of the gate signal generation circuit 23 is in an off state, and its collector ● Voltage VCE is at H level.
This H level signal is input to an integrating circuit comprising a resistor 52 and a capacitor 53 in the load detection circuit 26, and the integrated output is further applied as a signal V- to the signal terminal e of the comparator circuit COM. On the other hand, a reference level V+ obtained by dividing the voltage Vcc by resistors 54, 55, and 56 is applied to the reference terminal 1 of the comparison circuit COM. Therefore, the capacitor 53 is charged during the period T3 and discharged during the periods Tl and T2, and this charging voltage is compared with the reference level V0 in the comparator circuit COMl. Here, in the case of a suitable load, the ratio of period T3 to one period T (=T1+T2+T3) of self-controlled oscillation is relatively small, so the capacitor 5
The amount of electricity integrated in step 3 also has a relatively small value, and its voltage level is kept substantially constant at a low level. Therefore, this voltage never reaches the reference voltage V+, and the output of the comparison circuit COM4 is held at H level. Therefore, the NAND gate NAND5 is left open to enable self-controlled oscillation drive by the gate signal generation circuit 23. Next, the operation when an excessive load or a small load is placed on the top plate 1 and when there is no load will be explained with reference to FIG. 4B.

In such a load state, the proportion of the conduction period T3 of the flywheel diode 13 in the oscillation period T increases. That is, the charging time of the capacitor 53 increases and the discharging time decreases compared to when the capacitor 53 is under an appropriate load, so that the charging pressure of the capacitor 53 gradually increases and eventually becomes equal to the reference level V+. At this point, the comparison circuit CO
The output of M4 outputs an L level pulse and closes the NAND gate NAND5. Therefore, NAND gate NAND
3, NAND is also closed, the set input to flip-flop 17 is blocked, and at the same time, it is reset by the output of comparison circuit COM2, and the output of NAND gate N, ANDl is fixed at H level. Such flip-flop 1
7, the inverter 15 stops oscillating.
In this manner, the heating operation is stopped under inappropriate load conditions. In this inappropriate load detection state, NAND gate N
Since the output of ANDl is fixed at H level, the inhibition of the activation signal generation circuit 25 is released and a activation pulse is generated after time T (approximately 0.4 seconds).

This starting pulse is given to the inverter 15 as an oscillation trigger signal, and the inverter 15 is restarted. However, if the unsuitable load condition continues, the load detection circuit 26 determines the unsuitability as described above and operates the inverter 15. to stop. In this way, the operation of starting and stopping is repeated until the inappropriate load condition is released. In addition, in an inappropriate load state, the time from when the inverter 15 is started until it is stopped by the load detection circuit 6 is several milliseconds, which is sufficiently short compared to the start signal period τ, and the load is not heated. There isn't. After that, when this unsuitable load is replaced with a suitable load, normal self-controlled oscillation is restored. The following table shows the period ratio T3/T and charging voltage of capacitor 53 for various loads.
- indicates the value.

As is clear from this table, the value of T3/T is in the range of approximately 0.2 to 0.3 under suitable loads made mainly of iron and stainless steel, while on the other hand, under unsuitable loads made of aluminum plates or in a no-load state. It is 0.3 or more. This difference also appears in the charging voltage V- of the capacitor 53, and with an appropriate load, 2
．． 0V or less, and 2.0V or more for inappropriate loads. Therefore, the reference level V+ of the comparison circuit COM4 is set to 2.0V.
If set to , it is possible to distinguish between suitable loads and unsuitable loads. Although the load on small items is not shown,
The value is approximately midway between the values for the aluminum plate and the iron/stainless steel pot shown in the table, and this value is 2.0V or higher, which is determined to be an inappropriate load. Note that when an inappropriate load is determined and the oscillation of the inverter 15 is stopped, the transistor 47 is held in an on state, and the charge voltage of the capacitor 53 is discharged through the transistor 47. Therefore, the output of the comparison circuit COM, is L
After a certain period of time has passed, it returns to H level.
(3) Alarm generation operation (Fig. 5) Now, when an inappropriate load is detected, the oscillation drive of the inverter 15 is stopped, but in this embodiment, the output of the comparison circuit COM4 is It is configured to be added to the alarm generation circuit 27 to drive it and notify the user that an inappropriate pot has been placed and that the heating operation has been stopped.

That is, when an L level pulse is emitted from the comparator circuit COM4, this signal is inverted by the inverter 57 and passed through the resistor 58.
, a comparison circuit C via an integrating circuit consisting of a capacitor 59.
Input to signal terminal θ of OM.

However, this pulse signal causes the voltage ■Cc to change to the resistances 60 and 61.
If the voltage is larger than the reference level V+ obtained by dividing the voltage at
is driven to emit a pulse sound. Since the load/load detection operation is performed every time a starting pulse is generated, the output of the comparator circuit COM becomes L level at 0.4 second intervals, and a pulse sound is emitted in synchronization with this. If the generation period of this pulse sound is set to a period shorter than 0.4 seconds, for example, 0.1 seconds, an intermittent alarm sound of 0.4 seconds j cycles can be generated to attract the user's attention. (4) Output adjustment operation (FIG. 6) Output adjustment is performed by operating the variable resistor 63 built into the output control circuit 28.

The control circuit 28 in this embodiment changes the rate of oscillation and stopping of the inverter 15 within a period of approximately 1@.
In other words, the power supply voltage is connected to the reference terminal 4 of the comparator circuit COM6.
A reference level signal V+ obtained by dividing Cc by resistors 64 and 65 is applied to the signal terminal θ by the output of an integrating circuit consisting of a resistor 66 and a capacitor 67, and its time constant is set to approximately 1 (8). Comparator circuit COM6 The output is inputted to the signal terminal θ of the next-stage comparator circuit COM7 via an integrating circuit consisting of a diode 68, a resistor 69, and a capacitor 70.

A reference level signal V+ obtained by dividing the power supply voltage Vcc by a variable resistor 63 and a resistor 71 is applied to the reference level terminal 1 of the comparator circuit COM7, and this reference level V+ is applied to the variable resistor 63 by the operation of the variable resistor 63. In other words, slide knob 3
It is set to an arbitrary value by sliding as shown in Fig. 1. When the input signal to the terminal θ exceeds the reference level V+ thus set, the output of the comparison circuit COM7 is inverted to L level, and the output of NAND gate NAND4 is changed to H level. This inverts the flip-flop 17 and stops the oscillation of the inverter 15. In other words, the comparison circuit COM7
The inverter 15 oscillates only during the period when the output of the inverter 15 is at H level. FIG. 6A shows the case where the resistance value of the variable resistor 63 is set to the minimum, that is, the output is set to the minimum, and FIG. 6B shows the case when the resistance value of the variable resistor 63 is set to the maximum, that is, the output is set to the maximum. When the temperature is small, heating is performed for 1 d out of 10 seconds, and when the output is maximized, the signal voltage does not reach the reference level and the output of the comparator circuit COM is always H.
held at the level. As a result, at maximum output, the inverter 15 continues to oscillate without a pause period. As described above, the output can be arbitrarily adjusted within the range of about 200 to 1200 W, and cooking can be performed at the most appropriate output (heating power). (5) Protection circuit operation (Fig. 7) In this embodiment, the current flowing through GCSl2 is detected by the current transformer CT, and the current is controlled so that the value does not exceed a certain value, especially at startup or during operation. The magnetization state of the ferrite magnet wound around the current transformer CT changes depending on the magnitude and timing of the rise of the load current.
There may be cases where a detection current proportional to the load current cannot be obtained.

When such a phenomenon occurs, the gate signal generation circuit 23 does not work, the conduction time of the GCS12 becomes abnormally long, and an accident occurs in which an excessive current flows through the GCS12 and the circuit is destroyed.
Protection circuit 25 is installed to protect GCSl2 from such accidents.
is provided. If the current transformer CT does not correctly detect the current and the protection circuit 25
Even if current continues to flow through the GCS12, it is unconditionally turned off when a certain period of time has passed after the GCS12 conduction. That is, the activation signal generation circuit 24 operates and the L comparison circuit C
When the OMl output changes to L level, this signal is passed through the resistor 72,
It is applied to the reference terminal 1 of the comparator circuit COM3 via the diode 73, and the reference level voltage V+ obtained by dividing the power supply voltage EEVCC by resistors 74 and 75 is applied to the reference terminal 1. On the other hand, the activation pulse causes the flip-flop 17 to
Since the output of the NAND gate NANDl becomes L level, the transistor 76 is turned off and the capacitor 77
The charging pressure of increases. That is, the output of the integrating circuit consisting of the resistor 78 and the capacitor 77 is connected to the signal terminal θ.
The comparator circuit COM3 provided to
The output of l changes to H level. Therefore, the inverter drive circuit 16 operates to turn off the GCSl2, and then the H level output of the NAND gate NANDl turns on the transistor 76 again and discharges the charge voltage of the capacitor 77, so the output of the comparator circuit COVL3 is Immediately returns to H level. The output terminal of the protection circuit 25 and the output terminal of the gate signal generation circuit 23 are OR-connected and given to the NAND gate NANDl, so even if there is no output from the gate signal generation circuit 23, the operation of the protection circuit 25 will cause
Sl2 will be turned off. Further, the protection circuit 25 is
When the activation signal generating circuit 24 is activated, it is configured to first operate with a low input for a certain period of time, and then operate with a normal input.

In other words, the reference level V+ of the comparator circuit COM takes two values: a low level V+ (L) and a high level V+ (H),
Level V+ (H) is when the activation signal generation circuit 24 is stopped, and level V+ (L) is when the activation signal generation circuit 24 is stopped.
corresponds to when the comparator circuit COMl is activated.
This is achieved by applying the output of 0 to the reference terminal 1 of the comparator circuit 1 through a resistor 72 and a diode 73.
That is, as described above, when the current transformer CT does not detect a current and the gate signal generation circuit 23 does not operate, the inverter 15 is driven to oscillate by the pulse generated from the protection circuit 25, but at this time, the load is If the load is inappropriate, such as, an excessive current will flow through the GCS12, and there is a risk that it may be destroyed. On the other hand, when there is no load, there is a risk that an excessive voltage will be applied to the GCS12 and it will be similarly destroyed. Therefore, immediately after the power is turned on, the frequency of the output pulse of the protection circuit 25 is set to 3, for example.
Increase the frequency to around 5KHz and lower the input to the load GCSl2
Reduce the current flowing to G and the voltage applied to it.
It protects CS12. On the other hand, when the input is low, the load detection circuit 26 simultaneously determines whether the load is appropriate, and if the load is inappropriate, the inverter oscillation immediately stops. In this case, the period from start to stop is several milliseconds, whereas the start signal generation period is set to about 20 milliseconds, so the oscillation stop timing can be sufficiently within the high frequency oscillation period by the protection circuit 25. can. Therefore, there is no risk that the load detection operation will extend into the low frequency oscillation period and cause the maximum current to flow under an inappropriate load.The protection circuit 25 also determines the minimum oscillation frequency and prevents the oscillation frequency from dropping to the audible range. It acts to prevent

For example, in this embodiment, when the oscillation of the inverter 15 is started from a no-load state, the oscillation frequency becomes the lowest audible frequency of 1 KHz, which causes noise generation. By starting oscillation at a high frequency, it is possible to prevent such noise generation.
In addition, when using a pot made of 18 stainless steel, for example, where the induction coil 11 has a large equivalent inductance and resistance, the oscillation frequency of the inverter is 20 KHz.
Although the frequency drops to the following frequency, this is prevented by the action of the protection circuit 25.

The overall structure and operation of the induction heating cooker according to the present invention have been described in detail above, but a particularly important point of the present invention is that a protection circuit is provided so that the self-controlled oscillation inverter always oscillates normally.

In other words, in the present invention, in order to protect the switching element, in order to protect the switching element, the gate signal generation circuit that controls self-controlled oscillation is configured to generate a constant signal after the switching element is turned on, taking into consideration the rare case where the gate signal generation circuit that controls the self-controlled oscillation does not correctly detect the detected current. When the time has elapsed, this is cut off unconditionally to prevent excessive current from flowing to the switching element. This ensures a long life of the switching element. Further, according to the present invention,
Since the operation of the protection circuit initially starts with oscillation at a low input, that is, at a high frequency, the drawback of noise generation due to a decrease in frequency, which conventionally occurs in a no-load state, can be prevented.

[Brief explanation of drawings]

FIG. 1 is a perspective view of an embodiment of the induction heating cooker of the present invention, FIG. 2 is a circuit diagram of the embodiment, and FIGS. 3 to 7 are signal waveform diagrams for explaining the operation of the embodiment. 15... Inverter, 16... Inverter drive circuit, 23... Gate signal generation circuit, 24... Start signal generation circuit, 25... Protection circuit, 26... Load detection circuit, 27... - Alarm generation circuit, 28...output control circuit.

Claims (1)

[Claims] 1. In an induction heating cooker that includes a self-controlled oscillation inverter that once starts oscillation, it generates an oscillation trigger signal by itself to control the opening and closing of switching elements to continue oscillation, and detects the current flowing through the inverter at the appropriate location. a control means that compares the signal with a reference level signal and shuts off the switching element when the detection signal reaches a given reference level; and a control means that detects a period of current conduction at a suitable location of the inverter and that the period of conduction reaches a given value. An induction heating cooker, characterized in that it is further provided with another control means that shuts off the switching means when the temperature reaches the maximum temperature.