JPS605346A - Test control system of information processor - Google Patents

Abstract

PURPOSE:To conduct a test of the normalcy of an information processor by setting a control flag which specifies whether the information processor is tested or not according to the in-use environment of the information processor, and deciding on the state of the flag when a power source is turned on. CONSTITUTION:A test microprogram 41 for testing the normalcy of the information processor 100, a control microprogram 42 for an instruction execution control part 2, and the control flag 43 which indicates whether a test is conducted or not are stored on a floppy disk 4, and a service processor 3 reads the control flag 43 through a signal line 12 when the power source is turned on to decides on whether the flag indicates ''RUN'' or ''PAS''. When the ''RUN'' is indicated, the processor 3 reads the program 41 out of the disk 4 through the signal line 12 and loads it in the control memory 21 in an instruction execution control part 2 to conduct the test. When the normalcy is confirmed, the program 42 is read out and loaded in the memory 21. When not, that is displayed on a console display device 5.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a test control method for confirming the normality of an information processing device.

[Prior art]

Conventionally, the normality of an information processing device has generally been confirmed by executing a maintenance test program (TMP).

However, with this method, there is a need for an operator on the information processing device side, which is the device under test, to perform the operation to flow the TMP, and information processing from a 4P storage medium such as a disk back or magnetic tape is required. There were problems such as the need to prepare peripheral charges in the system for loading into the device. For this reason, recent information processing devices
We have established a testing mechanism for the hardware configuration (including firmware for microprogram-controlled information processing devices).
Some devices are now available that automatically test the normality of the information processing device using such a test mechanism when the power is turned on. However, in the case of this type of information processing equipment, the test mechanism unconditionally performs a test when the power is turned on, so the system start-up time of the information processing equipment always takes an extra amount of time for the test. Become. Therefore, the system startup and shutdown of the information processing equipment, such as testing, adjustment, and program debugging of the information processing equipment, are frequently performed.
In this case, it takes a long time to start up the system, and it has the disadvantage that it is inefficient.

[Purpose of the invention]

An object of the present invention is to control whether or not to perform a normality test according to the usage environment of an information processing device, and to shorten the system start-up time after power is turned on when there is no need to perform a test. It is in.

[Summary of the invention]

In order to achieve the above object, the present invention provides a control flag that specifies whether or not to test an information processing device, and when the power is turned on, the content of the control flag is determined and it indicates that the test is to be performed. The normality test of the information processing device is performed only when the information processing device is running.

[Embodiments of the invention]

The figure is a block diagram of one embodiment of the present invention. Here, 1
The block surrounded by the dashed dotted line indicates the information processing device 100 that is the device under test. The information processing device 100 includes a main memory section 1 that stores instructions and data, and an instruction execution control section 2 that controls execution of instructions, and an internal bus 10 connects the two. The instruction execution control unit 2 includes a control memory 21 and a logic circuit n. The information processing device 100 includes
In addition to these, there are input/output devices, their control units, and communication control units that control communication lines, but these are omitted here. Instruction execution control unit 2 of information processing device 100
testing of the information processing device 100 via the signal line 11;
A service processor 3 that controls adjustments etc. is connected to the service processor 3, and a floppy disk 4 is connected to the service processor 3.
and the console display 5 are connected to the signal line 12, respectively.
13. On floppy disk 4,
In addition to the test microprogram (test firmware) 41 that tests the normality of the information processing device 100 and the control microprogram 42 of the instruction execution control unit 2, a control flag 43 that instructs whether or not to perform a test using one test microprogram 41. is retained. Hereinafter, it is assumed that the control flag 43 is set to ``RUN'' when a test is performed, and ``PAS'' when a test is not performed.

Now, when the information processing device 100 is powered on, the service processor 3 reads the control flag 43 from a predetermined location on the floppy disk 40 via the signal line 12, and determines whether it is "RUN" or not. ”. Then, when the control flag 43 is “RUN”,
The service processor 3 reads the test microprogram 41 from the floppy disk 4 via the signal line 12, and loads it into the control memory 21 in the instruction execution control unit 2 via the signal line 11.

Next, the 1 service processor 3 runs the test MyMallo program 41 loaded into the control memory 21. The test microprogram 41 is designed to test the normality of the logic circuit n in the instruction execution control section 2, the main memory section 1, etc., and by running the test microprogram 41, these parts are tested. Health is tested.

The test result by the test microprogram 41 is notified to the service processor 3 via the signal line 11. When the normality of the information processing device 100 is confirmed, the service processor 3 connects the floppy disk 4 via the signal line 12.
The control microprogram 42 is read out from the control memory 21, loaded into the control memory 21 via the signal line 11, and the microprogram 42 is run. Thereby, the information processing device 100 shifts to normal processing. On the other hand, if the information processing device 100 is not normal, the service processor 3 displays a message to that effect on the console display 5 via the signal line 13. The operator displays the console display 5
Check and take appropriate action.

Next, a case will be described in which the control flag 43 read from the floppy disk 4 indicates "PAS" when the information processing apparatus 100 is powered on.The control flag 43 indicates "PAS".
PAS'', the service processor 3 uses the bus to read the test microprogram 41, immediately reads the control microprogram 42 from the floppy disk 4, and transfers it to the control memory in the instruction execution control unit 2 via the signal line 11. 21. Next, 1 service processor 3
causes the control microprogram 42 loaded into the control memory 21 to run. In this way, the control flag 43 is @
In the case of ``PAS'', the loading of the test microprogram 410 into the control memory 21 and the resulting test are omitted, so the system startup time can be shortened by that amount.

Note that the control flag 43 needs to be arbitrarily rewritten according to the usage environment of the information processing device 100, but this can be done as follows. When rewriting the control flag 43 on the floppy disk 4, the operator inputs "RUN" or "PAS" data from the console display 5. This input data is sent to the service processor 3 via the signal line 13. The service processor 3 writes the sent RUN" or PAS" data to a predetermined location on the floppy disk 4 via the signal line 12. This completes the rewriting of the control flag 43 in the floppy disk 4. From the next time the power is turned on, this rewritten control flag instructs whether or not to test the normality of the information processing apparatus 100.

In the illustrated embodiment, the normality of the information processing device 100 is tested by loading the test microprogram 41 prepared on the floppy disk 4 into the control memory 21 and running the test microprogram 41.
It is also possible to perform this test using firmware on the service processor 3.

That is, the signal line 11 between the service processor 3 and the instruction execution control unit 2 usually has a scan canvas configuration consisting of a scan address line, a scan-in data line, and a scan-out data line. be. Therefore, the firmware of the service processor 3 scans the registers in the information processing device 100 using the scan canvas, writes (scan-in) and reads test data (scan-out), and converts the scan-out data into an expected value. By comparing K, the normality of the information processing device 100 is tested. Note that when the signal line 11 has a scan canvas configuration, the aforementioned loading of the microprogram 41 or 420 into the control memory 21 may be performed by specifying the control memory in a scan address format.

Further, in the illustrated embodiment, the control flag 43 is provided on the floppy disk 4, but the control flag 43 may be held in a register or the like within the service processor 3.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to control whether or not to test the normality of the information processing device when the power is turned on using the control flag, and the control flag can be easily rewritten. If you frequently start up and shut down a system, such as testing and adjusting information processing equipment or debugging programs, for example, if you run a test once and there are no problems, do not run the test the next time. , system startup time can be shortened.

[Brief explanation of the drawing]

The figure is a block diagram of one embodiment of the present invention. 100... Information processing device, 1... Main storage unit, 2.
...Instruction execution control unit, 21...Control memory, n.
...Logic circuit, 3...Service processor, 4...
- Floppy disk, 41... Test microprogram, 43... Control flag, 5°°° console display. , 7-・Representative Patent Attorney Makoto Suzuki (14,:.

Claims (2)

[Claims] (1) In a method in which a test mechanism tests the normality of an information processing device, a control flag indicating whether or not to test the normality of the information processing device is retained, and when the information processing device is powered on, . A test control method for an information processing device, characterized in that the content of the control flag is determined, and based on the determination result, whether a test of the normality of the information processing device is executed or omitted is controlled. (2) The test control method for an information processing apparatus according to claim 1, wherein the contents of the control flag can be rewritten.