JPS6052650U - Magnetoelectric conversion circuit - Google Patents
Magnetoelectric conversion circuitInfo
- Publication number
- JPS6052650U JPS6052650U JP1983143801U JP14380183U JPS6052650U JP S6052650 U JPS6052650 U JP S6052650U JP 1983143801 U JP1983143801 U JP 1983143801U JP 14380183 U JP14380183 U JP 14380183U JP S6052650 U JPS6052650 U JP S6052650U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- conversion circuit
- magnetoelectric conversion
- transistor
- power source
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 title description 3
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Amplifiers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の磁電変換回路の結線図、第２図は本考案
に係る磁電変換回路の結線図、第３図は本考案に係るバ
イアス回路の他の結線図である。
図中のＥは電源、Ｒ１□、Ｒ１□はバイアス抵抗、ＶＲ
は可変抵抗、Ｔｒはトランジスタ、ＭＲ，。
ＭＲ２は磁気抵抗素子、Ｒ，、Ｒ，は基準抵抗、ＯＡは
演算増幅器である。FIG. 1 is a wiring diagram of a conventional magnetoelectric conversion circuit, FIG. 2 is a wiring diagram of a magnetoelectric conversion circuit according to the present invention, and FIG. 3 is another wiring diagram of a bias circuit according to the present invention. E in the figure is a power supply, R1□, R1□ are bias resistors, VR
is a variable resistor, Tr is a transistor, MR. MR2 is a magnetoresistive element, R, , R, are reference resistances, and OA is an operational amplifier.
Claims (1)
のバイアス電圧に応じて動作するトランジスタと、該ト
ランジスタに接続され且つ供給される電流の制限を受け
る磁気抵抗素子回路及び基準電圧回路と、該両回路から
発生する出力電圧を入力して増幅する縦幅回路とから構
成したことを特徴とする磁電変換回路。A direct source power source, a bias circuit connected to the power source, a transistor that operates according to the bias voltage of the circuit, a magnetoresistive element circuit and a reference voltage circuit that are connected to the transistor and are subject to limitations on the supplied current. , and a vertical width circuit which inputs and amplifies the output voltages generated from the two circuits.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1983143801U JPS6052650U (en) | 1983-09-16 | 1983-09-16 | Magnetoelectric conversion circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1983143801U JPS6052650U (en) | 1983-09-16 | 1983-09-16 | Magnetoelectric conversion circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6052650U true JPS6052650U (en) | 1985-04-13 |
Family
ID=30320879
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1983143801U Pending JPS6052650U (en) | 1983-09-16 | 1983-09-16 | Magnetoelectric conversion circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6052650U (en) |
-
1983
- 1983-09-16 JP JP1983143801U patent/JPS6052650U/en active Pending
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