JPS6047534B2 - Flow rate measuring device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement of a flow rate measuring device using the three-needle gap method, and is applicable to, for example, local flow rate measurement in an internal combustion engine cylinder, intake air amount measurement of a fuel-injected internal combustion engine, and EGR.
The present invention relates to a flow rate measuring device suitable for measuring the flow rate of gas, measuring the flow rate of exhaust gas in an internal combustion engine, or measuring the flow rate of other gases.

Conventionally, there are the following methods for measuring the flow velocity of gas, etc.

1 Method using hot wire: conductor wire (hot wire) placed in the fluid
A current is applied to heat the material and keep it at a certain temperature.

Since the hot wire is cooled and its resistance coefficient changes depending on the flow rate of the gas or fluid surrounding it, the resistance coefficient of the hot wire is kept constant by supplying the cooled heat as an electric current. At this time, the flow velocity is determined from the current supplied to the wire. 2 Method using laminar flow: A mesh is inserted into the fluid to provide resistance to the flow, and the flow velocity is determined from the differential pressure across the mesh.

3. Method using spark discharge and ion detector: - Spark discharge is performed at a fixed period between a pair of discharge electrodes.

An ion detector is installed downstream of the discharge electrode to detect the ion current, and the flow velocity is determined from the time from when the discharge occurs until the ions are detected. Next, problems with each of the above methods will be listed.

1 Method using hot wire (a) Cannot be used for high temperature fluids (approximately several hundred degrees or higher).

(b) Adjustment (calibration) is difficult.

(C) Easily damaged by mechanical impact.

Method using 2-lamina flow (a) It is not possible to measure small areas such as near the spark plug (spatial resolution is poor).

(b) Installation is difficult due to the large size of the main body.

3 Method using spark discharge and ion detector (three-needle gap method) (a) Cannot measure a wide range from low to high speeds.

Advantages include (a) the structure of the measuring section is simple;

(b) It is possible to measure fluids in a wide temperature range from low to high temperatures.

(C) Installation is easy.

(d) Good spatial resolution.

(e) Easy to adjust.

The present invention has adopted the three-needle gap method after examining the various flow velocity measurement methods described above, and has adopted this method. It is an object of the present invention to provide a flow velocity measuring device that enables highly accurate flow velocity measurement, and in particular, the present invention enables discharge at a high frequency by appropriately applying a high voltage between discharge electrodes, It is an object of the present invention to provide a flow velocity measurement device that can further improve flow velocity measurement at high speeds.

The principle of the present invention will be explained below with reference to FIGS. 1A and 1B and FIG. 2.

The voltage waveforms applied to the discharge electrodes 1 and 2 by the ignition device S of FIG. 1a are as shown in (■) of FIG. 1b. Electrode 1
, 2, the ion group generated by this discharge is carried away by the air flow (gas flow rate ■), and as time t passes, the discharge path changes as shown by the broken line, and at t=T, the ions reach the capture electrode 3.
reach. At this time, since the capture electrode 3 is grounded through the resistor 301, the discharge path is from the igniter S through the electrode 1, the capture electrode 3, and the resistor 301. Therefore, the current flowing through electrode 2 becomes "0" at t=T, as shown in ■ in Figure 1b, for example, but the current flowing in electrode 3 rises at t=T, as shown in ■ in Figure 1b. . This electrode 3
The current waveform is obtained as a voltage waveform from both terminals D and E of the resistor 301. If we measure the time from the time when the discharge current at electrode 1 rises until the voltage appears between terminals D and E, we can find out the time T from the start of discharge until the current starts flowing to capture electrode 3. Even during this time T, by dividing the distance d from the discharge electrodes 1, 2 to the capture electrode 3, the fluid velocity (2) can be obtained. In the method described hereinabove, if the discharge duration of the electrode 1 is Tc, then Tc must be greater than the aforementioned time T in order that the flow rate can be measured.

In other words, when the flow velocity is low and the time T is relatively long, the time τC must be increased, and the discharge period at the electrode 1 also increases as the time Tc increases. For this reason, when the discharge duration and discharge period at the electrode 1 are fixed, the measurement range is determined by the minimum flow velocity to be measured, and therefore, significant changes in flow velocity at high flow velocity cannot be measured. In the present invention, in order to improve this drawback, the discharge duration Tc and the discharge period can be automatically varied according to the sulfur rate. This can be realized by a configuration as shown in the block diagram of FIG. That is, in FIG. 2, F is a pulse signal generator, which inputs the current signal of the electrode 1 and the voltage signal across the resistor 301, and generates a pulse signal whose pulse width is the time T in FIG. 1b. G is a control device for the high voltage generator H. There, control device G
receives a signal from the pulse signal generator F, stops the high voltage supply by the high voltage generator H almost at the end of the pulse signal with a time width T, and then stops the high voltage supply by the high voltage generator H, which is calculated based on the value of the time width T. After a period of time has elapsed, the high voltage generator H starts supplying high voltage again, and the measurement operation is repeated again. J is an output device which converts an output according to the flow velocity into an appropriate form such as voltage or frequency and outputs it to an output terminal K. With this method, flow velocities from low to high speeds can be measured with high precision, and especially when measuring high speeds, measurements can be made at short time intervals. In this embodiment, as the high voltage generator H, a plurality of ignition means such as an ignition coil for a spark-ignition internal combustion engine or a similar pulse transformer are used in parallel.

This ignition coil for an internal combustion engine is suitable for use as the fluid H to be measured in that the discharge duration is relatively long. Here, FIG. 7 shows a basic circuit when an ignition coil is used.

Input terminal 150 is connected to a positive power supply. When the switch 153 is now closed, current flows from the input terminal 150 through the resistor 151 to the primary coil 152A of the ignition coil 152. Next, when the switch 153 is opened, the primary coil 152A
Since the current flowing in the secondary coil 1 is abruptly cut off,
A high voltage is generated at 52B, and a discharge occurs between the discharge electrodes 1 and 2. By the way, when the switch 153 is closed, the current flowing through the primary coil 152A is for a time T as shown in the eighth diagram.
Only 1 or once saturates. This time T1 is the resistor 151
and a time constant determined by the inductance of the primary coil 152A. Therefore, the switch 153 is operated as shown in FIG. The ゜゜1゛ level indicates open, and the ``0'' level indicates closed. The eighth diagram shows the current flowing through the primary coil 152A. According to this, when the frequency of signal Q is small, it is saturated as shown in the eighth diagram, but when the frequency When the ignition coil becomes large, it becomes unsaturated and the discharge energy between the discharge poles 1 and 2 decreases.In order to improve this point, we decided to use multiple coils as mentioned above.For example, three ignition coils Figure 8 shows the current in the primary coil using
If it is done as shown in Figure 8, each ignition coil will operate at the frequency 113 of the signal in Figure 8, and since the current in the primary coil is saturated, the output energy will not decrease. Next, the detailed configuration of the apparatus of the present invention realized based on the above-mentioned measurement principle will be explained with reference to FIGS. 3 to 18.

First, FIGS. 3A and 3B show the configuration of a sensor for measuring flow velocity. The sensor consists of a pair of discharge electrodes 1 and 2 that are arranged horizontally (or vertically depending on the arrangement) and an ion capture electrode 3 that is covered with an insulator and has only its tip exposed. , 2, and 3 are attached to a base L made of an insulator. Next, a block diagram constituting the apparatus of the present invention and detailed circuits of the blocks are shown in FIGS. 4 and 5, respectively, and will be described.

Reference numeral 4 denotes an ion current detection circuit, which is composed of an ion trapping electrode 3 and a resistor 301 for converting changes in current flowing through this electrode 3 into voltage changes.

5 is a waveform shaping circuit, which includes resistors 501, 502, 50.
3. An inverting amplifier circuit consisting of a differential amplifier 504, a comparison circuit consisting of a comparator 506 that compares the output voltage of the inverting amplifier circuit with the voltage set by the variable resistor 505, an inverter 507, a resistor 508, and a capacitor 509. , a monostable multivibrator circuit consisting of a NAND gate 510.

6 is a NAND gate.

7 is an RS flip-flop composed of NOR gates 701 and 702.

8 is a pulse signal delay circuit, and a digital counter 8
AND gate 801 that supplies the clock signal of 08, and inverter 80 that supplies the reset signal of the counter 808.
2. Resistor 803, capacitor 80 and gate 805
A monostable multivibrator circuit consisting of a monostable multivibrator circuit, an 8-bit digital comparator circuit consisting of 4-bit digital comparators 809 and 810, and a digital counter 811.
and an inverter 807 connected between the match signal output terminal of the digital comparator 810 and one of the inputs of the AND gate 806.

9 is an output terminal, and RS outputs the output of the NOR gate 701 of the flip-flop 7.

10 is a discharge start signal detector in the discharge electrode 1, and the electric wire with the insulation coating is wound several times on the insulation coating of the conductor connecting the electrodes 1 and 2 and the high voltage generator H (see Figure 2). It is something.

11 is a waveform shaping circuit, which includes rectifiers 550, 551, a variable low resistor 552 for signal level setting, a capacitor 553,
A waveform shaping section consisting of a thyristor 554, a resistor 555, an inverter 556, a resistor 557, and a capacitor 558
, and an AND gate 559.

Reference numeral 12 denotes a simulated low-speed signal/signal generation circuit, which is composed of a digital counter 601 and a monostable multivibrator consisting of an inverter 602, a resistor 603, a capacitor 604, and a NAND gate 605.

13 is an oscillation circuit that supplies a clock signal, which includes a crystal oscillator 650, capacitors 651, 652, and a NAND gate 6.
53 and resistors 654 and 655.

14 is a frequency dividing circuit, which is composed of a digital counter 750 and a changeover switch 751.

15 is a measurement start terminal.

Reference numeral 16 denotes a waveform shaping circuit, which is composed of an input circuit consisting of a resistor 850 and an inverter 851, and a monostable multivibrator circuit consisting of an inverter 852, a resistor 853, a capacitor 85, and an AND gate 855.

17 is a delay circuit, which includes a capacitor 901 and a resistor 90.
2. Monostable multivibrator circuit consisting of multivibrator element 903, inverter 904, and resistor 90
5. It is composed of a monostable multivibrator circuit consisting of a capacitor 906 and an AND gate 907.

18 is Noah Gate, 860, 861, Nand Gate 86
This is an RS flip-flop circuit consisting of 2,863 circuits.

19 is a high voltage generator drive circuit, and a w-ary counter 86
4, NAND gate 865, 866, 867, resistor 86
8,869,870, and NPN transistor 871
, 872, 873. 20, 21, 22
is the high voltage generator drive terminal.

In addition, the location marked V+ in FIG. 5 indicates that it is connected to the positive terminal of the power supply.

Although power supplies supplied to each circuit element are omitted in FIG. 5, both positive and negative power supplies are connected to the operational amplifier 504, and a positive power supply is connected to the comparator 506 and other digital circuit elements. The same applies to the following description. Next, the fourth
The operation of the block diagram shown in the figure will be explained according to the time chart shown in FIG. 6, and a supplementary detailed operation will be explained according to the overall circuit shown in FIG.

First, Figure 6e shows the voltage waveform between discharge pole 1 and ground,
A discharge occurs through the discharge electrode 1. When it is not being discharged, it is at ground potential, and during discharge, it is at negative potential. Now, when the discharge starts between the discharge poles 1 and 2 at t=b, the discharge start signal detector 10 displays the signal shown in FIG. A voltage waveform is obtained. This signal f has a waveform! The waveform is shaped by the shaping circuit 11 into the waveform shown in FIG. 6h. On the other hand, as described above, the discharge path changes depending on the flow rate (2), and at time t=T, the ion current reaches the capture electrode 3, and the ion current detection circuit 4 obtains the waveform shown in FIG. 6, 1g.

The signal g is shaped by a waveform shaping circuit 5, passes through a NAND gate 6, and has the waveform shown in FIG. 6. If the signals k and i are respectively input to the two input terminals of the RS flip-flop circuit 7, and the output of the NAND gate to which the signal i is input is taken out, the waveform shown in FIG. 6j is obtained. The signal j becomes "゜1゛ level" due to the rise of the pulse signal k,
Then, the rising edge of the pulse signal 1 shown in FIG. The delay circuit 8 delays the signal m by a certain time Ts determined by the time width T from the falling edge of the signal j, and sets the signal m shown in FIG. 6 to the "°1" level. Signal 1 is led to the RS flip-flop 7 and at the same time the RS
It is also input to the flip-flop 18, and the output of the flip-flop 18 is set to the "r1" level.Next, after T time from this, the signal m becomes the "1" level and is input to the other side of the flip-flop 18. flip flop 18
The output becomes the 0 level.

The output waveform of this flip-flop 18 is shown in FIG. This signal n is guided to a high voltage generation/device driving circuit 19. One of the output waveforms of the drive circuit 19 is shown in FIG. 6P,
Since the output of the drive circuit 19 is an open collector output of an NPN type transistor, the ゜゜1゛ level of the signal P means that the output terminal of the drive circuit 19 has a high resistance to the ground, and "゜゜1゛ level."
The 'level' indicates that the resistance is low. Signal P is connected to high voltage generator drive terminal 20. As shown in FIG. 14, a known semi-transistor type spark ignition device for internal combustion engines is connected to the drive terminal 20 as a high voltage generator.

Therefore, the low resistance and high resistance of the drive terminal 20 correspond to the points 0N10FF, respectively. Note that a distributor is not required, and discharge poles 1 and 2 are connected in place of the ignition plug of the internal combustion engine. Therefore, when the drive terminal 20 has a high resistance to the ground, discharge occurs at the discharge pole 1, and the signal j becomes the "1" level again, and the pulse delay circuit 8 returns to its initial state, so that the signal m again becomes The drive terminals 21 and 22 are the same as the drive terminal 20, except that the input terminals are as shown in FIG. 10, P2 and P3, respectively. The output waveform of the circuit 13 is shown in FIG. The simulated low-speed signal generation circuit 12 generates a signal when the flow rate (2) is close to "O" and the time T becomes longer than the maximum discharge duration Tc, or when the flow rate (V) is high enough to cause a discharge from the ion trapping electrode 3 side. It changes in the direction of poles 1 and 2. It is provided to generate a simulated signal in place of the original ion detection signal in order to continue measurement when the ion current cannot be detected at the capture electrode 3, such as when the ion current is detected by the capture electrode 3. This simulated signal is the oscillation signal q
is counted from time t=TO and t=Tc or t is Tc
It appears when the level becomes slightly larger, and its waveform resembles the inverted level of FIG. 61. Frequency divider circuit 1
4 divides the frequency of the clock signal q and supplies it to the pulse delay circuit 8. The frequency division ratio in the frequency dividing circuit 14 will be explained in detail later, but is set equal to the ratio to the time T(7)TS.
Note that a measurement start terminal 15 is provided to obtain a measurement start signal.

Then, at the same time as the measurement start terminal 15 is grounded, a narrow pulse generated by the waveform shaping circuit 16 is input to the pulse delay circuit 18, and the signal n becomes ``1'' level, causing the ignition coil to Upon receiving the input signal from the waveform shaping circuit 16, the delay circuit 17 inputs a narrow pulse signal to the pulse delay circuit 18 at the point when the primary current of the ignition coil is saturated. Therefore, the signal n reaches the "0" level and the primary current of the ignition coil is cut off, generating a high voltage on the secondary side, which is guided to the discharge pole 1 and the first discharge occurs. It will be done. Thereafter, the measurement continues as described above. Next, each block shown in FIG. 4 will be explained in detail according to FIG.

First, as described above, the ion current detection circuit 4 converts the current change into a voltage change when the discharge path changes from the discharge electrode 1 to the capture electrode 3 to the resistor 301 to the ground. The output waveform is like a signal g, which is input to the waveform shaping circuit 5, and the waveform is inverted by the first-stage inverting amplifier. This signal is used as one input of the next-stage comparator 506, and is compared with the voltage set by the dividing resistor 505, which is the other input signal of the comparator. At this time, the output of the comparator 506 is the output of the inverting amplifier, which is the output of the dividing resistor 505.
When the voltage is higher than the voltage, it becomes ゜゜1゛ level. The output signal of this comparator 506 is input to the final stage monostable multivibrator circuit of the waveform shaping circuit 5. This monostable multivibrator circuit causes the output of the comparator 506 to be “
The time width is determined by the resistor 508 and the capacitor 509 in synchronization with the time when the pulse signal reaches the ゜1゛ level, and a pulse signal that is at the ゜0゛ level for that period of time is obtained. If at least one of the two inputs of the NAND gate 6 reaches the ゜゜0゛ level, the output will be at the ``1'' level. Therefore, if the output of the waveform shaping circuit 5 is taken as the input of the NAND gate 6, the output of the NAND gate 6 will be is expressed as shown in FIG. 6. Since 7 is an RS flip-flop circuit composed of two NOR gates, when a ゜゜1゛ level is input to the NOR gate 702 side, the output becomes ``1'' level. Noah Gate 701
When the ゜“l゛ level is input to the side, the output becomes the ゜0゛ level.

Furthermore, the output signal of the AND gate 801 is used as the clock input of the digital counter 808 included in the pulse signal delay circuit 8. Therefore, since one of the two inputs of the AND gate 801 is the signal j and the other is the signal q, the output of the AND gate 801, that is, the digital counter 808
The clock input of is shown in FIG. 6k. This counter 808
The reset signal is obtained by the monostable multivibrator in synchronization with the rise of the signal j(7) to the 64F5 level, and is performed using a pulse signal with an extremely small time width determined by the resistor 803 and the capacitor 804. be exposed. Therefore, the counter 808 counts the pulse signal k only during the time T. Next, when the signal j reaches the '60'2 level, the reset of the counter 811 is released and counting is started.

Now, the counter 808 has completed the counting and the counter 811 has just been released from reset, so the coincidence output of the digital comparator 810 is at the 4'0 level. Since the output of digital comparator 810 is connected to one input of AND gate 806 through inverter 807, AND gate 806 outputs the other input signal as is. Since the output of the frequency divider circuit 14 is connected to the inputs of the AND gate 806 other than those connected to the inverter 807, the counter 811 counts the output pulses of the frequency divider circuit 14, and first the counter 808 When the counter 8 counts the same number as that counted by the comparators 809 and 810, the counter 8
The outputs of 08 and 810 are compared, and the match signal output of the comparator 810 becomes the "1" level. Then, one of the AND gates 806 becomes the "0" level, so the counter 8
Counting by 11 stops. The output of the AND gate 806, ie, the input waveform of the counter 811, is shown in FIG. From the above explanation regarding the pulse signal delay circuit 8, if the frequency division ratio of the frequency divider circuit 14 is R, then the frequency of the clock signal counted by the counter 808 and the counter 81
Since the ratio of the frequency of the clock signal counted by 1 is R, it can be seen that the required counting time Ts is TS=TXR.

Next, the signal waveform guided from the discharge start signal detector 10 to the waveform shaping circuit 11 is as shown in FIG. 6f. In this waveform shaping circuit 11, the signal is rectified by rectifiers 550 and 551, resulting in only the positive side signal shown in FIG. 6f. Divided resistance 552
The voltage level is set at 554 and connected to the gate of thyristor 554. The anode of the thyristor 554 is the resistor 55
5 is connected to the positive power supply through 5, and its cathode is grounded. When the signal is applied to the gate, the thyristor 554 becomes conductive, and the anode potential of the thyristor 554 becomes the "0" level. At this time, the resistor 555 has a large value. Since the current passing through the thyristor 554 is small, when the signal is no longer applied to the gate of the thyristor 554, the thyristor 554 becomes non-conductive and the anode of the thyristor 554 becomes at the level 1. In this way, the thyristor 554
The signal appearing at the anode of is connected to an inverter 560, and the signal level is inverted and output from the inverter 560. The output of inverter 560 is as follows. A pulse signal whose time width is determined by the resistor 557 and the capacitor 558 is generated in synchronization with the point in time when the output of the inverter 560 rises to the ゜゛1゛ level. Next, in the simulated low-speed signal generation circuit 12,
The digital counter 601 uses the output q of the oscillation circuit 13 as a clock signal, and uses the output h of the waveform shaping circuit 11 as a reset signal. Therefore, counting starts when the signal h falls to the "0" level, and after counting the number corresponding to the above time, the output of the counter 601 becomes the "1" level.The output of this counter 601 is as follows. It is connected to the monostable multivibrator circuit of the stage, and a pulse signal with a fixed time width is generated by a resistor 603 and a capacitor 604 in synchronization with the rising of the counter 601 to the "1" level. The oscillation circuit 13 uses a known crystal oscillation circuit, and its oscillation frequency is determined by the crystal oscillator 650. Further, in the frequency dividing circuit 14, the digital counter 750 uses the output q of the oscillation circuit 13 as a clock signal, and since its reset terminal is grounded, it operates as a ring counter. The output and input clock of this counter 750 are connected to the selected terminal of the changeover switch 751, so that the movable terminal of the changeover switch 751, that is, the output of the frequency divider circuit 14 has a frequency division ratio with respect to the output q of the oscillation circuit 13. is 1
, 2, 4, 8, and 16 signals are obtained. Next, when the measurement start terminal 15 is grounded, the input/input of the inverter 851 in the waveform shaping circuit 16 becomes the 0 level, and the output becomes the 1 level.The next stage of the inverter 851 is a monostable multivibrator circuit. Therefore, when the output of the inverter 851 reaches the ``6r'' level, a pulse signal whose time width is determined by the resistor 853 and the capacitor 854 and is at the ``F'' level only during the time width is generated. . Next, in the delay circuit 17, the capacitor 90
When the output of the inverter 851 is input to the monostable multivibrator composed of the 1 resistor 902 and the multivibrator element 903, the time width increases synchronously when the output of the inverter 851 rises to the ``1'' level.
1 and the resistor 902, and outputs a pulse signal that is at the ``0'' level only during that time width.

This signal is guided to the next stage monostable multivibrator,
In this monostable multivibrator, the output of the multivibrator element 903 is a capacitor 901 and a resistor 902.
It is at the "0" level for a time determined by , and when it rises to the "1" level again, it synchronously outputs a pulse signal that is at the "1" level for a time determined by the resistor 905 and capacitor 906. In the S flip-flop circuit 18, the NOR gates 860 and 861 are connected to the input terminals of the RS flip-flops composed of NAND gates 862 and 863, respectively, so that at least one of the inputs of the NOR gate 860 is at the 6"R2 level. Then, the output of the flip-flop 18 becomes "゜1" level, and if at least one of the inputs of the NOR gate 861 becomes the "゛゜1" level, the output of the flip-flop 18 becomes ``4''.
60'' level. Next, in the high voltage generator drive circuit 19, the output terminal of the flip-flop 18 is connected to the clock input terminal CL of the one-can counter 864, and the reset terminal R of this counter 864 is connected to the output terminal of the counter 864. It is connected to terminal 3 of the terminals, and output terminals 0, 1,
The two output signals have the waveforms shown in A, C, and C of FIG. 10, respectively.

And the signals A and C are NAND gates 865 and 8, respectively.
66, 867, and each NAND gate 86
Since the other input of 5,866,867 is the signal n shown in FIG.
The outputs of the current limiting resistors 868, 869, 8
70 to the bases of transistors 871, 872, 873, this transistor 871, 872
, 873 are shown in Figure 10, P and P, respectively.
2. It will look like P3. These signals P, P2, and P3 are expressed as "0" level when each collector and ground are in a conductive state, and as "1" level when they are in a non-conductive state. The respective signals P, P2, P3 are transmitted to input terminals 220, 22 of the high voltage generator shown in FIG. 9 via drive terminals 20, 21, 22.
1 and 222, respectively. Here, since the ignition devices 235, 236, and 237 in FIG. 9 are the same, only the ignition device 235 will be described. For example, as shown in FIG. 18, 223 is a switching circuit (commonly referred to as a transistor igniter) that includes a power transistor that is switched by an input signal P, and 233 is an ignition coil 22.
6 is a primary coil current limiting resistor, and 229 is a diode for preventing backflow.

Note that line 232 is connected to the positive power supply. 1 and 2 are the discharge electrodes.

Then, when the signal P reaches the 440° level, the primary coil 2
26A, and at the moment the signal P reaches the ゜゜1゛ level, a negative high voltage is generated at the output terminal of the secondary coil 226B, which is applied to the electrodes 1 and 2 via the diode 229 and starts discharging. . This diode 229 connects the high voltage generated in the other ignition coils 227 and 228 to the ignition coil 226.
This is used to prevent the liquid from flowing into the secondary coil 226B. The voltage waveforms of each part in Fig. 9 are
It is shown in Figure 2, E, H, and G. Although this embodiment describes the case where three ignition coils 226, 227, and 228 are used, the number is not limited to three, and any number of two or more may be used.

By making improvements as explained above, the apparatus of the present invention can achieve the object described at the beginning.

Next, regarding how to take out the output signal from the output terminal 9, in the above embodiment, the pulse signal having the time width T from the flip-flop 7 was used as the direct output signal, but in this embodiment, the output signal is taken out in another form. This will be explained with reference to FIGS. 11 and 12.

First, in FIG. 11, the input terminal 958 is connected to the output terminal 9 in FIG. 960 is a frequency-to-voltage (F-■) converter. 966 is a non-inverting DC amplifier circuit, and variable resistor 962 controls the gain, and resistor 9
At 63, the offset voltage is set.

964 and 965 are output terminals.

This takes advantage of the fact that since the discharge period in the discharge pole 1 is determined by the method described above, the flow velocity v and the frequency of the signal appearing at the output terminal 9 are proportional. Therefore, if the circuit shown in FIG. 11 is connected to the output terminal 9, a voltage signal proportional to the flow velocity can be obtained from the output terminal 964.
A pulse signal output having a frequency proportional to the flow velocity V is obtained from the output terminal 965. Next, the circuit shown in FIG. 12 will be explained.

975 is a ROM (read only memory) whose input terminal is connected to the output terminal of the digital counter 808.

976 is a latch, and the output of ROM 975 is applied to the input.

The output of latch 976 is input to DA converter 970. 981 is a non-inverting DC amplifier.

The output terminal 9 in FIG. 5 is connected to the input terminal 980. 979 is an inverter, 977 is a monostable multivibrator, and the output thereof is input to the latch timing terminal T of latch 976.

Therefore, when the digital counter 808 finishes counting, a narrow pulse signal is applied to the latch timing terminal T of the latch 976. Now the counter is 80
Since the output signal of the crystal oscillator 13 is used as the clock signal of 8, it can be said that its frequency is stable. Therefore, the numerical value appearing at the output of the counter 808 when the counter 808 completes its count is proportional to the time width T. Let this be TK. Then, if the program in ROM975 is set to d/(input numerical value), ROM975
As mentioned above, the output d/TK is proportional to the flow velocity ■.
The output of the ROM 975 is output from the latch 976 in synchronization with the completion of counting by the counter 808, becomes a voltage signal by the A-D converter 970, and is converted into a voltage signal by the non-inverting DC amplifier 981.
The signal is then output from the output terminal 974. In addition, variable resistor 9
72 is for gain adjustment, and resistor 973 is for offset voltage adjustment. As explained above, the output terminal 974 provides a voltage signal proportional to the flow velocity V, and the output terminal 978 provides a digital signal output proportional to the flow velocity (2). If the frequency q of the crystal oscillator 13 is Fq, then TK = Fq●T, so if the program in the ROM 975 is set to d-Fq/(the input signal value), the ROM 975 output ■R will be equal to the value of ■. Digital signal output is output terminal 978
More can be obtained.

Next, regarding the delay circuit for determining the discharge period, the pulse signal delay circuit 8 was used in the above embodiment, but other embodiments will be explained with reference to FIGS. 13 and 14.

First, a method using an up/down counter is shown in FIG. The input terminal 980 is connected to the output of the oscillation circuit 13, the input terminal 981 is connected to the output of the frequency dividing circuit 14, the input terminal 982 is connected to the output of the output terminal 9, and the input terminal 983 is connected to the output of a reset circuit (not shown). Ru. 984 is a clock signal selection circuit, which is input to the input terminal 982. When the signal j, that is, the signal j shown in FIG. 15, is at the "1" level, the signal q input to the terminal 980 is output, and when the signal j is at the "0" level, the signal input to the terminal 981 is output. do.

FIG. 15r shows the output signal waveform of the clock signal selection circuit 984. 985 is an up/down counter, and the up/down switching input terminal is connected to terminal 982, so
When the terminal 982 is at the "r" level, it counts up and counts up to 4.
When the level is 40″, count down.

The count value is shown in FIG. 15S along the vertical axis. The reset input terminal of the up/down counter 985 is the terminal 983
The purpose of this connection is to reset the counter 985 when the power is turned on. The carryout output terminal of counter 985 is input to output terminal 986 and OR gate 987. Next, its operation will be explained. When the terminal 982 reaches the ゜゜1゛ level, the counter 985 counts up the clock, which is an oscillation signal inputted from the terminal 980. Next, when the terminal 982 reaches the 640'' level, the clock signal, which is a frequency-divided signal input from the terminal 981, is counted down.Then, when the number of pulses that is the same as the number of pulses that was counted up earlier is counted down, the counter count value becomes "0'' and the carry-out output of the counter 985 becomes the 66r'' level.The carry-out output of the counter 985 is connected to one of the inputs of the OR gate 987, and when the carry-out output of the counter 985 reaches the ゜゜1゛ level, the terminal is 981 is added to the counter 981 to prevent the clock signal for down counting from passing through the counter 985 and stop the down counting. On the other hand, it is connected to an output terminal 986 for output. The signal appearing at the output terminal 986 is shown in FIG. 15 u, but its properties and uses are the same as those in FIG. 6 m, and if the signal in FIG. 15 u is used as the signal m in FIG. The circuit shown functions similarly to the pulse signal delay circuit 8 of FIG. Next, the circuit shown in FIG. 14 performs the function of the pulse signal delay circuit 8 in an analog manner.

Input terminal 870 is connected to output terminal 9. 872 is an inverter, and 871 and 873 are analog switches. When the control input terminals 871-1 and 873-1 respectively reach the ゜゜1゛ level, the two lines become conductive, and when the control input terminals reach the ``0'' level, they become non-conductive.

876 is a Miller integration circuit, and 873 is a comparison circuit.

When the signal j shown in FIG. 15 j is input to the terminal 870, the period of time width T is at the "゜1゛ level, so the analog switch 871 is conductive, and the analog switch 873 is non-conductive, so the capacitor of the Miller integration circuit 876 is Charging is performed from the positive power supply through the path from analog switch 871 to resistor 874. When signal j reaches the "゜0゛ level, analog switch 873 becomes conductive, so the charge charged in the capacitor of Miller integration circuit 876 is is resistance 875
→ Analog switch 873 → Discharged through the negative power supply path. Therefore, the charging/discharging waveform shown in FIG.
Since one input of this analog comparison circuit is grounded, the output from the analog comparison circuit 878 is
When the voltage becomes lower than the ground potential, a signal similar to that shown in FIG. 15(u) is outputted to the output terminal 879. The following is the same as u above. In this case, T/'YS=resistance value of resistor 874/resistance 87
T/TS is determined using the relationship between the resistance values in No. 5. Note that when the circuit shown in FIG. 14 is used, the frequency dividing circuit 14 in addition to the pulse signal delay circuit 8 shown in FIG. 5 is not required. Further, both positive and negative electrodes are supplied to the differential amplifier in the Miller integration circuit 876. Next, regarding the high voltage generator, in the embodiment described above, a plurality of ignition coils 226, 227, 228 are used and operated one after another in order to increase the maximum discharge frequency, but the number of ignition coils used is Another specific example in which the maximum discharge frequency can be increased while minimizing the discharge frequency will be described.

This is the ignition device 235, 236, 237 in FIG.
However, since the contents of the changes are the same, only the ignition device 235 will be explained. Figure 16 shows ignition system 2
35 is shown. Line 232 is connected to a power source for driving the switching circuit 223, and line 238 is connected to a constant current power source. 9th
In the case of the ignition device 235 in the figure, when the switching circuit 223 becomes conductive, the primary coil 226 of the ignition coil 226
The current of A is as shown in Fig. 17 (W). Here saturation time T1
is determined by the inductance of the resistor 233 and the primary coil 226A. As mentioned above, this time T1 is a factor that limits the maximum discharge frequency, so it may be shortened. Therefore, in the circuit shown in FIG. 16, if the line 238 is connected to a high voltage power source, the current flowing through the primary coil 226A of the ignition coil 226 becomes as shown by the broken line in FIG.
At that time, if the output current of the power source is limited, a current with a waveform like the solid line in Figure 17 can be obtained. In Fig. 17, the time i? until the current saturates to a predetermined value in the force? IT
TM is shorter than the saturation time T1, and the same effect as shortening the time T1 in FIG. 17W can be obtained.
In this case, one constant current power supply is required for each ignition coil. As described above, the device of the present invention has a plurality of means for generating high voltage, and generates a high voltage by sequentially operating each of the plurality of means in accordance with a command, and also a high voltage generator that stores energy for generating a high voltage in at least one of the plurality of means while one of the means is operated for generating a high voltage; A pair of discharge electrodes to which a high voltage is applied from a generator, and a group of ions generated by discharge between the pair of electrodes, which are arranged downstream in the flow direction of the fluid to be measured with respect to the pair of electrodes. a plurality of ion current detection electrodes provided in the high voltage generator, which detect the flow velocity of the fluid to be measured based on the capture state of the ion group, and issue the command according to the flow velocity; Control that sequentially operates each means to control the generation cycle and application time of the high voltage applied between the pair of electrodes, and change the generation cycle and discharge duration of the discharge generated between the pair of electrodes. By measuring the flow rate of gas, etc. using the device, the following excellent effects can be obtained.

By adopting the 1-3 needle gap method, (a) The structure of the measuring section (sensor) is simple.

(b) Measurement is possible over a wide temperature range. (c)
Easy to install. (d) There is no need for gas density correction or temperature correction, and calibration (adjustment) is easy.

By changing the duration and period of the two-spark discharge according to the flow velocity, (a) it is possible to measure a wide flow velocity range from low to high speeds.

(b) Measurement time intervals can be reduced, especially on the high-speed side.

3. In particular, each of the plurality of means for generating high voltage is operated in sequence in response to a command, and one of the plurality of means
By causing at least one of the plurality of means to store energy for generating high voltage while the other means is operated to generate high voltage, (a) discharging at a high frequency; The accuracy of measuring the flow velocity of high-speed fluids is greatly improved.

[Brief explanation of drawings]

Figures 1a and 1b are block diagrams and signal waveform diagrams for explaining the principle of the flow velocity measuring method using the three-needle gap method according to the present invention, and Figure 2 is the basic configuration of the flow velocity measuring device according to the present invention. FIG. 3a is a block diagram showing the sensor body, and FIG.
The figure is a block diagram showing one embodiment of the device of the present invention, FIG. 5 is an electrical wiring diagram showing a detailed circuit of the block shown in FIG. 4, and FIG.
The figure is a signal waveform diagram used to explain the operation of the device of the present invention, Figure 7 is an electrical wiring diagram showing the basic circuit of the high voltage generator used to explain the present invention, and Figure 8 is a diagram of the circuit illustrated in Figure 7. FIG. 9 is an electrical wiring diagram showing an embodiment of the high voltage generator according to the present invention; FIG. 10 is a signal waveform diagram explaining the operation of the device of the present invention; FIG. 11 to FIG. 14th
Figure 15 is an electrical wiring diagram showing another embodiment of the device of the present invention.
16 and 17 are electrical wiring diagrams showing other embodiments of the high voltage generator and their operation explanation diagrams. The figure is an electrical wiring diagram showing an example of a switching circuit in the device of the present invention. 1, 2...Electrode for discharge, 3...Capture electrode forming an electrode for detecting ion current, F, G...Pulse signal generator forming a control device, high voltage Generation control device, H... High voltage generator, 235, 236, 237.
...An ignition device that serves as a means of generating high voltage.

Claims (1)

[Claims] 1. It has a plurality of means for generating a high voltage, and generates a high voltage by sequentially operating each of the plurality of means in accordance with a command, and one of the plurality of means generates a high voltage. a high voltage generator that stores energy for generating a high voltage in at least one of the plurality of means while being operated; and a high voltage generator that receives a high voltage from the high voltage generator. a pair of discharge electrodes; an ion current detection electrode that is arranged downstream of the pair of electrodes in the flow direction of the fluid to be measured and captures a group of ions generated by the discharge between the pair of electrodes; The flow velocity of the fluid to be measured is detected based on the capture state of the ion group, and the command is issued in accordance with the flow velocity to sequentially operate each of the plurality of means provided in the high voltage generator, and a control device that controls the generation cycle and application time of the high voltage applied between the pair of electrodes to change the generation cycle and discharge duration of the discharge generated between the pair of electrodes. measuring device.