JPS6046713A - Overcurrent detector - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an overcurrent detection device for detecting fault current in order to optimally protect and monitor electrical circuits.

[Prior art]

Conventionally, there has been an overcurrent detection device as shown in FIG. 1 as a device of this type. In the overcurrent detection device configured as shown in FIG. 1, a current transformer 20 is provided as a current detection means to detect the current of the m path IO. Electric line 1
When a fault current flows through the current transformer 20, a current corresponding to the current transformation ratio of the current transformer 20 is induced on the secondary side of the current transformer 20. This secondary current is passed through a full-wave rectifier circuit 30 connected to the secondary side of the current transformer 20.
The signal is rectified and input to the waveform conversion circuit 40. The waveform converting circuit 40 converts the absolute value waveform signal output from the full-wave rectifying circuit 30 into a signal corresponding to its effective value or average value, and supplies the converted signal to the next voltage dividing circuit 50 . The voltage dividing circuit 50 is
For example, it consists of three resistors connected in series, converts the output current signal of the waveform conversion circuit 40 into a voltage signal, and divides the voltage into a predetermined ratio. Frost the voltage at the side ends, resistor R1 and resistor R2
The voltage at the midpoint of the connection is V. 2. If the voltage at the connection midpoint of resistor 4 and resistor bird is ``■'', the relationship between these voltage values and the corresponding detected current (current in the electric circuit) ``is'' as shown in Figure 2, for example. are associated. As can be easily understood from Fig. 2, voltage signal frost occurs when the corresponding detected current ■ becomes 10 times the rated current. In the processing circuit, a certain level (set as the upper limit of the valid range of the input signal) is reached. Similarly, voltage Vo2 becomes voltage V when detected current I becomes 20 times the rated current. When multiplied by 3 and 30 times, the reference voltage vr
Reach ef. Each signal voltage V as described above. 1゜■2+
vo3 is input to the width conversion circuit 70 via the analog multiplexer 60, respectively. Analog multiplexer 60 and A/D conversion circuit 70 each operate in synchronization with a microcomputer 800 control signal. That is, the analog multiplexer 60 is connected to the microcomputer 80.
Time-sharing input (Yel, Vow
, Vos) and next (7) IV'D W grind circuit 70K! I can do it. The A/I conversion circuit converts the signal input from the analog multiplexer 60 into a digital signal based on the control signal of the microcomputer 80 and inputs the digital signal to the microcomputer 80. The microcomputer 80 executes level determination of the input signal as described above according to a predetermined program, and generates a predetermined time limit when the input signal level exceeds a preset reference level (i.e., a predetermined start timed operation). The output device 90 of the microcomputer 80 issues a drive signal when the above-mentioned time limit has elapsed. The output device 90 responds to this drive signal and outputs an overcurrent detection signal for alarm, display, protection device drive, etc. from the output terminal 91. The relationship between the input voltage (detection signal) level (corresponding to the detected current I) and the generation time limit in the time limit operation executed by the microcomputer 80 described above is 1. It is. Such characteristics are determined in consideration of the heat resistance of the object to be protected (electric circuit, load, etc.), and the one shown in FIG. 3 is a so-called three-limit characteristic (long-time, short-time, instantaneous).

The structure and function of the dynamic range expansion device in the conventional device as described above will be explained in further detail. As mentioned above, the three types of output voltages vo, , VO of the voltage divider circuit 50
2. The rate of increase in VO2 is different, and the reference voltage vref is reached when the detected current I becomes 10 times, 20 times, and 30 times the rated current, respectively (FIG. 2). Such a partial pressure circuit
11850 is provided with a VC in order to expand the upper limit of detectable current and the resolution of detection (that is, expand the dynamic range). That is, the microcomputer 80 determines the current to be detected (fault current) (■), the range up to lθ times the rated current (2), and the range up to 20 times the rated current (V). , the range at 30 times t is V. Detection is performed by sampling and inputting each of the three items. The switch from cat to dove in this case is generally made when the frost value reaches the reference voltage vref. ■ to V.

The same applies to switching to 3. As mentioned above, the voltage divider circuit 50
Using multiple detection signal voltage profiles with different rising rates 1+vQ
! +wings. It is the A//D that detects the fault current by switching the
A/D of conversion circuit 70! This is because there are restrictions on the conversion reference voltage (which corresponds to the reference voltage vref mentioned above, and is generally set at about 5VK in this type of device) and resolution. Although fabricating a high-resolution lVD conversion circuit is theoretically OI' capable, it is too problematic in practice due to circuit complexity, high cost, and reduced reliability. Therefore, in the past, in order to expand the dynamic range, the above-mentioned configuration was generally adopted.

However, such conventional devices have problems such as a lot of waste in the A/D conversion process and a large focus error (an error value of the analog signal corresponding to a 1-bit error) in the N-digital conversion process.

That is, the A/l) conversion circuit 70 A/D converts each of the signal voltages VOI, VO2, and VO2 in FIG. 2, and makes a certain number of bits correspond to a predetermined A7'D conversion reference voltage. , the detection signal is decomposed based on this correspondence relationship, and the decomposition focus (i.e. digital data) between OP regarding frost is V. 0- regarding □
This is data corresponding to the same detected value as the data between A, ie, duplicate data. Similarly, V. The resolution bit between 0 and Q for 3 is V. , which overlaps with the data between O-3 regarding . Therefore the data between 0-P regarding frost and V. The data between 0 and Q regarding , will be subjected to wasteful conversion processing. On the other hand, the data between P-3 for ■ and between Q-C for - that are actually used are limited by the section where wasteful processing is performed as described above, and it is difficult to respond to changes in the detected current l. Since the variation width of the signal voltage is small, the resolution decreases and the A/1)
There is a problem in that the bit error in the conversion process becomes large.

[Summary of the invention]

The present invention aims to provide a novel overcurrent detection device of this type that solves the problems of the conventional devices as described above. That is, the present invention improves fault current detection accuracy by making full use of the resolution of the AA conversion circuit by applying a level shift circuit, and has a wide dynamic range, simple configuration, and high reliability. The purpose of this invention is to provide an inexpensive and practical overcurrent detection device.

[Embodiments of the Invention] The present invention will be clarified by describing the embodiments of the present invention in detail below using the drawings.

FIG. 4 is a block diagram showing an overcurrent detection device as an embodiment of the present invention. In FIG. 4, the device of this example is provided with a current transformer 20 as a current detection means of the electric line IO. A waveform conversion circuit 4 is connected to the secondary side of the current transformer 20 via an aftereffect rectifier circuit 30 for obtaining the absolute value of the secondary output.
0 is connected. The waveform conversion circuit 40 is for converting the input signal waveform into its effective value or average value and outputting the converted value. A voltage converting circuit 51 made of, for example, a resistor is connected to the output side of the waveform converting circuit 40 for converting the current output signal into a voltage signal. Voltage conversion circuit 51
On the output side of
is connected. A level shift circuit 100 for performing a predetermined level shift on the output voltage signal is still connected to the voltage conversion circuit 51. In this level shift circuit 100u, Zener diodes ZD1 and ZD as level shift elements are arranged in parallel with the same polarity to form a diode. The cathode side terminals of the Zener diodes ZDl and ZD are both connected to the positive side of the voltage conversion circuit 51, and their anode side terminals are respectively connected to the second input port on the input side of the next analog multiplexer 60. 2 and a third input port 3. The Zener diodes ZD and ZD are used to respectively give a predetermined level shift to the output signal voltage of the voltage conversion circuit 51 and input it to the analog multiplexer 60. An A/D conversion circuit 70 for converting the analog output signal into a digital signal is connected to the output side of the analog multiplexer 60. Further, a microcomputer 80 is connected to the output side of the conversion circuit 70 so that the digital output signal thereof is inputted.

The analog multiplexer 60 and the A/Di conversion circuit 7
0 is configured to operate synchronously based on a control signal from a microcomputer 80. The microcomputer 80 determines the level of the input signal according to a predetermined program, and when the input signal exceeds a preset level, a predetermined time limit is generated (that is, a predetermined time limit operation is started), and when this time limit has elapsed. It is configured to output a drive signal at the moment when the microcomputer 80
An output device 90 is connected so that the above-mentioned drive signal of is inputted. The output device 90 is a microcomputer 80
In response to a drive signal, the output terminal 91 outputs an overcurrent detection signal for alarm, display, protection device drive, etc.

The operation of the apparatus of the present invention configured as described above will be explained below.

In FIG. 4, when an overcurrent flows through the electric line 10, the current transformer 2
A current corresponding to the current transformation ratio of the current transformer 20 is induced on the secondary side of the current transformer 20 . This secondary current (detection signal) is connected to the full-wave rectifier port, path 3
0, it is converted to its absolute value and input to the waveform conversion circuit 40. The waveform conversion circuit 40 converts this input signal waveform into its effective value or average value and supplies it to the next voltage conversion circuit 51. The voltage conversion circuit 51 converts the current output signal of the waveform conversion circuit 40 into a voltage signal ■ and supplies it to the first input port 1 of the next analog multiplexer 60 . At the same time, the level shift circuit 100 f7) Zener diode ZD converts the output signal f of the waveform conversion circuit into the first
level shift (that is, a voltage drop of Zener voltage EZD1 of Zener diode zDi) is performed to output signal V. is obtained, and the second
A level shift (that is, a voltage drop of Zener voltage EZD2 of Zener diode Zll) is performed, and the output voltage V. ≦ is obtained. The output signal voltage is also applied to the second input port 2 of the analog multiplexer 60 in the same way as the frost.
and a third input port 3, respectively. The relationships between the voltage values of voj and the corresponding detected currents (fault currents) are as shown in FIG. 5, for example. The analog multiplexer 60 selects the input signal in a time division manner in synchronization with the control signal from the microcomputer 80, and selects the next! v'D is applied to the converter circuit 70. The NΦ conversion circuit 70H converts the input analog signal from the analog multiplexer 60 into a digital signal based on the control signal of the microbun computer 80, and inputs this into the microcomputer 80.

The microcomputer 80 determines the level of this input signal, and when it determines that the level exceeds a preset level, it starts a predetermined time-limited operation (that is, generates a time limit), and when the predetermined time limit has elapsed. generates a drive signal. The output device 90 receives this drive signal and outputs an overcurrent detection signal for alarm, display, protection device drive, etc. from its output terminal 91. In addition, the above-mentioned microcomputer 8
The relationship between the input signal (detection signal) level (corresponding to the current I to be detected) and the generation time limit in the time limit operation based on 0 has, for example, the well-known three-limit characteristic exactly the same as that shown in FIG. 3 described above.

Next, the structure and operation of the mechanism for expanding the dynamic range in the event of a misfire will be explained in more detail.

qf1 As mentioned above, the 1d voltage V induced in the voltage conversion circuit 51 in FIG. (and the signal vIll (level-shifted by the Zener diode zDl in the level shift circuit 100), the relationship between the signal vIll (level-shifted by the Zener diode ZD) and the corresponding detected current I is shown in FIG. It is as shown.

That is, ■ = Pigeon (4 parables) Vo4 曵f-2×路. .

(However, vref is the reference voltage in A/D conversion) The following relationship is established, and voltage ■ is given a level shift to ■ by the A/D conversion reference voltage vref.
Also, the voltage Voj is the A/D conversion reference voltage vr with respect to voI.
This is obtained by applying a level shift twice that of ef. The selection operation of the input signal in the analog multiplexer 60 for the signal ■* voI + "W in FIG. 5 is as follows.
Based on the control signal from the microcomputer 80, for example, if the current to be detected is up to lO of the rated current, ■ () is selected if the detected current is up to 20 times the rated current, and if the current is up to 30 times the current is selected. In the figure, ■ indicates the characteristic of 0-A-C, ■ indicates the characteristic of 0-P-B-C, and VOa indicates the characteristic of 0-Q-C.1
VDi exchange W! 170 indicates the range to be used as a detection signal for each of the above-mentioned ■, vO≦, and fan signals as “o”.
sV? -For gates, that 0-A is the same, for ■, that P-
The standard number of bits for the N-conversion (the number of bits corresponding to the maximum change width of the input signal level) is set in correspondence with the signals in these limited intervals. Since the resolution of the N-conversion circuit 700 can be utilized to the maximum. Therefore, as in the conventional device explained based on FIG.
This avoids the problem that the decomposition focus (ie, digital data) between -0 (FIG. 2) is completely wasted. Also, between P and B (■) and between Q and C (■
) between P-B (Voρ and between Q-C (V
As is clear from comparison with 113), the present invention greatly expands the dynamic range. In the above embodiment, the level shift circuit W and IOQ are Zener diodes ZD1 and ZD.

Although the embodiment in which a two-stage level shift is performed is applied, the accuracy of overcurrent detection can be further improved by applying an embodiment in which a larger number of stages of level shift are performed.

In the invention idea described above, the actual reference voltage in the A/1) conversion circuit 70 is applied as the A/I) conversion reference voltage vref, and the level shift circuit 100
The level shift value of each stage is n times (n-1, 2, 3, . . . ) the above-mentioned reference voltage. On the other hand, the following can be considered as a similar inventive concept that achieves the same purpose as the one with this configuration.

That is, the A/D conversion reference voltage V. , instead of the actual reference voltage in the A/D conversion circuit 70, the reference value set in the microcomputer 80 by VC & )vref is applied, and the level shift value of each stage in the level shift circuit 100 is n times the reference value 'ref mentioned above (n=1.2', 3.
...). In this case, select the reference value ηefO value appropriately (for example, vre, =
o, 7vreδ), the A/D conversion circuit 70
Highly accurate A/
'D conversion can be performed.

Furthermore, in the device of the present invention described above, the N-conversion circuit 70
The 0M'D conversion reference voltage is obtained by a Zener diode, and the level shift amount of multiple stages is obtained by using n Zener diodes with the same rating (however, n = 1° 2.3...)
series connection (i.e., the first stage is a series connection of one Zener diode, the second stage is a series connection of two Zener diodes, etc.)
By employing the configuration according to (.), it is possible to reduce errors caused by fluctuations in the A/D conversion reference voltage caused by changes in the characteristics of individual elements. Therefore, by adopting such a configuration, a stable N-conversion result can be obtained, and a highly accurate, highly reliable, and inexpensive overcurrent detection device can be realized.

〔Effect of the invention〕

In summary, according to the present invention, the Φ conversion circuit! %
/n times the D conversion reference voltage (where n=1.2, 3...
) A multi-stage level shifter 7 that performs a level shift corresponding to
By applying the converting means, the level of the input signal can be sequentially shifted for each section within a predetermined range, and the resolution of the A/D conversion circuit can be utilized effectively to the maximum extent. Therefore, the fault current detection accuracy is improved and an overcurrent detection device with a wide dynamic range can be realized. Furthermore, the device of the present invention has a simple structure, high reliability, and low cost, making it highly practical.

[Brief explanation of the drawing]

Figure 1 is a block diagram showing a conventional overcurrent detection device, Figure 2 is a block diagram showing a conventional overcurrent detection device.
The figure is a characteristic diagram showing the operation of the device in Figure 1, Figure 3 is a characteristic diagram showing the characteristics of a general overcurrent detection device, and Figure 4 is a characteristic diagram showing the overcurrent detection device as an embodiment of the present invention. The block diagram, FIG. 5, is a characteristic diagram showing the operation of the device of FIG. lO...Electric circuit, 20...Current transformer, 30...Aftermath rectifier circuit, 40...Waveform conversion circuit, 50...Voltage dividing circuit, 51...Voltage conversion circuit, 60... Analog multigrazer, 70... A/D conversion circuit, 80... microcomputer, 90... output device, to(3...
・Level Shift Episode 111g Agent: Masuo Oiwa T, Iuri wo Seisho (self-motivated) 1.・IF (display of 'l' patent application No. 58-15194
No. 9 No. 2 Zuto Akira's name (shi, 1 flow detection device p I, uh, t + li +12 J- and Representative Hitoshi Katayama Department 1 Agent 5, subject of amendment ``Patent claims in the specification "Scope", "Detailed Description of the Invention in the Specification" and "Drawings" 6. Contents of Amendment + 1) The Scope of Claims section of the specification is amended as shown in the attached sheet. (2) In the specification, page 10, line 15, "total value" is corrected to "absolute value." (3) "V'o1" in the second line of page 16 in the same book is "If the vertical axis is the output after A/D conversion (VREF is equivalent to the saturation bit of A/D conversion), then the A of V'o1 is /D conversion output is corrected to ". (4) Same, page 16, line 8, “V′o2 is” changed to “v′o
The A/D conversion output of 2 is corrected to ``. (5) Same, page 16, line 8, "V'o3 is" changed to "v'o"
The A/D conversion output of 3 is corrected to ``. (6) Same, page 18, lines 1 to 18, ``In this case, the value of the reference value V' r e f can be appropriately set...errors due to fluctuations can be reduced.'' is corrected as follows. In this case, by appropriately selecting the reference value V'refO value (for example, V'ref=:=0.7Vref, etc.), only the region of the A/D conversion circuit 70 with particularly good linearity can be used. High-precision A/D conversion can be performed.Furthermore, in the double device of the present invention, the A/D conversion type quasi-voltage diode of the A/D conversion circuit 70 can perform The level shift amount of the stage is determined by using n Zener diodes with the same rating (however, n = 1.2.8...
) (i.e., the first stage is a series connection of one Zener diode, the second stage is a series connection of two Zener diodes,
), it is possible to reduce errors caused by fluctuations in the A/D conversion reference voltage caused by changes in the characteristics of individual elements. (7) The drawing and Figure 2 will be corrected as shown in the attached sheet. (8) The drawing and Figure 4 will be corrected as shown in the attached sheet. ? , List of attachments (document containing the entire text of the amended claims (attached)) 1 copy (2) drawings, 1 copy each of Figures 2 and 4 (Claim 11) Electric circuit Current detection means for detecting a flowing current; waveform conversion means for converting the output signal of the current detection means into its effective value or average value; and level shift means for level-shifting the output signal level of the waveform conversion means by a predetermined number of stages. , width conversion means for converting each analog output signal of the waveform conversion means and the level shift means into a digital signal;
Level determining means for receiving the output signal of the A/D converting means and determining the signal level; time limit generating means for generating a predetermined time limit based on the output signal of the level determining means; and an output signal of the time limit generating means. The overcurrent detection device is provided with an output means for generating an overcurrent detection signal based on the above, wherein at least the level discrimination means and the time limit generation means are constituted by a microcomputer, and the level shift means is configured to output an overcurrent detection signal based on the level shift means. n times (n=1.2.8) the A/D conversion reference voltage in the A/D conversion means for each stage.
...), one end of each of them is connected to a common potential point to commonly receive the signal from the waveform converting means, and the other end is level-shifted individually to output the signal. 1. An overcurrent detection device toy comprising a level shift element connected to each independent point for output. (2) The A7Di conversion means has a Zener diode for generating its own A/D conversion reference voltage, and the level shift # of the level shift means is a Zener diode of the A/D conversion means. zener 7
n pieces (n = 1,
2. The overcurrent detection device according to claim 1, which is constituted by a series connection body of Zener diodes of 2, B, . . . (3) Current detection means for detecting the current flowing in the electric circuit, waveform conversion means for converting the output signal of the current detection means into its effective value or average value, and level shift of a predetermined number of stages to the output signal level of the waveform conversion means. A/D conversion means for converting each analog output signal of the waveform conversion means and the level shift means into a digital signal, and a level for receiving the output signal of the A/D conversion means and determining the signal level thereof. determination means; time limit generation means for generating a predetermined time limit based on the output signal of the level determination means;
and an overcurrent detection device comprising an output means for generating an overcurrent detection signal based on an output signal of the time limit generating means, wherein at least the level determining means and the time limit generating means are constituted by a microcomputer; The level shift means performs a level shift corresponding to n times (n=1.2.8...) a voltage corresponding to a predetermined reference value set in the microcomputer for each stage of level shift. One end of each of them is connected to a common potential point to commonly receive the signal from the waveform conversion means, and the other end is connected to each independent potential point to output a level-shifted output signal. 1. An overcurrent detection device comprising an element for detecting an overcurrent. (4) The A/D conversion means has an independent reference voltage generation means for generating the A/D conversion reference voltage, and the level shift means adjusts the level to a predetermined reference value set. Claim 8 is constructed by a series connection of n (611 (n=1, 2, 8,...) Zener diodes having a Zener voltage equal to the corresponding voltage. Overcurrent detection device. Section 2 Figure

Claims (1)

[Scope of Claims] Waveform converting means for converting into an average value, level shifting means for level shifting the output signal level of the waveform converting means by a predetermined number of stages, and each analog output signal of the waveform converting means and the level shifting means. Convert to digital signalΦ
a converting means, a level determining means for receiving an output signal of the Φ converting means and determining the signal level thereof, a time limit generating means for generating a predetermined time limit based on an output signal of the level determining means, and a time limit generating means for generating a predetermined time limit based on the output signal of the level determining means. An overcurrent detection device comprising an output means for generating an overcurrent detection signal based on an output signal, wherein at least the level discrimination means and the time limit generation means are constituted by a microcomputer, and the level shift means is a level shifter. For each stage of Φ
n times the gender conversion reference voltage in the conversion means (n=1.2.
3...), which is constructed by having a level shifting element connected to each potential point and having the other end connected to each independent potential point to output a level-shifted output signal. An overcurrent detection device characterized by: (2) The A/D converting means has a Zener diode for generating its own N-conversion reference voltage, and the level shifting element of the level shifting means is a Zener diode of the LΦ converting means. n pieces (n-1, J3...
2. The overcurrent detection device according to claim 1, wherein the overcurrent detection device is constituted by a series connection of Zener diodes. (3) Current detection means for detecting the current flowing in the electric circuit, waveform conversion means for converting the output signal of the current detection means into its effective value or average value, level shift of a predetermined number of stages to the output mi level of the waveform conversion means level shifting means for converting each analog output signal of the waveform converting means and the level shifting means into a digital signal; level determining means for receiving the output signal of the A/I converting means and determining its signal level; an overcurrent detection device comprising: means for generating a predetermined time limit based on the output signal of the level determining means; and output means for generating an overcurrent detection signal based on the output signal of the time limit generating means. At least the level determining means and the time limit generating means are constituted by a microcomputer, and the level shifting means adjusts the voltage corresponding to a predetermined reference value set in the microcomputer for each stage of level shifting. n, and the other end is connected to a common potential point to receive a signal from n, and the other end is connected to each independent potential point to output a level-shifted output signal. An overcurrent detection device characterized by: (4) The A/Il conversion means has a Zener diode for generating a Φ conversion reference voltage;
b, and the level shift means includes n level shift elements ((1-1°2.3...) having a Zener voltage equal to the Zener voltage of the Zener diode.
4. The overcurrent detection device according to claim 3, wherein the overcurrent detection device is constituted by a series connection of Zener diodes.