JPS6046593U - Ruled line display control device - Google Patents

Ruled line display control device

Info

Publication number
JPS6046593U
JPS6046593U JP13854483U JP13854483U JPS6046593U JP S6046593 U JPS6046593 U JP S6046593U JP 13854483 U JP13854483 U JP 13854483U JP 13854483 U JP13854483 U JP 13854483U JP S6046593 U JPS6046593 U JP S6046593U
Authority
JP
Japan
Prior art keywords
ruled line
display control
control device
line display
vertical ruled
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13854483U
Other languages
Japanese (ja)
Inventor
正広 井上
鏡味　法光
Original Assignee
カシオ計算機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by カシオ計算機株式会社 filed Critical カシオ計算機株式会社
Priority to JP13854483U priority Critical patent/JPS6046593U/en
Publication of JPS6046593U publication Critical patent/JPS6046593U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図ａ、　ｂは従来における罫線の表示制御を示す図
、第２図は本考案の一実施例を示す回路構成図、第３図
ａは同実施例２における作表例を示す図、第３図すは第
３図ａの表に対する縦罫線ビットマツプを示す図である
。 １１・・・罫線メモリ、１２□〜１２ｎ・・・レジスタ
、１３・・・列番号カウンタ、１４・・・列番号デコー
ダ、１６・・・行番号カウンタ、１７・・・行番号デコ
ーダ、２１・−・罫線バタンメモリ、２２・・・表示装
置。FIGS. 1a and 1b are diagrams showing conventional ruled line display control, FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIG. 3a is a diagram showing an example of tabulation in the second embodiment. FIG. 3 is a diagram showing a vertical ruled line bitmap for the table of FIG. 3a. 11... Ruled line memory, 12□-12n... Register, 13... Column number counter, 14... Column number decoder, 16... Row number counter, 17... Row number decoder, 21. - Ruled line button memory, 22...Display device.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 作表機能を備えた情報処理装置において、表中の縦罫線
を各列単位に１ビツトを対応させて記憶する罫線メモリ
と、この罫線メモリに記憶した縦罫線データに従って縦
罫線パターンデータを表示装置に出力して縦罫線表示を
行なう手段とを具備したことを特徴とする罫線表示制御
装皺。An information processing device equipped with a tabulation function includes a ruled line memory that stores vertical ruled lines in a table in association with one bit for each column, and a display device that displays vertical ruled line pattern data according to the vertical ruled line data stored in this ruled line memory. 1. A ruled line display control device comprising means for displaying vertical ruled lines.
JP13854483U 1983-09-07 1983-09-07 Ruled line display control device Pending JPS6046593U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13854483U JPS6046593U (en) 1983-09-07 1983-09-07 Ruled line display control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13854483U JPS6046593U (en) 1983-09-07 1983-09-07 Ruled line display control device

Publications (1)

Publication Number Publication Date
JPS6046593U true JPS6046593U (en) 1985-04-02

Family

ID=30310825

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13854483U Pending JPS6046593U (en) 1983-09-07 1983-09-07 Ruled line display control device

Country Status (1)

Country Link
JP (1) JPS6046593U (en)

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