JPS6046127A - Electronic circuit - Google Patents

Abstract

PURPOSE:To make the voltage margin between output voltages larger, by connecting the 1st-4th resistances in series between the 1st and 2nd electric potentials and installing two switches to their prescribed connecting points, and then, fetching an output from the connecting point of the 2nd and 3rd resistances. CONSTITUTION:Resistances R11-R14 are connected in series between a supply voltage VCC and earth and a PNP transistor (TR) Q11 and NPN TR Q12 are connected between the power source VCC and the connecting point of the resistances R13 and R14 and between the connecting point of the R11 and R12 and earth, respectively, and then an output terminal 3 is taken out from the connecting point of the R12 and R13. When both input terminals 1 and 2 to the TRs Q11 and Q12 are in low level, the terminal 1 is in low level and the terminal 2 is in high level, the terminal 1 is in high level and the terminal 2 is in low level, and both the terminals 1 and 2 are in high level, the output voltage of the terminal 3 becomes V1=VCC, V2=VCCX(R13+R14)/(R11+R12+R13+R14), V3= VCCXR12/(R12+R13), and V4=earth, respectively. By selecting the resistance value, an intermediate optional value can be set between the supply voltage and earth.

Description

DETAILED DESCRIPTION OF THE INVENTION In particular, the present invention provides two independent binary signals
It concerns an electronic circuit that converts into a value signal.

This type of circuit can be easily constructed with four resistors and two switch means. That is, FIG. 1 shows an example of a circuit using a bipolar transistor as the switching means. Terminals 1 and 2 are supplied with two independent binary signals, to which are connected the bases of NPN transistors Qt, Q, t, respectively.

A resistor R1 is connected in series between the collector of the transistor Q and the power supply terminal CC, and a resistor R1 is connected in series between the collector of the transistor Q and the collector of the transistor Q.
(.

are connected in series. Transistor Q+ + 0.2
The emitter of is grounded, and the output terminal 3 is connected to the connection point of the resistors R, , I'(, , ).

Now, when the input voltages at the input terminals 1 and 2 are both lN,', both the transistor Q and the transistor Q2 are cut off, and a voltage H1=CC is obtained at the output terminal 3. Input terminal l is “H”, input terminal 1 force K”L
", Input terminal 2 "H"] + 4 Kl'j, V
s = If both l and input terminal 2 are 11 (1), voltage V2 is obtained at output terminal 3, respectively. That is, four voltages vI are obtained depending on the voltage levels supplied to input terminals 1 and 2. to v4 are obtained from the output terminal, and the voltage V+
The three output voltages A12 to 'v4 excluding f are connected to the resistor it1.
．． it, , l can also be set by the value of , 1(, ,. - For example, if 1t, = n, □ = l is also set as :R4, the above-mentioned η or 17, but in this circuit, the most For low output voltage, set the contact voltage V2.Vsk,
The voltage margin cannot be wide enough. In addition, each resistor I (1, to R
If the resistance value of 4 varies, the margin becomes even smaller.

An object of the present invention is to provide an electronic circuit that can increase the voltage margin between each output voltage.

In the present invention, first to fourth resistors are connected in series between the first and second potential supply terminals, and the first potential supply terminal and the third . Fourth
A first switch means controlled by a first input voltage is provided between the connection point of the resistor and the second potential supply end and the first switch means.
A second switch means controlled by a second input voltage is provided between the connecting point of the second resistor and the connecting point of the second resistor, and an output is obtained from the connecting point of the second and third resistors.

Hereinafter, one embodiment of the present invention shown in FIG. 2 will be explained.
The power supply voltage supply terminal Vcc as the first potential supply terminal and the second potential supply terminal
Four resistors R・
18. Tortoise, )t, , H+14 are connected in series. resistance) t, 1. At the connection point of R,2, there is a second
NPN transistor Q, as a switching means.

Its collector is connected and its emitter is grounded. The bases of transistors Q and wt are connected to input terminal 1. At the connection point of resistors H1ll and R14, there is a first
The collector of the transistor (PNP as switching means) is connected, and its emitter is connected to the power supply terminal VCC. Input terminal 2 is transistor Q1! connected to the base of. Output terminal 3 is connected to the connection point of resistor H+121''+3, and output is taken out.

Now, input terminal 1 and input terminal 20 input are both l T,
In the case of 1, the transistors Q and I'2 are conductive, so that a voltage of V,=Vcc is obtained at the output terminal 3.

Input terminal l is 1L1. When input terminal 2 is 1#11, transistors CJ++ and (c) are both off, so this is obtained. Input terminal I is "ti" and input terminal 2 is 1
In the case of L1, both transistors Qr+ + Qtt are turned on. When input terminal 1 and input terminal 2 are both "II", transistors Q and 1 are turned on, so that 42 vGNr) (ground potential) is obtained. That is, the power supply voltage Vc depends on the potential level of the input terminals 1.2.
The four output voltages determined by c and each resistor are output terminal 3.
are obtained respectively. - As a voltage, VCC=12 (V)
, I(, + t-H1+t-3(K4'l),
at s” ”+a −-6 (KΩ) (!: Then, V, = 12 (V), V = 8 (V), V, = 4 (V
) ,V,=nCV) ,! l: fx F), H3 shown in figure f, 1:')K The voltage margin between each output voltage is 4 [v]
15- It is possible to take a wide range of measures. Furthermore, the variation in the absolute value of the resistance is 5r=,F
, 1, the voltage V2. The variation in V3 is approximately −t=o, a(v) and l, V2−, V3”
The rAo margin is 1d3.4 (V). Therefore, leeway is provided in setting the threshold value of the next-stage circuit that receives this signal.

As described above, in the conventional example, it is difficult to obtain an arbitrary output voltage, and it is not possible to provide a wide margin, whereas with the circuit configuration described in the present invention, it is possible to The output voltage can be set to the power supply potential, the ground potential, or any two values in between, and a wide margin can be provided as shown in FIG. Furthermore, since digital signals are generally output in an open collector format, when a circuit is fabricated using the present invention, it can be constructed using only the above-mentioned four resistors, similar to the conventional circuit.

In the embodiments of the present invention, bipolar transistors are shown as switching means, but they may be replaced with P- and N-channel field effect transistors, or the first and second potentials may be set to voltages other than the power supply voltage and the ground voltage value. You can also give

6-

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a conventional example, FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIG. 3 is a diagram showing an output voltage and its voltage margin in an embodiment of the present invention. l...Input terminal 1.2...Input terminal 2
．． 3...Output terminal, CJ+ + Qt + Q
+t*Qt2...transistor, 1 to fL,...resistance. 7- R1h / Z ゛ Figure 1 Figure 2 Vl---7ztVJ ■1- Moxibustion-m-□θ(V) Figure 3 Written amendment to procedure (voluntary) h'l,・'t;' Showa year month Day 1, Incident Display 1982 Patent Application No. 122678
No. 2, Title of the invention Electronic circuit 3, Relationship to the case of the person making the amendment Applicant No. 1, Shiba Go-cho, Minato-ku, Tokyo] 33-1 (423) NEC Corporation Representative: Tadahiro Sekimoto 4, Agent Sumitomo:, 111 Hill Hondenki Co., Ltd. (6591) Patent attorney Susumu Uchihara Telephone Tokyo (03) 456-3111 (main representative) 5, Column 6 of "Claims" and "Detailed Description of the Invention" of the specification to be amended Contents of the amendment (1) The claims are corrected as shown in the attached sheet. (2) Delete "input terminal 1 and" in the 20th line of the second page of the specificity. (3) [PNP transistor in page 4, line 16 of the same book is corrected as "PNP transistor Q, +-J." (4) "Output and" in page 5, line 7 of the same book is corrected as -1 for all [outputs] do. (5) In the same book, page 5, line 16, ``as an example'' is corrected to ``as an example''. (6) In the same book, page 6, line 20, ``A voltage other than the ground potential may be applied.'' is corrected to ``A voltage other than the ground potential may be applied.'' ■ L Attached (corrected) claims 1 copy , 1, Agent Patent attorney Susumu Uchihara Attachment (corrected) claims A device connected in series between the first and second potential supply terminals 1st,
11g2. a first switch means connected between third and fourth resistors and a connection point between the first potential supply end and the third and fourth resistors and controlled by a first input voltage; a second switch means connected between the second potential supply end and a connection point of the first and second resistors and controlled by a second input voltage; 1. An electronic circuit comprising means for outputting an output from a connection point.

Claims (1)

[Claims] A first .
Second. a first switch stage connected between third and fourth resistors and a connection point of the first potential supply end and the third and fourth resistors and controlled by a first input voltage;
a second switch means connected between the second potential supply end and a connection point of the first and second resistors and controlled by a second input voltage; and means for obtaining an output from a connection point.