JPS6044700B2 - Configuration error detection device - Google Patents
Configuration error detection deviceInfo
- Publication number
- JPS6044700B2 JPS6044700B2 JP53029964A JP2996478A JPS6044700B2 JP S6044700 B2 JPS6044700 B2 JP S6044700B2 JP 53029964 A JP53029964 A JP 53029964A JP 2996478 A JP2996478 A JP 2996478A JP S6044700 B2 JPS6044700 B2 JP S6044700B2
- Authority
- JP
- Japan
- Prior art keywords
- microprogram
- signal
- configuration error
- additional function
- control device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Debugging And Monitoring (AREA)
Description
【発明の詳細な説明】
本発明はマイクロプログラム制御装置の構成エラー検
出装置に関するものてある。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a configuration error detection device for a microprogram control device.
マイクロプログラム制御の計算機における制御メモリ
の容量は、機能の複雑さ、多様化及び診断機能の拡大等
により増々大きくなる傾向にある。The capacity of control memory in microprogram-controlled computers tends to increase due to the complexity and diversification of functions, expansion of diagnostic functions, etc.
磁気テープ記憶装置の例では８００ＢＰＩ）１６００Ｂ
ＰＩ、６２５ＯＢＰＩ）及ひ７トラック５５巾ＰＩ等の
記録方式があり、該種々の機能の構成法は使用者によつ
て選択され、一般には全てが一様に付加される訳ではな
い。使用者が機能の追加を必要とした場合、該機能に関
して追加が可能な構成としておくのが望ましい。マイク
ロプログラム制御の計算機においては該追加構成機能は
マイクロプログラムと論理回路の追加による場合があり
、両者の構成が合つていないと誤動作を起すことになる
。 本発明の目的とするところは、マイクロプログラム
制御の計算機において、その計算機の構成によつてマイ
クロプログラム及び論理回路が追加される時、両者の構
成が合つているかを検査し、これにより、誤つて構成に
おける装置の誤動作を防止することにある。In the example of a magnetic tape storage device, 800BPI) 1600B
There are recording systems such as PI, 625OBPI) and 7-track 55-width PI, and the configuration of the various functions is selected by the user, and generally not all are added uniformly. When a user needs to add a function, it is desirable to have a configuration that allows that function to be added. In a microprogram-controlled computer, the additional configuration function may be achieved by adding a microprogram and a logic circuit, and if the configurations of the two do not match, malfunctions will occur. An object of the present invention is to check whether the configurations of the two are compatible when a microprogram and a logic circuit are added to a microprogram-controlled computer depending on the configuration of the computer. The objective is to prevent malfunctions of the device in its configuration.
次に本発明の実施例につき図面を用いて詳細に説明す
る。Next, embodiments of the present invention will be described in detail using the drawings.
第１図は本発明によるマイクロプログラム制御装置の構
成エラー検出装置の一実施例である。図において、１は
計算機の追加機能を構成するパッケージで、この出力ピ
ンの一つはアース接続され、計算機の構成が物理的に分
るようになつている。２は追加機能信号３を’“Ｈ’’
（高）レベルにするための抵抗からなる回路で、パッケ
ージ１が有る時、信号３は’’Ｌ’’（低）レベルに、
無い時ａfＨ’’レベルになる。FIG. 1 shows an embodiment of a configuration error detection device for a microprogram control device according to the present invention. In the figure, numeral 1 is a package that constitutes additional functions of the computer, and one of its output pins is connected to ground, so that the configuration of the computer can be physically seen. 2 sets the additional function signal 3 to ``H''
This is a circuit consisting of a resistor to set the signal to (high) level, and when package 1 is present, signal 3 is set to ``L'' (low) level.
When it is not there, it becomes afH'' level.
４はイクスクルシブオア回路等からなる比較回路、５は
マイクロプログラムを格納する制御メモリ６は制御メモ
リの所定のアドレスのマイクロプログラムをメモリレジ
スタ７に読出するためのアドレスレジスタ、８はアドレ
スレジスタ６の一部の出力信号からなるアドレス信号、
９は構成エラー信号である。Reference numeral 4 indicates a comparison circuit consisting of an exclusive OR circuit, etc., 5 indicates a control memory 6 for storing a microprogram, an address register for reading the microprogram at a predetermined address in the control memory into a memory register 7, and 8 indicates an address register 6. an address signal consisting of some output signals of
9 is a configuration error signal.
第２図は本発明による比較回路４の一実施例である。
図において、制御メモリ５の容量が正ワ−ドから成る計
算機において、追加機能のマイクロプログラムが最後の
１Ｋワードに書込まれている楊合、アドレスレジスタ６
の上位２ビツトがアドレス信号８となり、追加機能信号
３とイクスクルシブオア回路１０， １０で比較される
。例えばアドレスレジスタ６の内容が（ＥＸＸ）１６（
２進数では１１１１ＸＸＸＸＸＸＸＸ）の如く追加機能
のマイクロプログラムを指定した時、追加機能信号パツ
ケージ１が無く追加機能信号３が“Ｈ゛レベルであると
、イクスクルシブオア回路１０， １０とアンド回路１
２により構成エラー信号９が出力される。この結果マイ
クロプログラムとの実行を中止し誤動作を防止すること
が出来る。アンド回路１１は比較回路４の出力を追加機
能信号のマイクロプログラムを指定した時のみ有効にす
る。使宜上、第１図、第２図では追加機能信号３をーつ
のパツケージのみで構成したが、追加機能の有無を示す
ものであれば複数パツケージ及び別の手段であつてもよ
い。 以上述べた如き構成であるから、本発明にあつて
は次の如き効果が得られる。FIG. 2 shows an embodiment of the comparator circuit 4 according to the present invention.
In the figure, in a computer whose control memory 5 has a capacity of positive words, a microprogram for additional functions is written in the last 1K words of the address register 6.
The upper two bits of address signal 8 become address signal 8, which is compared with additional function signal 3 in exclusive OR circuits 10 and 10. For example, the contents of address register 6 are (EXX)16(
When specifying an additional function microprogram such as (1111XXXXXXXX in binary), if there is no additional function signal package 1 and the additional function signal 3 is at "H" level, the exclusive OR circuits 10 and 10 and the AND circuit 1
2 outputs a configuration error signal 9. As a result, execution with the microprogram can be stopped and malfunctions can be prevented. The AND circuit 11 makes the output of the comparison circuit 4 valid only when the microprogram of the additional function signal is specified. For convenience, the additional function signal 3 is constructed from only one package in FIGS. 1 and 2, but it may be formed from a plurality of packages or other means as long as it indicates the presence or absence of the additional function. With the configuration as described above, the following effects can be obtained in the present invention.
追加機能のマイクロプログラムを実行するとき、追加機
能のパツケージ等から成る論理回路の有無を比較し、一
致しなければ動作を中止させ誤動作を防ぐことができる
。When executing a microprogram for an additional function, it is possible to compare the presence or absence of a logic circuit consisting of a package for the additional function, and if they do not match, the operation is stopped to prevent malfunction.
第１図は本発明によるマイクロプログラム構成エラー
検出装置の一実施例を示す図、第２図は比較回路の一実
施例を示す図である。
１・・・・・・追加機能パツケージ、３・・・・・・
追加機能信号、４・・・・・・比較回路、５・・・・・
・制御メモリ、６・・・アドレスレジスタ、７・・・・
・・メモリレジスタ、８・・・・・アドレス信号の一部
、９・・・・・・構成エラー信号。FIG. 1 is a diagram showing an embodiment of a microprogram configuration error detection device according to the present invention, and FIG. 2 is a diagram showing an embodiment of a comparison circuit. 1...Additional function package, 3...
Additional function signal, 4... Comparison circuit, 5...
・Control memory, 6...Address register, 7...
...Memory register, 8...Part of address signal, 9...Configuration error signal.
Claims (1)
つて、複数のマイクロプログラムを格納した制御メモリ
から所定のマイクロプログラムを読み出し、該プログラ
ム対応のパッケージが装着される制御装置において、該
マイクロプログラム対応のパッケージに応じた追加機能
信号を発生する信号発生回路と、前記複数のマイクロプ
ログラム対応のアドレスを格納するアドレスレジスタと
、該アドレスの先頭の２ビット信号と追加機能信号とを
比較する比較回路とを備え、該比較による一致が取れな
かつた場合にマイクロプログラム制御装置の構成エラー
とすることを特徴とするマイクロプログラム制御装置の
構成エラー検出装置。1. In a control device controlled by a microprogram, a predetermined microprogram is read from a control memory storing a plurality of microprograms, and a package compatible with the program is installed in the control device. a signal generation circuit that generates a corresponding additional function signal, an address register that stores addresses corresponding to the plurality of microprograms, and a comparison circuit that compares the first 2-bit signal of the address with the additional function signal, A configuration error detection device for a microprogram control device, characterized in that if a match cannot be obtained by the comparison, a configuration error is detected in the microprogram control device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP53029964A JPS6044700B2 (en) | 1978-03-17 | 1978-03-17 | Configuration error detection device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP53029964A JPS6044700B2 (en) | 1978-03-17 | 1978-03-17 | Configuration error detection device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS54123849A JPS54123849A (en) | 1979-09-26 |
| JPS6044700B2 true JPS6044700B2 (en) | 1985-10-04 |
Family
ID=12290643
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP53029964A Expired JPS6044700B2 (en) | 1978-03-17 | 1978-03-17 | Configuration error detection device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6044700B2 (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5836442Y2 (en) * | 1980-06-26 | 1983-08-16 | 株式会社 栄興社 | Ingot feeding device |
| JPS5715500A (en) * | 1980-07-01 | 1982-01-26 | Fujitsu Ltd | Runaway protecting circuit |
| JPS582919A (en) * | 1981-06-30 | 1983-01-08 | Anritsu Corp | Connection detecting circuit for electronic apparatus |
| JPH0727478B2 (en) * | 1985-08-13 | 1995-03-29 | 日本電気株式会社 | Information processing peripheral device additional function check method |
| US4675769A (en) * | 1985-11-15 | 1987-06-23 | Data General Corporation | Electronic board identification |
-
1978
- 1978-03-17 JP JP53029964A patent/JPS6044700B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS54123849A (en) | 1979-09-26 |
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