JPS6043880A - Manufacture of semiconductor light-emitting device - Google Patents

Manufacture of semiconductor light-emitting device

Info

Publication number
JPS6043880A
JPS6043880A JP58151790A JP15179083A JPS6043880A JP S6043880 A JPS6043880 A JP S6043880A JP 58151790 A JP58151790 A JP 58151790A JP 15179083 A JP15179083 A JP 15179083A JP S6043880 A JPS6043880 A JP S6043880A
Authority
JP
Japan
Prior art keywords
layer
supercooling
grown
growth
degree
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58151790A
Other languages
Japanese (ja)
Inventor
Kazuo Yajima
矢島 一夫
Katsuto Shima
島 克人
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58151790A priority Critical patent/JPS6043880A/en
Publication of JPS6043880A publication Critical patent/JPS6043880A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)
  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)

Abstract

PURPOSE:To manufacture the title device, a clad layer thereof has a necessary sectional shape, the surface thereof is formed flatly and an active layer thereof is also flattened, with excellent productivity, by growing one part of the clad layer on a semiconductor base body while inhibiting a meltback at the large degree of supercooling and growing it at the small degree of supercooling. CONSTITUTION:A P type Ga1-xAlxAs layer 2 and an N type GaAs layer 3 are grown on an N type GaAs substrate 1 through LPE method, and a striped groove is formed to the surface of the layer 3. Each semiconductor layer is grown on the base body through the LPD method. When a first section 4a in a clad layer 4 is grown at the large degree of supercooling at that time, the meltback of the shoulder, etc. of the striped groove is inhibited. An indentation remains in the groove section in the surface under the state, but the clad layer 4 having a flat surface is formed when a residual section 4b is grown at the small degree of supercooling. Consequently, an active layer 5 and each layer on the layer 5 are also flattened. A P side electrode 8 is formed on a P type GaAs cap layer 7 and an N side electrode 9 on the back of the substrate 1, thus completing a light-emitting element.

Description

【発明の詳細な説明】 lal 発明の技術分野 本発明は半導体発光装置のjA造方法、特にストライプ
澤を設けた半導体基体上にダブル・\テロ接合構造を形
成する液相エピタキシャル成長方法の改善に関する。
DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a method for manufacturing a semiconductor light emitting device, and more particularly to an improvement in a liquid phase epitaxial growth method for forming a double \terojunction structure on a semiconductor substrate provided with striped areas.

+bl 技術の背景 多くの業務用或いは民生用の分野を対象とする光を情報
信号の媒体とするシステムにおいて、半導体発光装置は
最も重要な構成要素であって、請求される波長帯域の実
現、或いは安定した単一の基本零次横モード発振、単一
の縦モード発振、閾値電流の低減9発元効率の向上、出
力の増大など半導体発光装置の緒特性の同上について多
くの努力が重ねられている。
+bl Technical background In systems that use light as an information signal medium for many commercial and consumer fields, semiconductor light emitting devices are the most important component, and are essential for achieving the desired wavelength band and Many efforts have been made to improve the basic characteristics of semiconductor light emitting devices, such as stable single fundamental zero-order transverse mode oscillation, single longitudinal mode oscillation, reduction of threshold current, improvement of source efficiency, and increase in output. There is.

(cl 従来技術と問題点 従来知られている半導体発光装置のうちに、ストライプ
状の溝を設けた半導体基体上にダブルへわせる構造が多
く見られる。
(cl. Prior Art and Problems) Among conventionally known semiconductor light emitting devices, there are many structures in which a striped groove is provided on a semiconductor substrate and a double depression is formed on the semiconductor substrate.

第1図はこの様な構造を冶する半導体発光装置の一例を
示す断面図であり、1はnu砒化ガリウクラッド層、5
はn型GaA7As活性層、6はp型GaAAAsクラ
ッド層、7はp型Ga A sキャyプ層、8はpfl
ll電極、9はn側電極である。本構造においてはn 
呈G a AtA sクラッド層4がストライプ領域で
は充分ζこ厚いのに対して、ストライプ執域外では薄く
かつGaAs元吸収層3が設けられてGaA7SA 3
活性層5から浸み出す光がストライプ領域外ではGaA
s光吸収層3によって吸収されるために、ストライプ領
域のみにおいて安定した横モードの共振が行なわれる。
FIG. 1 is a cross-sectional view showing an example of a semiconductor light emitting device having such a structure, in which numeral 1 indicates a nu-arsenide gallium cladding layer, 5
is an n-type GaA7As active layer, 6 is a p-type GaAAAs cladding layer, 7 is a p-type GaAs cap layer, and 8 is a pfl
ll electrode, and 9 is an n-side electrode. In this structure, n
While the GaAtAs cladding layer 4 is sufficiently thick in the stripe region, it is thin outside the stripe region and the GaAs original absorption layer 3 is provided, making the GaA7SA 3
Outside the stripe region, light seeping out from the active layer 5 is exposed to GaA.
Since the light is absorbed by the s-light absorption layer 3, stable transverse mode resonance occurs only in the stripe region.

この半導体発光装置では、nfiGaA8基板1上にp
型GaALAs層2及びn型G a A s層3をまず
エピタキシャル成長し、次いで前記層2及び3を貫通し
て基板1に遅するストライプ状の溝を設けた後に、n型
GaA7Asクラッド層4乃至p型GaAsキャップ層
7をエピタキシャル成長している。
In this semiconductor light emitting device, p
A type GaALAs layer 2 and an n-type GaAs layer 3 are first grown epitaxially, and then, after forming striped grooves penetrating the layers 2 and 3 and extending to the substrate 1, the n-type GaA7As cladding layers 4 to p are grown. A GaAs cap layer 7 is epitaxially grown.

前記の溝などの凹凸を有する半導体基体上に液相エピタ
キシャル成長方法(以下LPE法と略称する)によって
半導体層を成長させる場合に、成長溶液の過冷却度が小
ならば成長速度が遅くメルトバックが強(現われるが基
体表面の凹んだ個所では成長速度が相対的に大きく成長
面は平坦化され易い。成長溶液の過冷却度が大ならば逆
に成長速度が速くメルトバックは抑制され、成長面は基
体表面の形状に近(なる。
When growing a semiconductor layer on a semiconductor substrate having irregularities such as the grooves by liquid phase epitaxial growth (hereinafter referred to as LPE), if the degree of supercooling of the growth solution is small, the growth rate will be slow and meltback will occur. Strong (Although it appears, the growth rate is relatively high in concave areas of the substrate surface and the growth surface is likely to be flattened.If the degree of supercooling of the growth solution is large, the growth rate will be fast and meltback will be suppressed, and the growth surface will be flattened.) is close to the shape of the substrate surface.

第1図に示した半導体発光装置lこおいては横モードの
安定性を得るために、0aAtlLs活性層5、従って
n型CIaAtAsクラッド層4の上表面が平坦であり
、更にり之りド層4のストライプ領域内の厚さは元の浸
み出し幅以上でかつストライプ領域外では極めて薄いこ
とが要求される。クラッド層4をこの様な形状にLPE
成長させるためには過冷却度を小さくしなければならな
いが、過冷却度を小さくずれば先に述へた如くメルトバ
ックが強く現われて、第1図に符−@lOで示すストラ
イプの屑の部分が鈍化してストライプ形状の乱れひいて
はレーザ特性の悪化を招く。
In the semiconductor light emitting device shown in FIG. 1, in order to obtain stability in the transverse mode, the upper surface of the 0aAtlLs active layer 5, and therefore the n-type CIaAtAs cladding layer 4, is flat, and the upper surface of the diagonal layer is flat. The thickness within the stripe area of No. 4 is required to be greater than the original seepage width and extremely thin outside the stripe area. LPE the cladding layer 4 into this shape.
In order to achieve growth, the degree of supercooling must be reduced, but if the degree of supercooling is shifted to a small value, as mentioned above, meltback will appear strongly, and the striped debris indicated by the symbol -@lO in Figure 1 will appear. The portion becomes dull, leading to disturbance of the stripe shape and deterioration of laser characteristics.

この様な状況から0aAA八Sク八ツクラッドLJPE
成長に除して、成長容赦の過冷却度は前記の相反する2
要因の兼ね合いから決定されるが、その条件は極めて狭
い範囲となって実施が困離で再現性も乏しい。
In this situation, 0aAAA8S Kuyatsu Clad LJPE
Compared to growth, the degree of supercooling for growth tolerance is the same as the above two contradictory factors.
It is determined based on a balance of factors, but the conditions are within an extremely narrow range, making it difficult to implement and having poor reproducibility.

(出 発明の目的 本発明は半導体基体上にストライプ状の溝を形成し、該
半導体基体上にダブル・\テロ接合構造なエピタキシャ
ル成長してガイディング効果を得る半導体発光装置を、
容易に再現性良く製造することができる製造方法を提供
することを目的とする。
(Purpose of the Invention) The present invention provides a semiconductor light emitting device in which striped grooves are formed on a semiconductor substrate and a double/terojunction structure is epitaxially grown on the semiconductor substrate to obtain a guiding effect.
It is an object of the present invention to provide a manufacturing method that allows easy manufacturing with good reproducibility.

(el 発明の構成 本発明の前記目的は、半導体基体にストライプ状状の溝
を形成し、該半導体基体上にクラッド層の一部分を筒1
の過冷却度をもって液相エピタキシャル成長し、続いて
該クラッド層の残りの部分を前記第1の過冷却度より小
なる第2の過冷却度をもって成長する半導体発光装置の
製造方法により達成される。
(el) Structure of the Invention The object of the present invention is to form stripe-shaped grooves in a semiconductor substrate, and to form a part of the cladding layer on the semiconductor substrate into a cylinder.
This is achieved by a method for manufacturing a semiconductor light emitting device, in which liquid phase epitaxial growth is performed with a degree of supercooling of , and then the remaining portion of the cladding layer is grown with a second degree of supercooling that is smaller than the first degree of supercooling.

すなわち本発明によれば、まず半導体基体上に大きい過
冷却度をもってメルトバックを抑制してクラッド層の一
部分を成長し、続いて小さい過冷却度をもって成長する
ことによって上面が平坦でストライプ溝内外の厚さの比
が大きいクラッド層を完成する。このクラッド層上に続
いて成長する活性層は平坦となり、良好な特性を有する
半導体発光装置を高い生産性をもって製造することが可
能となる。
In other words, according to the present invention, a part of the cladding layer is first grown on the semiconductor substrate with a high degree of supercooling to suppress meltback, and then a part of the cladding layer is grown with a small degree of supercooling so that the top surface is flat and the inside and outside of the stripe grooves are formed. Complete the cladding layer with a large thickness ratio. The active layer subsequently grown on this cladding layer becomes flat, making it possible to manufacture semiconductor light emitting devices with good characteristics with high productivity.

(fl 発明の実施例 以下本発明を実施例1こより図面を参照して具体的に説
明する。
(fl) EXAMPLES OF THE INVENTION The present invention will be described in detail below with reference to the drawings, starting with Example 1.

第2図(a+乃至ielは先lこ第1区を参照して説明
した半導体発光装置を、本発明を適用して製造する実施
例の主要製造工程lこおける状態を示す断面図である。
FIG. 2 (a+ to iel are cross-sectional views showing states during the main manufacturing process l of an embodiment in which the semiconductor light emitting device described above with reference to section 1 is manufactured by applying the present invention.

n iJI GaAs基板l上に、p fJI Ga 
l −xAtxAs層2を例えばx=0.3.厚さ0.
5〔μノル〕程度lこ、続いてn型GaAs層3を例え
ば厚さ1〔μm)程度にLPg法によって成長させる。
n iJI GaAs substrate l, p fJI Ga
l -xAtxAs layer 2, for example x=0.3. Thickness 0.
Then, an n-type GaAs layer 3 is grown to a thickness of, for example, about 1 [μm] by the LPg method.

次?こ口型G a A s層3の表面より2〔μIIL
 )程度の深さに、例えば3乃至5〔μm)程度の幅の
ストライプ状の溝を設ける。(第2図+a)参照9この
溝は例えば口型Ga A s基板1の主面を(100)
面とし:水(H,0)=1:8:8の混合溶液を用いる
ことにより、図に示す如き逆台形lこ形成される。
Next? 2 [μIIL
) and a stripe-shaped groove having a width of, for example, about 3 to 5 [μm]. (Figure 2+a) Reference 9 This groove is for example a (100)
By using a mixed solution of water (H, 0) = 1:8:8 as a surface, an inverted trapezoid as shown in the figure is formed.

前記半導′体基体上にLPH法lこよって下記゛の各半
導体層を継続してエピタキシャル成長する。ただし、溶
液の溶解のために温度805 [:℃:]に約1時間保
持した後に冷却速度0.5 C’C/wt:Iて降温し
している。
The following semiconductor layers are successively epitaxially grown on the semiconductor substrate by the LPH method. However, after maintaining the temperature at 805° C. for about 1 hour to dissolve the solution, the temperature was lowered at a cooling rate of 0.5 C'C/wt:I.

(1)n型Oa+−xA7xAsクラ、ド層4の第1の
部分4a(第2図(bl参照) 成長溶液のチャージ量; Ga :C1aA、s :kt:0a2Te3= 4 
[g:l : 11 ]D4[mg:] : 5616
(+ng〕:0.4(輔成長溶液の飽和温度; 80t
3(’C)成長開始温度; 798[:’C:] 過冷却度; 2[’C〕 成長時間; 15〔秒〕 成長厚さく平坦面上); 約0.1〔μm〕成長層のA
A組成比; x=0.45 (ill n型Ga+−xAtxAsクラッド層4の残
りの部分4b(第2図1cl参照) 成長溶液のチャージ量; Ga :GaA、s :A7: Gaz’r ea= 
4 (g) : 108.72[mg) : 5.59
2[1+ng) :0.4(:mg)成長溶液の飽和温
度; 798.4 (:’C)成長開始温度: 797
.9(:℃) 過冷却度; 0.5[:℃) 成長時間; 30〔秒〕 成長厚さく平坦面上) 約0.2〔μm〕成長層のht
組成比; ’ x=0.45Flull’ n型Gat
−xAAxAs活性層5(以下第2図(山参照) 成長溶液のチャージ量; Ga:GaAs:Al!+:GazTe3= 4 Cg
) :20Kmg’] :1.60[mg〕:0.15
Cmg)ただし本活性層5以下の成長溶液についてはG
aAsのチャージ量は溶解可能量を超過させている。
(1) First portion 4a of n-type Oa+-xA7xAs clad layer 4 (see Figure 2 (bl)) Charge amount of growth solution; Ga: C1aA, s:kt:0a2Te3=4
[g:l: 11]D4[mg:]: 5616
(+ng): 0.4 (saturation temperature of growth solution; 80t
3 ('C) Growth start temperature; 798 [:'C:] Supercooling degree; 2 ['C] Growth time; 15 [seconds] Growth thickness (on flat surface); Approximately 0.1 [μm] of growth layer A
A composition ratio;
4 (g): 108.72 [mg): 5.59
2[1+ng) :0.4 (:mg) Growth solution saturation temperature; 798.4 (:'C) Growth start temperature: 797
.. 9 (:°C) Degree of supercooling: 0.5 [:°C) Growth time: 30 [seconds] Growth thickness (on flat surface) Approximately 0.2 [μm] ht of growth layer
Composition ratio; 'x=0.45Full' n-type Gat
-xAAxAs active layer 5 (Figure 2 below (see mountain) Charge amount of growth solution; Ga:GaAs:Al!+:GazTe3= 4 Cg
) :20Kmg'] :1.60[mg] :0.15
Cmg) However, for the growth solution with an active layer of 5 or less, G
The amount of charge of aAs exceeds the amount that can be dissolved.

成長時間; 5〔秒〕 [IVl p @ Ga 5−xAtxA、sクラクド
層6成長溶液のチャージ量; Ga:GaAs;At:Mg = 4 [g:l : 16o(mg’:l:6.0 
[mg〕: 1.2〔mg 〕成長時間; 10〔分〕 成長厚さ; 約2.0〔μm〕 成長層のAt組成比; X=0.45 (Vl p型() a A sキャヤツプ層7成長溶液
のチャージ量 Ga : GaAs : Ge =4[g):240[:tng):80(mg)成長時
間;、 3〔分〕 成長厚さ; 約2.0〔μm〕 前記の実施例の如くクラッド層4の第1の部分4aを大
きい過冷却度をもってLPE成長することにより、スト
ライプ溝の肩等ζこおけるメルトバックは抑制される。
Growth time; 5 [seconds] [IVl p @ Ga 5-xAtxA, s Charge amount of cracked layer 6 growth solution; Ga: GaAs; At: Mg = 4 [g: l: 16o (mg': l: 6.0
[mg]: 1.2 [mg] Growth time: 10 [minutes] Growth thickness: Approximately 2.0 [μm] At composition ratio of growth layer: X=0.45 (Vl p type () a As cap Charge amount of layer 7 growth solution Ga: GaAs: Ge = 4 [g): 240 [:tng): 80 (mg) Growth time: 3 [minutes] Growth thickness: Approximately 2.0 [μm] Above implementation By growing the first portion 4a of the cladding layer 4 by LPE with a large degree of supercooling as in the example, meltback at the shoulders and the like of the stripe grooves is suppressed.

この状態ではその上表面には図に示す如く溝の部分で凹
みを残しているか、残る部分4bを小さい過冷却度をも
ってLPE成長することによって、平坦部分の成長厚さ
累計03〔μm〕程度の僅少な成長量で上表面が平坦で
ストライプ内外の厚さの比が23〔μm〕:Q、3[μ
m〕程度のクラッド層4が形成される。− n型G a AAA sクラッド層4の上表面が平坦で
であるために、活性層5及びその上に成長する各層も平
坦となる。
In this state, as shown in the figure, either a depression is left at the groove part on the upper surface, or the remaining part 4b is grown by LPE with a small degree of supercooling, so that the total growth thickness of the flat part is about 0.3 [μm]. The upper surface is flat with a small amount of growth, and the ratio of the inside and outside thickness of the stripe is 23 [μm]:Q, 3 [μm].
A cladding layer 4 having a thickness of about 100 m] is formed. - Since the upper surface of the n-type GaAAAs cladding layer 4 is flat, the active layer 5 and each layer grown thereon are also flat.

次いで前記p型G a A sキャラ1層7上にp何重
た半導体発光素子が完成する。(第2図1cl参照)以
上説明した実施例においては溝の形状は逆台形であるが
、溝の形状が■形成いは他の形状であっても同様に本発
明を適用することができる。また前記実施例はG a 
A s −Ga AtA s系半導体層を成長している
が、他の半導体材料例えばInk−InGaAsP系等
のLPE成長にも本発明を適用して同様な効果を得るこ
とができる。
Next, a semiconductor light emitting device is completed in which p layers are stacked on the p-type GaAs character layer 7. (See FIG. 2, 1cl) In the embodiment described above, the shape of the groove is an inverted trapezoid, but the present invention can be similarly applied even if the shape of the groove is a square shape or another shape. Further, in the above embodiment, Ga
Although an As-GaAtAs-based semiconductor layer is grown, the present invention can be applied to LPE growth of other semiconductor materials, such as Ink-InGaAsP-based, to obtain similar effects.

Igl 発明の詳細 な説明した如く本発明によれば、クラッド層が所要の断
面形状を備えてかつ表面が平坦に形成され、活性層も平
坦となって、安定した単一の横モードなど優れた特性の
半導体発光装置を良好な生産性をもって製造することが
可能となる。
As described in detail, according to the present invention, the cladding layer has the required cross-sectional shape and the surface is flat, and the active layer is also flat, resulting in excellent properties such as a stable single transverse mode. It becomes possible to manufacture a semiconductor light emitting device with characteristics with good productivity.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の対象とする半導体発光装置の例を示す
断面図、第2図ta+乃至telは本発明の実施例を示
す断面図である。 図において、1はn型G a A s基板、2はp f
JI GaAtAs層、3はn型GaAs層、4はn型
GaA虚クラッド層、4a及び4bは該クラッド層4の
一部、5はn型()aAtAs活性層、6はp型G a
 A7Asクラッド層、7はp型G a A sキヤツ
プ層、8はp側電極、9はn側電極を示す。 乎 II¥] 竿 2 図 竿 2 図 (d
FIG. 1 is a sectional view showing an example of a semiconductor light emitting device to which the present invention is applied, and FIG. 2 ta+ to tel are sectional views showing an embodiment of the present invention. In the figure, 1 is an n-type GaAs substrate, 2 is a pf
JI GaAtAs layer, 3 is an n-type GaAs layer, 4 is an n-type GaA virtual cladding layer, 4a and 4b are parts of the cladding layer 4, 5 is an n-type ()aAtAs active layer, 6 is a p-type GaA
A7As cladding layer, 7 a p-type GaAs cap layer, 8 a p-side electrode, and 9 an n-side electrode.乎II¥] Rod 2 Figure rod 2 Figure (d

Claims (1)

【特許請求の範囲】[Claims] 半導体基体にストライプ状の溝を形成し、該半導体基体
上にクラッド層の一部分を第1の過冷却度をもって液相
エピタキシャル成長し、続いて該クラッド層の残りの部
分を前記第1の過冷却度より小なる第2の過冷却度をも
って成長することを%徴とする半導体発光装置の製造方
法。
Striped grooves are formed in a semiconductor substrate, a portion of the cladding layer is liquid phase epitaxially grown on the semiconductor substrate at a first degree of supercooling, and then the remaining portion of the cladding layer is grown at the first degree of supercooling. A method for manufacturing a semiconductor light emitting device, characterized in that the semiconductor light emitting device is grown with a second smaller degree of supercooling.
JP58151790A 1983-08-20 1983-08-20 Manufacture of semiconductor light-emitting device Pending JPS6043880A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58151790A JPS6043880A (en) 1983-08-20 1983-08-20 Manufacture of semiconductor light-emitting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58151790A JPS6043880A (en) 1983-08-20 1983-08-20 Manufacture of semiconductor light-emitting device

Publications (1)

Publication Number Publication Date
JPS6043880A true JPS6043880A (en) 1985-03-08

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP58151790A Pending JPS6043880A (en) 1983-08-20 1983-08-20 Manufacture of semiconductor light-emitting device

Country Status (1)

Country Link
JP (1) JPS6043880A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4907974A (en) * 1987-02-13 1990-03-13 Mitsubishi Denki Kabushiki Kaisha Method of growing a semiconductor device structure
US11982501B2 (en) 2018-12-03 2024-05-14 Mitsubishi Heavy Industries, Ltd. Flow path resistor and heat exchanger

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4907974A (en) * 1987-02-13 1990-03-13 Mitsubishi Denki Kabushiki Kaisha Method of growing a semiconductor device structure
US11982501B2 (en) 2018-12-03 2024-05-14 Mitsubishi Heavy Industries, Ltd. Flow path resistor and heat exchanger

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