JPS6041691Y2 - surge absorber - Google Patents

surge absorber

Info

Publication number
JPS6041691Y2
JPS6041691Y2 JP18573880U JP18573880U JPS6041691Y2 JP S6041691 Y2 JPS6041691 Y2 JP S6041691Y2 JP 18573880 U JP18573880 U JP 18573880U JP 18573880 U JP18573880 U JP 18573880U JP S6041691 Y2 JPS6041691 Y2 JP S6041691Y2
Authority
JP
Japan
Prior art keywords
external connection
surge absorber
electrode plate
electrode
printed circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP18573880U
Other languages
Japanese (ja)
Other versions
JPS57108367U (en
Inventor
一英 海老根
大 小田
春一郎 田口
Original Assignee
松下電器産業株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 松下電器産業株式会社 filed Critical 松下電器産業株式会社
Priority to JP18573880U priority Critical patent/JPS6041691Y2/en
Publication of JPS57108367U publication Critical patent/JPS57108367U/ja
Application granted granted Critical
Publication of JPS6041691Y2 publication Critical patent/JPS6041691Y2/en
Expired legal-status Critical Current

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  • Thermistors And Varistors (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Description

【考案の詳細な説明】 本考案はサージ吸収器の中でも、特にIC等を多数装着
したプリント基板に装着されるものに関し、その目的と
するところはICプリント基板のICの実装密度向上に
寄与できるものを提供することにある。
[Detailed description of the invention] This invention relates to a surge absorber, especially one that is attached to a printed circuit board with a large number of ICs mounted thereon, and its purpose is to contribute to improving the mounting density of ICs on the IC printed circuit board. It's about providing something.

従来、ICを多数装着したプリント基板においては電源
線から侵入してくるサージおよびノイズを吸収するため
に、ICの電源部とアース間に酸(tJ4バリスタ、コ
ンデンサ等を個別に接続してサージ吸収回路を接続して
いるが、このようなサージ吸収回路を設けるためには各
々にパターンを印刷する必要があり、また電源用の母線
もかなり大きなものを印刷する必要があり、サージ吸収
回路は個々の保護部品の大きさと合わせて非常に大きな
面積を必要とするため、ICの実装密度を高くすること
ができないものであった。
Conventionally, in order to absorb surges and noise that enter from the power supply line on printed circuit boards with a large number of ICs mounted, acid (tJ4 varistors, capacitors, etc.) were individually connected between the IC power supply section and the ground to absorb surges. The circuits are connected, but in order to provide such a surge absorption circuit, it is necessary to print a pattern on each of them, and the power supply bus bar also needs to be printed quite large, so the surge absorption circuit must be printed individually. Since this requires a very large area together with the size of the protective components, it has been impossible to increase the packaging density of the IC.

これに対して本考案は上記問題点を回避することができ
るものであって、以下本考案の実施例を第1図〜第5図
に基づいて説明する。
In contrast, the present invention can avoid the above-mentioned problems, and embodiments of the present invention will be described below with reference to FIGS. 1 to 5.

1は電圧依存性非直線抵抗素子としての酸化亜鉛バリス
タ素子〔以下バリスタ素子と称す〕で、長方形板状を威
し、両端面に電極2,2を有する。
Reference numeral 1 designates a zinc oxide varistor element (hereinafter referred to as a varistor element) as a voltage-dependent nonlinear resistance element, which has a rectangular plate shape and has electrodes 2, 2 on both end faces.

3は第1の電極板で、一側縁3aの両端部にL字状に折
曲げられた第1の外部接続端子4,4を有する。
Reference numeral 3 designates a first electrode plate, which has first external connection terminals 4, 4 bent into an L-shape at both ends of one side edge 3a.

4aは第1の外部接続端子4,4に穿設されたビス穴、
5は第2の電極板で、一側縁5aに所定間隔で下方に伸
びる第2の外部接続端子6.6・・・が設けられている
4a is a screw hole drilled in the first external connection terminals 4, 4;
Reference numeral 5 denotes a second electrode plate, and second external connection terminals 6, 6, .

なおバリスタ素子1と第1、第2の電極板3,5は次の
ようにしてサージ吸収器を構成している。
The varistor element 1 and the first and second electrode plates 3 and 5 constitute a surge absorber as follows.

第1の電極板3と第2の電極板5とは第3図のように並
設されており、第1、第2の電極板3゜5の間にバリス
タ素子1を介装して、一方の電極2と第1の電極板3と
を電気的機械的に強固に接続し、他方の電極2と第2の
電極板5とを電気的機械的に強固に接続して構成されて
いる。
The first electrode plate 3 and the second electrode plate 5 are arranged side by side as shown in FIG. 3, and the varistor element 1 is interposed between the first and second electrode plates 3°5. One electrode 2 and the first electrode plate 3 are electrically and mechanically connected firmly, and the other electrode 2 and the second electrode plate 5 are electrically and mechanically connected firmly. .

なお、このように構成されたサージ吸収器は、耐候性を
向上させるために通常は更に樹脂塗装されている。
Note that the surge absorber configured in this manner is usually further coated with resin to improve weather resistance.

このように構成された本考案のサージ吸収器は、第4図
に示すようにic7,7・・・が装着されたプリント基
板のアース部に第1の外部接続端子4.4をビスで取付
け、第2の外部接続端子6゜6・・・が各IC7,7・
・・の電源ピンに接続されるよう装着される。
In the surge absorber of the present invention constructed in this way, the first external connection terminal 4.4 is attached with a screw to the grounding part of the printed circuit board on which the ICs 7, 7, etc. are mounted, as shown in Fig. 4. , the second external connection terminal 6゜6... is connected to each IC7, 7.
It is attached so that it is connected to the power pin of ....

第5図は本考案のサージ吸収器の電気的等価回路を示し
、8,8・・・はサージ吸収素子を表わす。
FIG. 5 shows an electrical equivalent circuit of the surge absorber of the present invention, and 8, 8, . . . represent surge absorbing elements.

このように多数のサージ吸収器に代わるものを単一部品
でかつコンパクトにすることができ、装着されるプリン
ト基板の実装密度を向上させることができる。
In this way, it is possible to replace a large number of surge absorbers with a single component and to make it compact, and it is possible to improve the mounting density of the printed circuit board to which it is attached.

また第1の電極板3の両端の第1の外部接続端子4,4
をプリント基板に固定するため、プリント基板の補強材
として役立つ。
In addition, first external connection terminals 4, 4 at both ends of the first electrode plate 3
It is useful as a reinforcing material for printed circuit boards because it fixes them to printed circuit boards.

更に第2の電極板5がプリント基板の電源母線となり得
る構成であるため、個々のICに電源ラインを配線する
必要がなく、プリント配線上も好ましい。
Furthermore, since the second electrode plate 5 is configured to be able to function as a power supply bus of a printed circuit board, there is no need to wire a power supply line to each IC, which is preferable in terms of printed wiring.

以上説明のように本考案のサージ吸収器は比較的強度が
強く、また多数のサージ吸収器に代るものであるにもか
かわらず比較的薄い板状のコンパクトな形状を威してお
り、これをプリント基板に立てて使用する構造であるた
めプリント基板上の占有面積を非常に小さいものにでき
、該サージ吸収器が装着される基板の実装密度の向上に
寄与できる。
As explained above, the surge absorber of the present invention has relatively strong strength, and although it replaces many surge absorbers, it has a relatively thin plate-like compact shape. Since the surge absorber is used by standing on a printed circuit board, the area occupied on the printed circuit board can be made very small, and this can contribute to improving the mounting density of the circuit board on which the surge absorber is mounted.

またプリント基板の電源母線ともなり得るため、プリン
ト配線上も好ましいものである。
Moreover, since it can also serve as a power supply bus for a printed circuit board, it is also preferable in terms of printed wiring.

【図面の簡単な説明】[Brief explanation of the drawing]

図面は本考案の一実施例を示し、第1図は酸化亜鉛バリ
スタ素子の正面図、第2図は第1図のX−X矢視図、第
3図はサージ吸収器の外観斜視図、第4図は実装状態説
明図、第5図は第3図の電気的等価回路図である。 1・・・・・・酸化亜鉛バリスタ〔電圧依存性非直線抵
抗素子〕、2,2・・・・・・電極、3・・・・・・第
1の電極板、4・・・・・・第1の外部接続端子、5・
・・・・・第2の電極板、6・・・・・・第2の外部接
続端子。
The drawings show an embodiment of the present invention, in which Fig. 1 is a front view of a zinc oxide varistor element, Fig. 2 is a view taken along the line X-X in Fig. 1, and Fig. 3 is an external perspective view of a surge absorber. FIG. 4 is an explanatory diagram of the mounting state, and FIG. 5 is an electrical equivalent circuit diagram of FIG. 3. 1... Zinc oxide varistor [voltage-dependent nonlinear resistance element], 2, 2... Electrode, 3... First electrode plate, 4...・First external connection terminal, 5・
...Second electrode plate, 6...Second external connection terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] り字状に折曲げられた第1の外部接続端子を有する第1
の電極板と所定間隔で配列された第2の外部接続端子を
有する第2の電極板とを並設し、第1、第2の電極板間
に、両端面に電極を有する平板状の電圧依存性非直線抵
抗素子を介装してそれぞれの電極面を電極板に接続した
ことを特徴とするサージ吸収器。
a first external connection terminal having a first external connection terminal bent in an L-shape;
and a second electrode plate having second external connection terminals arranged at predetermined intervals are arranged side by side, and a flat voltage plate having electrodes on both end surfaces is placed between the first and second electrode plates. A surge absorber characterized in that each electrode surface is connected to an electrode plate with a dependent nonlinear resistance element interposed therebetween.
JP18573880U 1980-12-23 1980-12-23 surge absorber Expired JPS6041691Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18573880U JPS6041691Y2 (en) 1980-12-23 1980-12-23 surge absorber

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18573880U JPS6041691Y2 (en) 1980-12-23 1980-12-23 surge absorber

Publications (2)

Publication Number Publication Date
JPS57108367U JPS57108367U (en) 1982-07-03
JPS6041691Y2 true JPS6041691Y2 (en) 1985-12-19

Family

ID=29987058

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18573880U Expired JPS6041691Y2 (en) 1980-12-23 1980-12-23 surge absorber

Country Status (1)

Country Link
JP (1) JPS6041691Y2 (en)

Also Published As

Publication number Publication date
JPS57108367U (en) 1982-07-03

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