JPS6041111A - Constant voltage device - Google Patents

Constant voltage device

Info

Publication number
JPS6041111A
JPS6041111A JP14940483A JP14940483A JPS6041111A JP S6041111 A JPS6041111 A JP S6041111A JP 14940483 A JP14940483 A JP 14940483A JP 14940483 A JP14940483 A JP 14940483A JP S6041111 A JPS6041111 A JP S6041111A
Authority
JP
Japan
Prior art keywords
voltage
power supply
impedance
lsi
vdd
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14940483A
Other languages
Japanese (ja)
Inventor
Hiroshi Ushiki
牛木 浩
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP14940483A priority Critical patent/JPS6041111A/en
Publication of JPS6041111A publication Critical patent/JPS6041111A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is dc
    • G05F3/10Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/24Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
    • G05F3/242Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage
    • G05F3/247Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage producing a voltage or current as a predetermined function of the supply voltage

Abstract

PURPOSE:To prevent the excessive application of voltage in an LSI and to reduce the number of external parts by providing an impedance circuit changing its impedance in accordance with the detected voltage of a voltage detecting part and fixing power supply voltage to the LSI on the same chip. CONSTITUTION:The ON resistance of a transistor (TR) 21 is changed from a signal ¦VGS¦ analogically changed by the voltage detecting part 18, a closed loop is constituted between the voltages VDD and VSS through a resistor 22 and current is made to flow into the loop. When VDD potential is increased through a terminal 13 by the high intensity of illumination of a solar battery 11, the signal ¦VGS¦ is increased and the impedance value of the impedance circuit 20 is reduced, so that the load of the LSI is equivalently increased and the voltage VDD shows the tendency to be decreased. Consequently, the signal ¦VGS¦ is reduced, the impedance value of the impedance circuit 20 is increased and the load is reduced. Therefore, the voltage VDD is kept at a fixed level.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は太陽電池を電源供給手段に用いた定電圧装置に
関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a constant voltage device using a solar cell as a power supply means.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

最近のLSI(大規模集積回路)の発達に伴い、電子式
小型計算機や電子式時計等はCMOS構造により、消費
電流が1.5Vで数μA程度というようになってきた。
With the recent development of LSIs (Large Scale Integrated Circuits), small electronic computers, electronic clocks, etc. have come to have a CMOS structure, and their current consumption is now on the order of several μA at 1.5V.

またLSIの低消費電力化に伴い、電源供給手段として
太陽電池が使用されるようになってきている。この太陽
電池を電源供給源として用いた場合、太陽電池の特性上
太陽電池に照射される光の照度が極めて高い場合、LS
Iに過大電圧が印加されるのを防止するために、閉ルー
プを構成するような形で発光ダイオードが付けられてい
る。
Furthermore, with the reduction in power consumption of LSIs, solar cells have come to be used as a power supply means. When using this solar cell as a power supply source, if the illuminance of the light irradiated to the solar cell is extremely high due to the characteristics of the solar cell, the LS
In order to prevent excessive voltages from being applied to I, light emitting diodes are attached in such a way that they form a closed loop.

第1図は太陽電池を使用した電子式小型計算機の回路構
成図である。太陽電池1の負側は抵抗2を介してLSI
3の電源電圧’VDDの供給端子4に接続され、正極側
はLSl、9の基準電圧V8Bの供給端子5に直接接続
されている。上記端子4,5間にはコンデンサ6と発光
ダイオード7が並列に接続されている。発光ダイオード
7は太陽電池1に照射される光の照度が極めて高い場合
、ダイオード7に電流を流すことにより電源閉ループを
構成してLSl、9に過大な電圧が印加されるのを防止
するためのものである。
FIG. 1 is a circuit diagram of a small electronic computer using a solar cell. The negative side of solar cell 1 is connected to LSI through resistor 2.
The positive electrode side is directly connected to the supply terminal 5 of the reference voltage V8B of LS1, 9. A capacitor 6 and a light emitting diode 7 are connected in parallel between the terminals 4 and 5. The light emitting diode 7 is used to prevent excessive voltage from being applied to the LSI and 9 by forming a power supply closed loop by passing current through the diode 7 when the illuminance of the light irradiated to the solar cell 1 is extremely high. It is something.

抵抗2とコンデンサ6は電源電圧の急激な変化に対して
LSIJに印加される電圧の急激な変動を防止するため
の平滑回路である。8はキーが一ド、9は液晶表示装置
である。
The resistor 2 and the capacitor 6 are a smoothing circuit for preventing sudden changes in the voltage applied to the LSIJ due to sudden changes in the power supply voltage. 8 is a key, and 9 is a liquid crystal display device.

第2図は照度[LuX )をパラメータとした一般的な
1セル当りの太陽電池特性である。太陽電池の開放電圧
は、構成する半導体素子(シリコン単結晶や8i −I
n!03 、5nO1)などにより1.5v系のLfS
Iを駆動する場合は、太陽電池のセルを4〜5枚直列に
接続して使用する。第3図は数枚のセルを直列にした場
合の太陽電池の特性である。
FIG. 2 shows general solar cell characteristics per cell using illuminance [LuX) as a parameter. The open-circuit voltage of a solar cell is determined by the semiconductor elements (silicon single crystal, 8i-I
n! 03, 5nO1) etc., 1.5v system LfS
When driving I, 4 to 5 solar cells are connected in series and used. Figure 3 shows the characteristics of a solar cell when several cells are connected in series.

上記のようにLSIの標準動作電圧が1.5vに対し、
セルを4〜5枚直列に接続して電源回路を構成する。こ
のような構成上高照度時の過大な印加電圧対策として、
従来は外付けの発光ダイオード2を用いており、外付は
部品が多数になりがちであった。
As mentioned above, the standard operating voltage of LSI is 1.5V,
A power supply circuit is constructed by connecting 4 to 5 cells in series. As a countermeasure against excessive applied voltage during high illuminance due to this configuration,
Conventionally, an external light emitting diode 2 has been used, and external components tend to be large in number.

〔発明の目的〕[Purpose of the invention]

上記のように従来は、過大印加電圧防止策として外付け
の発光ダイオードを用いていたが、外付は部品の軽減化
として、発光ダイオードの場合と1様の回路動作をLS
I内で実現しようとするものである。
As mentioned above, in the past, an external light emitting diode was used as a measure to prevent excessive applied voltage, but the external light emitting diode was used to reduce the number of components, and the circuit operation was similar to that of the light emitting diode.
This is what we are trying to achieve within I.

〔発明の概要〕[Summary of the invention]

本発明は上記目的を達成するために、太陽電。 In order to achieve the above object, the present invention provides solar power.

池の電圧を検出する電圧検出部と、LSIに並列に設け
られ電圧検出部の検出電圧に応じてインピーダンスが変
化してL8Iへの電源電圧を一定化するインピーダンス
回路とを、LSIと同一チップ上に設けるようにしたも
のである。
A voltage detection section that detects the voltage of the battery and an impedance circuit that is provided in parallel with the LSI and whose impedance changes according to the detected voltage of the voltage detection section to keep the power supply voltage to the L8I constant are installed on the same chip as the LSI. It was designed to be installed in

〔発明の実施例〕[Embodiments of the invention]

以下図面を参照して本発明の一実施例を説明する。第4
図において11は太陽電池、12はLSI領域、13は
太陽電池供給電源端子、14はLSI電源端子、15は
基準電位電源端子、16は平滑用コンデンサ、17は平
滑用抵抗である。端子14.15はLSIにそれぞれ電
源電圧VDD 、 vssを供給する。電源端子14゜
15間には、電圧検出部18としてのNチャネル型MO
Sトランジス919、コンデンサC1゜Ctが直列接続
され、トランジスタ19のr−トはA点に接続されてい
る。電源端子14゜15間には、インピーダンス回路2
oとしてのNチャネル型MO8)ランジスタ21、閉ル
ープ用負荷抵抗22が直列接続され、トランジスタ21
(1:)’l−)は:yy7−’、yfc1 、C,間
のB点に接続されている。
An embodiment of the present invention will be described below with reference to the drawings. Fourth
In the figure, 11 is a solar cell, 12 is an LSI area, 13 is a solar cell supply power terminal, 14 is an LSI power supply terminal, 15 is a reference potential power supply terminal, 16 is a smoothing capacitor, and 17 is a smoothing resistor. Terminals 14 and 15 supply power supply voltages VDD and vss to the LSI, respectively. Between the power supply terminals 14 and 15, there is an N-channel MO as a voltage detection section 18.
An S transistor 919 and a capacitor C1°Ct are connected in series, and the r-to of the transistor 19 is connected to the A point. Impedance circuit 2 is connected between power terminals 14 and 15.
N-channel type MO8) transistor 21 and closed-loop load resistor 22 are connected in series, and the transistor 21
(1:)'l-) is connected to point B between:yy7-', yfc1, and C.

上記構成の第4図において、ダートとドレインが接続さ
れたNチャネル型トランジスタ19は定電圧回路として
作用し、そのダートとドレインの接続黒人の電位は、端
子14における電・圧■DDからトランジスタ19のス
レッショルド電圧vTHだけ高いレベルとなる。よって
B点の電圧vBは VB =(VDD −VTH) ” + / (CH+
C2)となる。この電圧vBはNチャネル型トランジス
タ2ノのr−)信号になっている。またトランジスタ2
ノのr−ト、ソース間電圧IV、SIは 1VGsl=lVDnl−1vBl である。電源電圧vDDが低下するに従ってl VO2
1は低下し、トランジスタ2ノのオン抵抗は大きくなる
。またVDDが上昇するに従ってl Yes lは上昇
し、トランジスタ21のオン抵抗は小さくなる。電源電
圧VDDはコンデンサCI+Cff1の容啜値及びトラ
ンジスタ19のスレツショルド電圧等の設定により変化
させることができる。電圧検出部18によりアナログ量
的に変化する信号I Vos lからトランジスタ21
のオン抵抗が変化し、抵抗22を通してVDDとVB2
間に閉ループを構成して電流を流す。即ち太陽電池1ノ
が高照度により、端子13を通してVDD電位が高くな
るとl VGS lが大きくなり、インピーダンス回路
2θのインピーダンス値が低下するためLSIの負荷が
等何曲に大きくなり、電源電圧VDDは低下する傾向を
示す。これによりl Vos lが小さくなることによ
りインピーダンス回路20のインピーダンス値が上昇し
、負荷が小さくなる。以上の動作によりVDDは一定し
たレベルとなるものである。
In FIG. 4 having the above configuration, the N-channel transistor 19 with its dart and drain connected acts as a constant voltage circuit, and the potential of the connection between its dart and drain is determined from the voltage/voltage DD at the terminal 14 of the transistor 19. The level becomes higher by the threshold voltage vTH. Therefore, the voltage vB at point B is VB = (VDD - VTH) ” + / (CH+
C2). This voltage vB is the r-) signal of the N-channel transistor 2. Also transistor 2
The source-to-source voltage IV and SI of the node are 1VGsl=lVDnl-1vBl. As the power supply voltage vDD decreases, l VO2
1 decreases, and the on-resistance of transistor 2 increases. Furthermore, as VDD rises, l Yes l rises, and the on-resistance of the transistor 21 becomes smaller. The power supply voltage VDD can be changed by setting the capacitance value of the capacitor CI+Cff1, the threshold voltage of the transistor 19, etc. Transistor 21 from signal I Vos l which changes in analog quantity by voltage detection unit 18
The on-resistance of VDD and VB2 changes through the resistor 22.
In between, a closed loop is formed and a current is passed. That is, when the solar cell 1 is exposed to high illuminance and the VDD potential increases through the terminal 13, l VGS l increases, and the impedance value of the impedance circuit 2θ decreases, so the load on the LSI increases, and the power supply voltage VDD becomes Shows a decreasing trend. As a result, l Vos l becomes smaller, thereby increasing the impedance value of the impedance circuit 20 and reducing the load. Through the above operations, VDD remains at a constant level.

なお本発明は上記実施例に限定されることなく種々の応
用が可能である。例えばインピーダンス回路20の抵抗
22は省略してもよい。また電圧検出部18は電圧分割
回路等のように、要は太陽電池の電圧を検出できてイン
ピーダンス回路20のインピーダンス値を制御できるも
〔発明の効果〕 以上説明した如く本発明によれば、太陽電池を電趣電圧
供給手段として用いた各種の演算処理装置において、高
照度による過大印加電圧防止策を、発光ダイオードを用
いた手段でなく、LSI内で実現できるようにすること
により外付は部品を軽減できるものである。
Note that the present invention is not limited to the above embodiments, and can be applied in various ways. For example, the resistor 22 of the impedance circuit 20 may be omitted. In addition, the voltage detection section 18 is like a voltage dividing circuit or the like, in short, it can detect the voltage of the solar cell and control the impedance value of the impedance circuit 20. [Effects of the Invention] As explained above, according to the present invention, In various arithmetic processing devices that use batteries as electrical voltage supply means, measures to prevent excessive voltage applied due to high illuminance can be implemented within the LSI instead of using light emitting diodes, thereby eliminating the need for external components. It is possible to reduce the

【図面の簡単な説明】[Brief explanation of drawings]

第1因は従来の定電圧装置を示す回路図、第2図、第3
図は太陽電池特性図、第4図は本発明の一実施例の回路
図である。 11・・・太陽電池、12・・・LSI、13,14゜
15・・・電源端子(・ヤツド)、16・・・平滑用コ
ンデンサ、17・・・平滑用抵抗、18・・・電圧検出
部、20・・・インピーダンス回路、21・°°トラン
ジスタ。 出願人代理人 弁理士 鈴 江 武 音節1図 第4図 1.2 −一一一一画
The first factor is the circuit diagrams showing conventional voltage regulators, Figures 2 and 3.
The figure is a solar cell characteristic diagram, and FIG. 4 is a circuit diagram of an embodiment of the present invention. 11...Solar cell, 12...LSI, 13,14゜15...Power terminal (Yatsud), 16...Smoothing capacitor, 17...Smoothing resistor, 18...Voltage detection Section 20... Impedance circuit, 21.°°transistor. Applicant's representative Patent attorney Takeshi Suzue Syllable 1 Figure 4 Figure 1.2 -1111 stroke

Claims (1)

【特許請求の範囲】 (11太陽電池と、この電池電圧が供給され集積回路に
電源電圧を供給する電源部と、この電源部の電極間に設
けられ前記太陽電池の電圧を検出する電圧検出部と、前
記集積回路と並列に設けられ前記電圧検出部の検出電圧
に応じてインピーダンスが変化して前記集積回路への電
源電圧を一定化するインピーダンス回路とを具備したこ
とを特徴とする定電圧装置。 (2) 前記電源部と電圧検出部とインピーダンス回路
は、前記集積回路と同一チップ上に構成されることを特
徴とする特許請求の範囲第1項に記載の定電圧装置。 (3)前記インピーダンス回路は、少くともMO8トラ
ンジスタを含みそのソース、ドレイン間抵抗値を前記電
圧検出部の検出電圧に応じて変化させることを特徴とす
る特許請求の範囲第1項に記載の定電圧装置。 (4) 前記電圧検出部は、′ε電源電圧分割する電圧
分割回路でありその電圧を前記MO8)ランジスタのダ
ートに与えることを特徴とする特許請求の範囲第3項に
記載の定電圧装置。
[Scope of Claims] (11) A solar cell, a power supply section to which the battery voltage is supplied and supplies a power supply voltage to the integrated circuit, and a voltage detection section provided between the electrodes of this power supply section and detecting the voltage of the solar cell. and an impedance circuit that is provided in parallel with the integrated circuit and whose impedance changes according to the voltage detected by the voltage detection section to constantize the power supply voltage to the integrated circuit. (2) The voltage regulator according to claim 1, wherein the power supply section, the voltage detection section, and the impedance circuit are configured on the same chip as the integrated circuit. The voltage regulator according to claim 1, wherein the impedance circuit includes at least an MO8 transistor and changes its source-drain resistance value in accordance with the voltage detected by the voltage detection section. 4) The voltage regulator according to claim 3, wherein the voltage detecting section is a voltage dividing circuit that divides the power supply voltage by 'ε, and applies the voltage to the dart of the MO8) transistor.
JP14940483A 1983-08-16 1983-08-16 Constant voltage device Pending JPS6041111A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14940483A JPS6041111A (en) 1983-08-16 1983-08-16 Constant voltage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14940483A JPS6041111A (en) 1983-08-16 1983-08-16 Constant voltage device

Publications (1)

Publication Number Publication Date
JPS6041111A true JPS6041111A (en) 1985-03-04

Family

ID=15474387

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14940483A Pending JPS6041111A (en) 1983-08-16 1983-08-16 Constant voltage device

Country Status (1)

Country Link
JP (1) JPS6041111A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5337842A (en) * 1976-09-20 1978-04-07 Nippon Precision Saakitsutsu Kk Electronic circuit
JPS5419151A (en) * 1977-07-13 1979-02-13 Mitsubishi Electric Corp Multishunt constant voltage device
JPS5434044A (en) * 1977-08-19 1979-03-13 Seiko Instr & Electronics Ltd Constant voltage circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5337842A (en) * 1976-09-20 1978-04-07 Nippon Precision Saakitsutsu Kk Electronic circuit
JPS5419151A (en) * 1977-07-13 1979-02-13 Mitsubishi Electric Corp Multishunt constant voltage device
JPS5434044A (en) * 1977-08-19 1979-03-13 Seiko Instr & Electronics Ltd Constant voltage circuit

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