JPS6032164A - Efm demodulating method - Google Patents

Abstract

PURPOSE:To attain EFM demodulation in a simple constitution with use of an ROM of small capacity by applying group division, conversion, etc. to an EFM (eight-to-fourteen modulation) signal to produce a 10-bit signal and accessing to a memory. CONSTITUTION:For the EFM signal of 1 word and 14 bits which is latched by a latch circuit 4, 12 bits are grouped every 3 bits with remaining 2 bits left as they are by an EFM demodulating circuit 5. These grouped bits are converted into signals of 2 bits respectively by NOR gates 50 and 51, 52 and 53.... Then an ROM58 storing the demodulation signal is accessed by a signal of 10 bits. Thus the EFM demodulation is made possible in a simple constitution with use of an ROM of small capacity.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an EFM (Eight Tol;'OURTEENM) used in compact disc (CD) players, etc.
ODULATION) signal EFM demodulation method.

Conventional configuration and its problems The audio signal to be recorded on a CD is 16 bits A-D.
After conversion, it is divided into two words of 8 bits each, and each divided word is divided into 8 bits for the purpose of making it easier to extract the clock for bit synchronization during playback and to reduce the Do acid component. This 14-bit 1-word signal is converted into a 14-bit signal corresponding to each of 256 sets of data patterns.
Connected to a 4-pit 1-word signal. EF this operation,
It's called M.

This EFM signal is NRZ-I (NORET[J几NT
OZgR, OINVEFLTED) code is recorded. At the time of reproduction, the operation opposite to the above, that is, EFM demodulation is required. Conventionally, the above EFM demodulation has been performed using a demodulation circuit composed of a combination of gate circuits, but this circuit requires a large number of gates and has a large-scale configuration.

In addition to the above method, there is also a method using a ROM in which one word of the EFM signal, 14 bits, is used as an address signal and an 8-bit demodulated signal corresponding to each address is written.
In this method, there are only 256 valid addresses (addresses to which correct demodulated signals are written) out of 14 bits of one word of the EFM signal, and there is a large amount of waste.

OBJECTS OF THE INVENTION The present invention solves the above-mentioned conventional problems and enables EFM demodulation using a small-capacity ROM and a relatively simple configuration.

Structure of the Invention In order to achieve the above-mentioned object, the present invention solves the problem of run length (NRZ), which is one of the properties of a 14-bit, 1-word EFM signal.
This method utilizes the fact that the signal, NR, ZI times the signal level inversion bit length) is 3 or more. That is, in the present invention, considering 3 consecutive bits in a 14-bit 1-word NRZI signal, the possible combinations of these 3 bits are (
Taking advantage of the fact that there are only four types: 000) (Ool) (oto) (1oo), and that these four types can be converted to 2 bits (for example, φφ, φ1, 11, 1φ),
It is characterized by demodulation.

DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described with reference to FIGS. 1 to 3.

In Figure 1, ■ is a CD player that inputs the signal obtained by waveform shaping the signal picked up by the optical pickup (see Figure 2), and detects the rising and falling positions of the signal. An edge detection circuit 2 which obtains an output signal as shown in FIG. 2 (B) is triggered by the output of the edge detection circuit 1 and generates a pulse (FIG. 2 (GO) 3 is a clock (4.3 in f) shown in FIG.
4 is a latch circuit that latches the contents of the shift register 3 every 1 word (14 pits) of the EFM signal, and 5 is an EFM signal.
This EFM demodulation circuit 5 converts the 14-bit EFM signal output from the latch circuit 4 into an 8-bit EFM demodulation circuit.
It is converted into an FM demodulated signal and sent to the next stage signal processing section.

FIG. 3 shows the RFM demodulation circuit 5 and latch circuit 4. As shown in FIG. In FIG. 3, 4 is the latch circuit, 5 is the EFM demodulation circuit, 50.51.52°53.54,55
, 56 and 57 are OR circuits, respectively, and these OR circuits 50 to 57 are latch circuit output signals.

〜b13, and b3, b, and b4%b, and 0, b
, and b7, b8 and 0, b, and blos bII and b1
2. Input bat and bill, d2, d3, d4,
Outputs d6, d6, d7, d8, and d9.

58 is mentioned above. This is an IK-byte single-only memory (ROM) which takes 10-bit signals sbl and d2 to d0 as address inputs and outputs an 8-bit E1''M demodulated signal corresponding to the address as data output.

In this way, this embodiment has a BF of 1 word (14 pits).
The M signal is divided into four groups (
b2ba b+) (bs ba t+r) (bs
bo b + wa) (bn l) u b□3) and the remaining 2 bis,
b. , b, and 4 types of data patterns (000) (001) (010) (100) from each group consisting of consecutive 3 bits.
) 2-bit conversion outputs d2d, d4ds,
d, ct,, dsd.

and the remaining 2 pits b. %E)l and the 2-bit conversion outputs d2 to d9 of the above four groups, a total of 10 pits, are used as address signals, and demodulated using a storage device in which an 8-bit EFM demodulated signal is written as data corresponding to each address. According to this embodiment, it is possible to have a simple circuit configuration, and it is possible to use a small-capacity ROM. In the above embodiment, OR circuits 50 to 57 are used, but NAND circuits may be used instead.

Effects of the Invention The present invention has the above-mentioned configuration, converts a 14-bit EFM signal into a 10-pin signal using eight two-person KOA circuits or two-person NAND circuits, and corresponds to the EFM signal converted to 10 bits. 8 pits) The EIi'M demodulated signal is written into a storage device using the 10 pit signal as an address, and demodulated using this storage device.According to the method of the present invention, the EFM demodulation circuit can be simplified, and a small capacity ROM can be used. This is something that can be realized.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a circuit implementing an EFM demodulation method in an embodiment of the present invention, FIG. 2 is a timing chart of the same circuit, and FIG. 3 is a block diagram of a part of the circuit shown in FIG. 1. . 4... Launch circuit, 5... EFM demodulation circuit, 50~5
7...OR circuit, 58...Read only memory (R
OM).

Claims (2)

[Claims] (1) ■Word 14-bit BF'M signal is divided into four groups (bIN + b2N
+b, +N) (N=1.2.3.4) and the remaining 2 bits G
b+s, bu), and from each group consisting of consecutive 3 bits, 2-pit conversion output corresponding to the 4 possible data patterns of bIN+b2N+b3N described above 1) 4N) b5H
and the remaining 2 pits above) b + s - b + s and the above 4
Group 2-bit conversion output biN, bsN (N=1
．． 2.3.4) A total of 10 bits of signal is used as an address signal, and demodulation is performed using a storage device in which an 8-pill FM demodulated signal is written as data corresponding to each address. EMF demodulation method. (2) A patent that obtains a 2-bit conversion output from each group by inputting blN, b2N, b2N, and b3N of each of four groups consisting of consecutive three bits to a two-person chaor circuit or a two-person canand circuit. A BFM demodulation method according to claim 1.