JPS6031384A - Single board color camera - Google Patents

Single board color camera

Info

Publication number
JPS6031384A
JPS6031384A JP58140340A JP14034083A JPS6031384A JP S6031384 A JPS6031384 A JP S6031384A JP 58140340 A JP58140340 A JP 58140340A JP 14034083 A JP14034083 A JP 14034083A JP S6031384 A JPS6031384 A JP S6031384A
Authority
JP
Japan
Prior art keywords
circuits
signal
image pickup
pickup element
adder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58140340A
Other languages
Japanese (ja)
Inventor
Osamu Hiyama
樋山 修
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP58140340A priority Critical patent/JPS6031384A/en
Publication of JPS6031384A publication Critical patent/JPS6031384A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/10Circuitry of solid-state image sensors [SSIS]; Control thereof for transforming different wavelengths into image signals
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/10Cameras or camera modules comprising electronic image sensors; Control thereof for generating image signals from different wavelengths

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Color Television Image Signal Generators (AREA)

Abstract

PURPOSE:To compensate electrically the drift of transfer efficiency by providing a sample hold circuit and an adder between an image pickup element and an amplifier. CONSTITUTION:The sample hold circuits 14, 15, 16, 17 and the adders 18, 19 are provided between the image pickup element and the amplifiers 2, 3. The sampling position of the circuits 14, 15 is taken as (e), (f) in Fig. A. Thus, the output waveform of the circuits 14, 15 is respectively as shown in Figs. B and C to an output of the image pickup element 1 as shown in Fig. A. In Fig., (b1) is the first read signal, (b2) is a read signal close to the end and a leak signal (c) is generated near the (b2). In adding the outputs of the circuits 14, 15 shown in Figs. B, C by the adder 18, the waveform is as shown in Fig. D and the effect of the leak signal to the idle bits of a horizontal register H. CCD is corrected as shown in (d) and the reduction in the read signal due to the incomplete transfer of the image pickup element during a horizontal scanning period is corrected.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は固体の撮像素子を用いた単板カラーカメラに関
するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a single-chip color camera using a solid-state image sensor.

従来例の構成とその問題点 この種のカメラについては、たとえばNATIO−NA
L TEGHN’ICAL REPORT VOL、2
8 。
Conventional configuration and problems Regarding this type of camera, for example, NATIO-NA
L TEGHN'ICAL REPORT VOL, 2
8.

Nα2 (APR,1982)第33頁〜第42頁に詳
しく紹介されている。以下、第1図を用いてその構成を
説明すると、CPD撮像素子1ば、2個の出力端子t+
 、 i2をもち、画素との関係が、水平方向に1画素
おきに上下の水平レジスタH1CODに1ビツトおきに
読み込まれる構成になっている。
It is introduced in detail on pages 33 to 42 of Nα2 (APR, 1982). The configuration will be explained below with reference to FIG. 1.The CPD image sensor 1 has two output terminals t+.
, i2, and the relationship with the pixels is such that every other pixel in the horizontal direction is read into the upper and lower horizontal registers H1COD every other bit.

ここでOy 、 Ye 、 Mg 、 GはCPD撮像
素子1の受光部上に配列された色フィルターである。し
たがって、2個の出力端子t1.t2から各々増幅器2
゜3を通して増幅された信号を加算器4で加算し、ロー
パスフィルタ(LPF)5を通して輝度信号を得る。ま
た、色差信号は、この2つの出力端子t1 + t2か
ら各々増幅器2,3を通した信号を、カセットオフ周波
数500 KHzのLPF6.7を通して減算器8で減
算することにより、Gy−YeとMg−Cの色差信号を
1水平期間ごとに順次得ている。これらの信号は、基本
的には、1H期間遅延線(1HDL)gとスイッチで構
成された1H3W回路10で同時化されてGy −Ye
とMg −Gの色差信号に分離され、輝度信号と共にエ
ンコーダ11によりNTSC信号に変換している。ここ
では輝度信号補正回路、13はホワイトバランス補正回
路、またFDAは水平レジスタH,CODの読み山部で
あp、CPTは呼び水転送部である。
Here, Oy, Ye, Mg, and G are color filters arranged on the light receiving part of the CPD image sensor 1. Therefore, the two output terminals t1. From t2 to amplifier 2 respectively
The signals amplified through .degree. 3 are added by an adder 4, and then passed through a low pass filter (LPF) 5 to obtain a luminance signal. In addition, the color difference signal is obtained by subtracting the signals from these two output terminals t1 + t2 through amplifiers 2 and 3 through an LPF 6.7 with a cassette off frequency of 500 KHz using a subtracter 8. -C color difference signals are sequentially obtained every horizontal period. These signals are basically synchronized by a 1H3W circuit 10 consisting of a 1H period delay line (1HDL) g and a switch, and are converted into Gy -Ye.
and Mg-G color difference signals, which are converted into NTSC signals by an encoder 11 along with a luminance signal. Here, 13 is a luminance signal correction circuit, 13 is a white balance correction circuit, FDA is a horizontal register H, a reading peak part of COD is p, and CPT is a priming transfer part.

このように1画素毎に上下の水平レジスタH,CC;D
に読み込まれるために水平レジスタHICD内に1ビツ
トおきに空ビットが生じ水平レジスタH1CCDの転送
効率が不完全の時すなわち、100係の転送効率でない
時には空ビットに信号が洩粗その量は1H期間の最終段
に近付く程大きくなる。
In this way, the upper and lower horizontal registers H, CC; D for each pixel
When the transfer efficiency of the horizontal register H1CCD is incomplete, that is, when the transfer efficiency is not 100, the amount of signal leakage to the empty bits is 1H period. The closer it gets to the final stage, the larger it gets.

例えば均一な白パターンを映し、水平レジスタH9CO
Dの出力側の読み山部FDAを各ビット毎にリセットパ
ルスで駆動した時の出力信号は第2図のようになる。図
においてaはリセントノイズ、bは信号分、Cは空ビッ
トへの洩れ信号である。
For example, projecting a uniform white pattern, horizontal register H9CO
The output signal when the reading peak part FDA on the output side of D is driven with a reset pulse for each bit is as shown in FIG. In the figure, a is recent noise, b is a signal, and C is a leakage signal to empty bits.

このため、輝度信号としては輝度シェーディングが発生
してしまう。また上下の水平レジスタH1CODの転送
効率が同じ時では画面の左右で色信号量が違ってしまい
、異なる時では色シェーディングが発生してしまう。
Therefore, luminance shading occurs in the luminance signal. Furthermore, when the transfer efficiency of the upper and lower horizontal registers H1COD is the same, the amount of color signals will be different on the left and right sides of the screen, and when they are different, color shading will occur.

発明の目的 本発明は上記従来の欠点を解消し、転送効率のドリフト
を電気的に補償した単板カラーカメラを提供するもので
ある。
OBJECTS OF THE INVENTION The present invention eliminates the above-mentioned conventional drawbacks and provides a single-chip color camera that electrically compensates for drift in transfer efficiency.

発明の構成 上記目的を達成するために、本発明は撮像素子と増幅器
との間にサンプル・ホールド回路と加算器を設けたもの
である。
Structure of the Invention In order to achieve the above object, the present invention provides a sample-and-hold circuit and an adder between an image sensor and an amplifier.

実施例の説明 以下本発明の一実施例について第3図を参照して説明す
る。図において、1,2.3は第1図の1.2.、QC
相当する。そのため出力端子t1tt2からは第4図(
イ)に示すように従来例と同様空ビットに洩れ0のある
信号が出力される。14゜15はサンプル・ホールド回
路、18は加算器である。ここで同ホールド回路14.
16のザンプリング位置を第4図(イ)に示すe、fと
する。したがって、第4図(イ)に示す撮像素子1の出
力に対しサンプル・ホールド回路14.15の出力波形
は夫々第4図(ロ)及び(ハ)のようになる。
DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will now be described with reference to FIG. In the figure, 1, 2.3 are 1.2. , Q.C.
Equivalent to. Therefore, from the output terminal t1tt2, as shown in Fig. 4 (
As shown in (b), a signal with zero leakage in the empty bits is output as in the conventional example. Reference numerals 14 and 15 are sample and hold circuits, and 18 is an adder. Here, the same hold circuit 14.
The sampling positions of 16 are designated as e and f shown in FIG. 4(a). Therefore, the output waveforms of the sample and hold circuits 14 and 15 for the output of the image sensor 1 shown in FIG. 4(a) become as shown in FIG. 4(b) and (c), respectively.

ここで第4図について説明すると、(イ)は端子t1か
らの信号を示すもので、blは最初の読み出し信号、b
2は最終近くの読み出し信号であシ、bz近くでは洩れ
信号Cが発生している。(ロ)はサンプルホールド回路
14の出力でb+ 、 bzはb< 、 b2に対応し
ている。e→はサンプルホールド回路15の出力であυ
 c/は洩れ分Cに和尚するものである。(ロ)、(ハ
)に示すサンプルホールド回路14゜15の出力を加算
器18で加算するとに)のようになり、dに示すように
水平レジスタH,CC:Dの空ビットへの洩れ信号の影
響が補正され、水平走査期間における撮像素子の不完全
転送による読出し信号の低下が補正できる。なお、端子
t1からの信号をサンプルホールド回路14+ 16を
中心に説明したが、16,17.19を夫々14,15
゜18と同様のサンプルホールド回路及び加算器とする
と、端子t2よシの信号も前記と同様に補正されること
は容易に理解できるため説明は省略する。
Now, to explain about FIG. 4, (a) shows the signal from the terminal t1, bl is the first read signal, b
2 is a readout signal near the end, and a leakage signal C is generated near bz. (b) is the output of the sample and hold circuit 14, and b+ and bz correspond to b< and b2. e→ is the output of the sample hold circuit 15 υ
c/ is to compensate for the leakage C. When the outputs of the sample and hold circuits 14 and 15 shown in (b) and (c) are added by the adder 18, the result is as shown in (d), and the leakage signal to the empty bits of the horizontal registers H, CC:D is obtained as shown in d. The influence of this can be corrected, and the drop in the readout signal due to incomplete transfer of the image sensor during the horizontal scanning period can be corrected. Note that although the signal from terminal t1 has been explained centering around the sample and hold circuits 14+16, 16, 17.19 are
If the same sample-hold circuit and adder as in 18 are used, it is easy to understand that the signal from the terminal t2 is also corrected in the same manner as described above, so a description thereof will be omitted.

発明の効果 以上実施例により説明したが、本発明によれば撮像素子
はあたかも完全転送の形にできるため、良好な画質が得
られる一方、撮像素子の転送パルスの振巾、位相等調整
の自由度が大きくなる0、。
Effects of the Invention As explained above with reference to embodiments, according to the present invention, the image sensor can be made into a form of perfect transfer, so good image quality can be obtained, while freedom in adjusting the amplitude, phase, etc. of the transfer pulse of the image sensor is achieved. 0, where the degree increases.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の単板カラーカメラのブロック図、第2図
は撮像素子の出力波形図、第3図は本発明の一実施例に
おける単板カラーカメラの要部ブロック図、第4図はそ
の出力波形図である。 1・・・・・・撮像素子、2,3・・・・・・増巾器、
14,15゜16.17・・・・・サンプル・ホールド
回] 18゜19・・・・・・加算器。
Fig. 1 is a block diagram of a conventional single-chip color camera, Fig. 2 is an output waveform diagram of an image sensor, Fig. 3 is a block diagram of main parts of a single-chip color camera according to an embodiment of the present invention, and Fig. 4 is a block diagram of a conventional single-chip color camera. It is an output waveform diagram. 1... Image sensor, 2, 3... Magnifier,
14,15゜16.17...Sample/hold times] 18゜19...Adder.

Claims (1)

【特許請求の範囲】[Claims] 受光部に色フィルターを配列し、水平走査方向に上記受
光部からの信号を1画素おきに異なる水平レジスタに夫
々1ビツトおきに読み込捷せる撮像素子と、前記撮像素
子の出力側に設けた夫々サンプル位置の異なるサンプル
ホールド回路と、前記サンプルホールド回路の出力を加
算する加算器とからなる単板カラーカメラΦ
an image sensor in which color filters are arranged in a light receiving part, and signals from the light receiving part are read in every other bit in horizontal registers for every other pixel in a horizontal scanning direction; and an image sensor is provided on the output side of the image sensor. A single-chip color camera Φ consisting of sample hold circuits each having a different sample position and an adder that adds the outputs of the sample hold circuits.
JP58140340A 1983-07-29 1983-07-29 Single board color camera Pending JPS6031384A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58140340A JPS6031384A (en) 1983-07-29 1983-07-29 Single board color camera

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58140340A JPS6031384A (en) 1983-07-29 1983-07-29 Single board color camera

Publications (1)

Publication Number Publication Date
JPS6031384A true JPS6031384A (en) 1985-02-18

Family

ID=15266551

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58140340A Pending JPS6031384A (en) 1983-07-29 1983-07-29 Single board color camera

Country Status (1)

Country Link
JP (1) JPS6031384A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS623587A (en) * 1985-06-28 1987-01-09 Nec Corp Color solid-state image pickup device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS623587A (en) * 1985-06-28 1987-01-09 Nec Corp Color solid-state image pickup device

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