JPS6028190B2 - solid state imaging device - Google Patents

solid state imaging device

Info

Publication number
JPS6028190B2
JPS6028190B2 JP54155855A JP15585579A JPS6028190B2 JP S6028190 B2 JPS6028190 B2 JP S6028190B2 JP 54155855 A JP54155855 A JP 54155855A JP 15585579 A JP15585579 A JP 15585579A JP S6028190 B2 JPS6028190 B2 JP S6028190B2
Authority
JP
Japan
Prior art keywords
signal
ccd
light receiving
time delay
receiving element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54155855A
Other languages
Japanese (ja)
Other versions
JPS5679582A (en
Inventor
宏 瀧川
邦広 谷川
正二 土肥
宗一 今井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP54155855A priority Critical patent/JPS6028190B2/en
Publication of JPS5679582A publication Critical patent/JPS5679582A/en
Publication of JPS6028190B2 publication Critical patent/JPS6028190B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/71Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
    • H04N25/711Time delay and integration [TDI] registers; TDI shift registers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/76Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/768Addressed sensors, e.g. MOS or CMOS sensors for time delay and integration [TDI]

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Description

【発明の詳細な説明】 本発明は時間遅延積分(Time比laylnteg−
ration:TDIと略称する)構造のCCDを用い
た撮像装置、特に赤外線撮像装置の新規な構成に関する
ものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides time delay integral
The present invention relates to a new configuration of an imaging device, particularly an infrared imaging device, using a CCD (abbreviation: TDI) structure.

リニアアレイ型赤外線撮像装置は一般に多数の赤外線受
光素子を−列に配列し、この赤外線受光素子により光亀
変換した信号をCCDの各ビットに導き時系列の画像信
号として出力するようにしたものである。
A linear array type infrared imaging device generally has a large number of infrared receiving elements arranged in a row, and the signals that have been optically converted by the infrared receiving elements are guided to each bit of a CCD and output as a time-series image signal. be.

このような型の濠像装置では各受光素子にIJ−ク電流
等があって素子自身の信号対雑音比(S/N比)が悪く
、また、各素子の特性の不均一性に起因して良好な画像
を再現することが困難である。
In this type of moat imaging device, each light receiving element has an IJ-current, etc., resulting in a poor signal-to-noise ratio (S/N ratio) of the element itself, and also due to non-uniformity of characteristics of each element. It is difficult to reproduce good images.

そこで上記欠点を除去し、S/N比を向上し、かつ赤外
線受光素子の実装密度を向上し、空間分解能を向上する
ことを目的として、行・列状に受光素子を配列したアレ
イの列方向に光学像を走査し、時間差を有して誘起した
列上の各受光素子からの出力信号を光学像の走査と同期
した関係で時間遅延積分する積分器、例えばCCDの各
ビットに入力して前記撮像信号を積分するようにし、撮
像信号のS/N比を向上するようにしたものが提案され
ている。この方式においては1個の受光素子から得られ
る信号をS、雑音をNとすると、列方向の受光素子数を
nとした場合、積分信号はnS、雑音信号はノnNとな
るので結果として信号対雑音比はノ市倍向上することに
なる。従って上記各列の積分器からの出力を別のCCD
に接続して時系列の画像信号を取出し、これを表示装置
に入力すれば赤外線画像を良好な形で表示することが可
能となる。ところが、上記時間遅延積分型リニアレィの
赤外線撮像装置では、装置の空間分解能を上げるため各
検知素子をできるだけ高密度に配列することが要求され
る反面、時間遅延積分CCDは比較的大きな面積を要す
る上、各受光素子について1つの入力部が必要であるの
で、当該CCDと検知素子の配線やレイアウトの設定が
大きな問題となり、さらにリニアレイの赤外線素子のピ
ッチは代表的な値として100一m程度必要であるのに
時系列信号処理CCDのビット長を、この受光素子のピ
ッチに合わせるとCCDを高いクロック周波数で転送す
るには長すぎて高速の信号処理ができないという問題を
生じていた。
Therefore, in order to eliminate the above drawbacks, improve the S/N ratio, improve the mounting density of infrared light receiving elements, and improve the spatial resolution, we have developed an array in which light receiving elements are arranged in rows and columns. The optical image is scanned, and the output signals from each light-receiving element on the row induced with a time difference are inputted to each bit of an integrator, for example, a CCD, which performs time-delay integration in synchronization with the scanning of the optical image. A device has been proposed in which the image signal is integrated to improve the S/N ratio of the image signal. In this method, if the signal obtained from one light-receiving element is S and the noise is N, then if the number of light-receiving elements in the column direction is n, the integral signal is nS and the noise signal is non-nN, so the resulting signal is The noise ratio will be improved by a factor of two. Therefore, the output from the integrators in each column is transferred to another CCD.
By connecting to the infrared rays and extracting time-series image signals and inputting them to a display device, it becomes possible to display an infrared image in a good form. However, in the above-mentioned time-delay-integration type linear array infrared imaging device, each detection element is required to be arranged as densely as possible in order to increase the spatial resolution of the device, but on the other hand, the time-delay-integration CCD requires a relatively large area. Since one input section is required for each light-receiving element, wiring and layout settings for the CCD and detection element become a major problem.Furthermore, the pitch of the infrared elements in the linear array needs to be approximately 100m as a typical value. However, if the bit length of a time-series signal processing CCD is matched to the pitch of this light receiving element, the problem arises that the CCD is too long to be transferred at a high clock frequency, making high-speed signal processing impossible.

また各赤外線受光素子よりの出力信号は通常撮像対象物
を識別するための信号変動分の他に出力信号の大部分を
しめる背景信号としての直流分が重畳された形で出てく
るので、この信号を処理するため、対象信号の変動分の
みを取出すオーバフローゲートを有しかつ不要な直流信
号成分を9E地する機能をそなえた信号蓄積領域をCC
Dの信号入力部と受光素子の間に設けることが必要とな
り、この点においても各機能素子の配置が複雑となり大
きなスペースを必要とする問題を生じていた。本発明は
以上述べた点に鑑みなされたもので、光学走査方向と直
交する方向を行方何として行・列状に配列した受光素子
アレイと前記光学走査方向と平行な各列の光学信号をそ
れぞれ時間遅延積分するCCDと、前記各列ごとの信号
を積分したCCD出力を入力し、行方向の時系列信号と
して出力するCCDからなる固体撮像装置において、前
記光学走査方向と平行な各列の受光素子と時間遅延積分
CCDとを結ぶ接続線を受光素子アレイの列方向の両側
に交互に導出するとともに該導出線に対応して前記時間
遅延積分CCDを配設し、かつ交互の列に対応した各時
間遅延積分CCDの出力を2系統の時系列信号出力用C
CDにそれぞれ接続するようにしたことを特徴とするも
のである。
In addition, the output signal from each infrared receiving element usually comes out in the form of a DC component as a background signal, which makes up most of the output signal, in addition to the signal fluctuation component for identifying the object to be imaged. In order to process the signal, CC is a signal accumulation area that has an overflow gate that extracts only the variation of the target signal and also has the function of removing unnecessary DC signal components.
It is necessary to provide the functional elements between the signal input section of D and the light receiving element, and in this respect as well, the arrangement of each functional element becomes complicated and a large space is required. The present invention has been made in view of the above-mentioned points, and includes a light receiving element array arranged in rows and columns with the direction perpendicular to the optical scanning direction, and optical signals in each column parallel to the optical scanning direction. In a solid-state imaging device comprising a CCD that performs time delay integration and a CCD that inputs the CCD output that integrates the signal for each column and outputs it as a time series signal in the row direction, light is received in each column parallel to the optical scanning direction. Connecting lines connecting the elements and time delay integrating CCDs are alternately led out on both sides of the light receiving element array in the column direction, and the time delay integrating CCDs are arranged corresponding to the leading lines, and corresponding to the alternate columns. C for outputting two time series signals from each time delay integral CCD
It is characterized in that it is connected to a CD respectively.

以下図面を参照しながら本発明の実施例について説明す
る。
Embodiments of the present invention will be described below with reference to the drawings.

第1図は本発明の園体撮像装置、特に赤外線撮像装置の
一実施例の構成を示す。図において1・0は赤外線受光
素子アレイで光学像すな.わち信号の矢印で示す走査方
向×と平行な列方向にn個,信号の走査方向と直交する
行方向にm個の受光素子を配列したものを示す。糠像装
置としては上記受光素子アレイ10上を行方向に平行に
光学像を走査するように構成し、1行目の受光素子が時
庵制,で検出した同一の光学像を時間t2で再び第2行
目の受光素子が検出し、この信号を時間らで第3行目の
受光素子が検出する。
FIG. 1 shows the configuration of an embodiment of the field imaging device of the present invention, particularly an infrared imaging device. In the figure, 1 and 0 indicate an infrared light receiving element array, which is an optical image. In other words, n light-receiving elements are arranged in the column direction parallel to the scanning direction x indicated by the signal arrow, and m light-receiving elements are arranged in the row direction orthogonal to the signal scanning direction. The rice bran imager is configured to scan an optical image in parallel to the row direction on the light receiving element array 10, and the light receiving element in the first row scans the same optical image detected at time t2 again. The light receiving elements in the second row detect this signal, and the light receiving elements in the third row detect this signal at a certain time.

このように時間を遅延しながら受光走査を第n番目の素
子まで繰り返す。一方、これらの受光素子が検出した光
電変換信号を導出線a,b,c等を通じて受光信号の変
化分を導出して背景信号等の直流信号成分を排他する機
能を有する各行に対応して設けた信号蓄積領域11にt
,,t2,……Tnのタイミングで導出する。
In this way, the light receiving scan is repeated up to the n-th element while delaying the time. On the other hand, a photoelectric conversion signal detected by these light-receiving elements is provided corresponding to each row with a function of deriving changes in the received light signal through derivation lines a, b, c, etc. and excluding DC signal components such as background signals. t in the signal accumulation area 11
,, t2, . . . are derived at timings Tn.

次に、この信号蓄積領域からの変化分信号を時間遅延積
分器であるCCD12の第1ビット目、第3ビット目,
……第(幻−1)ビット目に時間t,,t2,…・・・
tnのタイミングで入力ゲート13を通して導入し、第
1行目から第n行目の受光素子が検出した光電変換信号
を時間積分する。なお時間遅延積分にCDのクロック周
波数は各行の受光子が順次受光していく周波数と同期ご
せておく。この時間遅延積分した信号、すなわちnSを
出力検出部14から取出し、時系列に信号を出力する2
系統のCCD15に入力し、矢印方向Aに転送導出する
。上記時間遅延積分器は12は第1列目から第m列目ま
でそれぞれ対応して設けられており、上記時間遅延積分
の1〜n番目の出力P,〜Pmを、それぞれ時系列に信
号を出力するCCD15の各対応ビットに同時に導入し
、この信号を順次出力端子16,17から導出して画像
信号として取出すが、本実施例においては、1列おきに
受光素子アレイの左右に設けた時間遅延積分器12にそ
れぞれの受光素子が検出した信号を取り出すように構成
したもので、時系列信号出力CCD15をそれぞれの時
間遅延積分器12に対応して受光素子アレイ10の左右
に設けており、前記したように素子間の配線の簡素化お
よび高速動作を可能としたものである。
Next, the change signal from this signal accumulation area is applied to the first bit, third bit, and
...At the (phantom-1)th bit, time t,,t2,...
The photoelectric conversion signals introduced through the input gate 13 at timing tn and detected by the light receiving elements of the first to nth rows are time-integrated. For time delay integration, the clock frequency of the CD is synchronized with the frequency at which the photodetectors in each row sequentially receive light. This time-delay integrated signal, that is, nS, is taken out from the output detection section 14, and the signal is output in time series.
The signal is inputted to the CCD 15 of the system and transferred and derived in the direction of arrow A. The time delay integrators 12 are provided correspondingly from the first column to the m-th column, and output signals of the 1st to nth outputs P, ~Pm of the time delay integral in time series, respectively. This signal is simultaneously introduced into each corresponding bit of the CCD 15 to be output, and this signal is sequentially derived from the output terminals 16 and 17 to be taken out as an image signal. The delay integrator 12 is configured to take out the signal detected by each light receiving element, and time series signal output CCDs 15 are provided on the left and right sides of the light receiving element array 10 corresponding to each time delay integrator 12. As described above, this makes it possible to simplify wiring between elements and achieve high-speed operation.

このように受光素子アレイの左右に信号処理系を設ける
ことにより配線の複雑化をなくし、かつ時系列信号出力
CCD15のビット数を従来のものに比し1/2ビット
に構成でき、素子の製造歩留をも向上することができる
。なお19は時系列信号出力CCD15への時間遅延積
分CCD12からの入力信号処理部を示す。第2図は第
1図の赤外線受光素子アレイの具体的構成を示す。
By providing the signal processing system on the left and right sides of the light-receiving element array in this way, the complexity of wiring can be eliminated, and the number of bits of the time-series signal output CCD 15 can be reduced to 1/2 bit compared to the conventional one. Yield can also be improved. Note that 19 indicates an input signal processing section from the time delay integration CCD 12 to the time series signal output CCD 15. FIG. 2 shows a specific configuration of the infrared light receiving element array shown in FIG.

図において第1図と同等部には同一符号を付して説明す
る。第2図においてaは水銀・力ドミゥム・テルル(日
やdTe)等の多元半導体からなる受光素子形成基板2
川こ複数の受光素子をn列×m行個機成した受光素子ア
レイの−部を示す榛式図である。この赤外線受光素子は
一般に受光面積をほぼ50りm×50仏m程度に形成し
、各素子のピッチPを100山mに構成する。このよう
な受光素子アレイの受光部Seを第2図bに示すように
シリコン基板Si上に構成した時間遅延積分CCD12
の入力部に構成した信号蓄積部11の入力ダイオードに
つながる配線のインジウムlnパッド部にインジウムl
n等の導電体を介して接続し、各素子間の配線を簡単化
したものである。なおb図の多元半導体基板20中の点
線はP−n接合を示し、21はlnパッド,22はln
半田を示す。なおc図はシリコン基板Si上に構成した
配線パターンの一例を示し、23は受光素子に対応した
位置に形成したlnパッド部を示し、他の斜線部はアル
ミニウム等で構成した配線を示しており、この配線は列
方向の1列上の受光素子からの信号検出線を図のように
R,Lに示すごとく各列ごとに左右に導出しており、配
線密度の減少と複雑化を防止するようにしたものである
In the figure, the same parts as those in FIG. 1 are given the same reference numerals and explained. In Fig. 2, a is a light-receiving element forming substrate 2 made of a multi-component semiconductor such as mercury, dTe, etc.
FIG. 2 is a diagram showing a section of a light-receiving element array including a plurality of light-receiving elements arranged in n columns and m rows. The infrared receiving element generally has a light-receiving area of about 50 square meters by 50 square meters, and the pitch P of each element is 100 square meters. The light receiving section Se of such a light receiving element array is a time delay integrating CCD 12 constructed on a silicon substrate Si as shown in FIG. 2b.
The indium ln pad part of the wiring connected to the input diode of the signal storage part 11 configured at the input part of
The wiring between each element is simplified by connecting through a conductor such as n. Note that the dotted lines in the multi-component semiconductor substrate 20 in figure b indicate P-n junctions, 21 is an ln pad, and 22 is an ln pad.
Showing solder. Note that figure c shows an example of a wiring pattern formed on a silicon substrate Si, 23 shows an ln pad part formed at a position corresponding to a light receiving element, and other hatched parts show wiring made of aluminum or the like. In this wiring, the signal detection lines from the light-receiving element one row above in the column direction are led out to the left and right for each column, as shown by R and L in the figure, to prevent a reduction in wiring density and complication. This is how it was done.

以上述べたように、リニアアレイ型赤外線撮像装置を構
成すれば、TDI構造を簡単に構成できS/N比の向上
と信号処理の高速化によるビデオ信号として必要な周波
数を上記のような赤外線撮像装置においても容易に実現
でき、さらに装置の構成を簡単化できる。
As described above, by configuring a linear array type infrared imaging device, it is possible to easily configure a TDI structure, improve the S/N ratio, and increase the speed of signal processing. It can also be easily realized in a device, and furthermore, the configuration of the device can be simplified.

なお本発明の要旨とするところは赤外線撮像装置のみな
らず可視光に対する半導体撮像装置に適応しても効果は
大きい。
Note that the gist of the present invention can be applied not only to infrared imaging devices but also to semiconductor imaging devices for visible light, and is highly effective.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係る固体撮像装置の一実施例の構成を
示す図、第2図は第1図の受光素子アレイ部の構成を説
明する図である。 10・・・受光素子アレイ、11・・・信号蓄積領域、
12・・・時間遅延積分器、13・・・入力ゲート、1
4・・・出力検出部、15・・・時系列信号出力CCD
、16,17…信号出力端子、19…入力信号処理部、
20・・・多元半導体基板、21・・・インジウムパッ
ド、22…インジウム半田、23…インジウムパツド。 図糠 第2図
FIG. 1 is a diagram showing the configuration of an embodiment of the solid-state imaging device according to the present invention, and FIG. 2 is a diagram illustrating the configuration of the light-receiving element array section of FIG. 1. 10... Light receiving element array, 11... Signal accumulation region,
12... Time delay integrator, 13... Input gate, 1
4... Output detection unit, 15... Time series signal output CCD
, 16, 17...signal output terminal, 19...input signal processing section,
20...Multiple semiconductor substrate, 21...Indium pad, 22...Indium solder, 23...Indium pad. Diagram 2

Claims (1)

【特許請求の範囲】[Claims] 1 光学走査方向と直交する方向を行方向として行列状
に配列した受光素るアレイと、前記光学走査方向と平行
な各列の光学信号をそれぞれ時間遅延積分するCCDと
、前記各列ごとの信号を積分したCCD出力を入力し、
行方向の時系列信号として出力するCCDを有し、前記
光学走査方向と平行な各列の受光素子と時間遅延積分C
CDとを結ぶ接続線を受光素子アレイの列方向の両側に
交互に導出するとともに、該導出線に対応して前記時間
遅延積分CCDを配設し、かつ交互の列に対応した各時
間遅延積分CCDの出力を2系統の時系列信号出力用C
CDにそれぞれ接続するようにしたことを特徴とする固
体撮像装置。
1. An array of light receiving elements arranged in a matrix with the row direction perpendicular to the optical scanning direction, a CCD that performs time delay integration of optical signals in each column parallel to the optical scanning direction, and a signal for each column. Input the integrated CCD output,
It has a CCD that outputs a time series signal in the row direction, and includes light receiving elements in each column parallel to the optical scanning direction and a time delay integral C.
Connection lines connecting the CDs are alternately led out on both sides of the light receiving element array in the column direction, and the time delay integration CCDs are arranged corresponding to the lead-out lines, and each time delay integration CCD corresponding to the alternate columns is provided. C for outputting CCD output as two time series signals
A solid-state imaging device characterized in that it is connected to a CD.
JP54155855A 1979-11-30 1979-11-30 solid state imaging device Expired JPS6028190B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54155855A JPS6028190B2 (en) 1979-11-30 1979-11-30 solid state imaging device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54155855A JPS6028190B2 (en) 1979-11-30 1979-11-30 solid state imaging device

Publications (2)

Publication Number Publication Date
JPS5679582A JPS5679582A (en) 1981-06-30
JPS6028190B2 true JPS6028190B2 (en) 1985-07-03

Family

ID=15614963

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54155855A Expired JPS6028190B2 (en) 1979-11-30 1979-11-30 solid state imaging device

Country Status (1)

Country Link
JP (1) JPS6028190B2 (en)

Also Published As

Publication number Publication date
JPS5679582A (en) 1981-06-30

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