JPS6027903A - Control device - Google Patents
Control deviceInfo
- Publication number
- JPS6027903A JPS6027903A JP13723083A JP13723083A JPS6027903A JP S6027903 A JPS6027903 A JP S6027903A JP 13723083 A JP13723083 A JP 13723083A JP 13723083 A JP13723083 A JP 13723083A JP S6027903 A JPS6027903 A JP S6027903A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- output
- analog
- digital
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000001105 regulatory effect Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 240000006829 Ficus sundaica Species 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000001276 controlling effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
- 230000002123 temporal effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B11/00—Automatic controllers
- G05B11/01—Automatic controllers electric
- G05B11/36—Automatic controllers electric with provision for obtaining particular characteristics, e.g. proportional, integral, differential
- G05B11/42—Automatic controllers electric with provision for obtaining particular characteristics, e.g. proportional, integral, differential for obtaining a characteristic which is both proportional and time-dependent, e.g. P. I., P. I. D.
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Automation & Control Theory (AREA)
- Feedback Control In General (AREA)
Abstract
Description
【発明の詳細な説明】
(1)発明の分野
この発明は、温度、圧力等のプロセス量の調節・制御を
行う調節装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION (1) Field of the Invention The present invention relates to a regulating device for regulating and controlling process variables such as temperature and pressure.
(2)従来技術
近年、マイクロコンピュータ等を用いたデジタル調節計
が提案されでいるが、一定時間ごとに信号を取り込す調
節演算を行って出力するサンプリング制御であるため、
高速応答が困難で、用途により安定した制御は難しい欠
点が生じている。(2) Prior art In recent years, digital controllers using microcomputers have been proposed, but because they are sampling controls that take in signals at regular intervals, perform adjustment calculations, and output the results,
The drawback is that high-speed response is difficult, and stable control is difficult depending on the application.
ログの両方の長所を生かしたハイブリッドの調節装置を
提供するごとである。The aim is to provide a hybrid adjustment device that takes advantage of the advantages of both types of logs.
(4ン発明の実施例
第1図は、この発明の一実施例を示す構成説明図である
。(Embodiment 4 of the Invention FIG. 1 is an explanatory diagram of the configuration of an embodiment of the invention.
図において、■は入力信号eiと設定信号e−と比較し
偏差信号を発生する入力回路、2は入力回路会の出力に
応じてPID演算等を行う調節回路。In the figure, ``■'' is an input circuit that compares the input signal ei with the setting signal e- and generates a deviation signal, and 2 is an adjustment circuit that performs PID calculation etc. in accordance with the output of the input circuit board.
3は調節回路2の出方に応じて操作出力eoを発生する
出力回路で、これら入力回路1.調節回路2゜出力回路
3は、演算増幅器等のアナログ素子を含みアナログ演算
回路Aを構成している、そして。3 is an output circuit that generates an operation output eo according to the output of the adjustment circuit 2, and these input circuits 1. The adjustment circuit 2゜output circuit 3 includes analog elements such as operational amplifiers and constitutes an analog calculation circuit A.
入力回路1のゲイン、目盛定数、調節回路2のPII)
定数、出力回路30出方泄等の各種パラメータは、A−
D変換器41.L)−A変換器42を介し。gain of input circuit 1, scale constant, PII of adjustment circuit 2)
Various parameters such as constants, output circuit 30 output, etc. are A-
D converter 41. L)-A via converter 42.
マイクロコンピータ等を含むデジタル演算回路5により
決定され、各入力回路1.調節回路2゜出力回路3は所
定の演算を行い最適な制御が行ゎれるようになっている
。Each input circuit 1. The adjustment circuit 2 and the output circuit 3 perform predetermined calculations to perform optimal control.
つまり、デジタル演算回路5は、入力回路1゜調節回路
2.出力回路3の情報をA−D変換器41を介して人力
される他、外部の設定器6よりも入力され、IJ−A変
換器42を介してアナログ演算回路Aの各種パラメータ
の決定書制御を行う。この場合のA−D変換器41.1
)−A変換器42は、必要とする信号領域について変換
すればよいので、ビットが少なく、安価で済む。なお設
定信号esとしてスイッチSを切換えでマニアル設定電
圧Vsを用いでもよいっ
第2図は、入力回路1とデジタル演算回路5の接続の一
例を示し、設定信号esは、A−D変換器41によりデ
ジタル信号とされ表示器61に設定値としで表示される
とともにデジタル演算回路5に入力され、入力回路1の
偏差出力は少ピットのA−D変換器41′を介してデジ
タル演算回路5に入力され、加算器62により設定信号
と加算され表示器61′により入力値として表示される
。なお、入力回路1は微分先行形PID制御の場合、1
)演算をしてから偏差をとるようにされ、その他種々の
変形が考えられる。In other words, the digital arithmetic circuit 5 includes the input circuit 1, the adjustment circuit 2. In addition to inputting information from the output circuit 3 manually via the A-D converter 41, it is also input from an external setting device 6, and is used to control various parameters of the analog calculation circuit A via the IJ-A converter 42. I do. A-D converter 41.1 in this case
)-A converter 42 only needs to convert the required signal region, so it requires fewer bits and is inexpensive. Note that the manual setting voltage Vs may be used as the setting signal es by switching the switch S. FIG. 2 shows an example of the connection between the input circuit 1 and the digital arithmetic circuit 5. The deviation output of the input circuit 1 is converted into a digital signal and displayed as a set value on the display 61 and input to the digital arithmetic circuit 5. The value is inputted, added to the setting signal by the adder 62, and displayed as an input value by the display 61'. Note that the input circuit 1 is 1 in the case of differential-preceding PID control.
), and then calculate the deviation, and various other modifications are possible.
第3図は、調節回路2とデジタル演算回路の接続の一例
を示し、演算増幅器UPの入力回路にFET、抵抗R2
帰還回路にコンデンサCが接続されて積分回路とされた
調節回路2は、デジタル演算回路5からL)−A変換器
42を介し、FETのオン抵抗を制御寺し、積分時間等
を変更するようになっている。FIG. 3 shows an example of the connection between the adjustment circuit 2 and the digital arithmetic circuit, with an FET and a resistor R2 in the input circuit of the operational amplifier UP.
The adjustment circuit 2, which is configured as an integrating circuit by connecting a capacitor C to the feedback circuit, controls the on-resistance of the FET and changes the integration time etc. from the digital arithmetic circuit 5 via the L)-A converter 42. It has become.
このように、調節演算等は、すべでアナログなので高速
応答が可能で、パラメータ設定はデジタルなので任意、
高精度設定が可能である。In this way, adjustment calculations, etc. are all analog, so high-speed response is possible, and parameter settings are digital, so they can be set arbitrarily.
High precision settings are possible.
(5)発明の要約
以上述べたように、この発明は、入力信号と設定信号に
基き調節演算を行い出力信号を発生するアナログ演算回
路と、このアナログ演算回路の各種パンメータの決定を
行うデジタル演算回路とを備えた調節装置である。(5) Summary of the Invention As described above, the present invention provides an analog calculation circuit that performs adjustment calculations based on input signals and setting signals and generates output signals, and a digital calculation circuit that determines various pan meters of this analog calculation circuit. A regulating device comprising a circuit.
(6)発明の効果 調節演算は常にアナログ演算で行っているので。(6) Effect of invention Adjustment calculations are always performed using analog calculations.
時間的、量的な分解−能が高く、ムダ時間が少なく高速
応答で、高精度、安定した制御が可能であり。It has high temporal and quantitative resolution, low wasted time, fast response, and enables highly accurate and stable control.
また、パラメータ設定はデジタル演算で行っているので
多変数にわたるような複雑な演算が容易で。In addition, parameter settings are performed using digital calculations, making complex calculations involving multiple variables easy.
適切、任意のパラメータ設定が可能となる。Appropriate and arbitrary parameter settings can be made.
第1図、第2図、第3図は、この発明の一実施例を示す
構成説明図である。
l・・・入力回路、2・・・調節回路、3・・・出力回
路。
5・・デジタル演算回路、A・・・アナログ演算回路特
許出願人 株式会社 千野製作所FIG. 1, FIG. 2, and FIG. 3 are configuration explanatory diagrams showing one embodiment of the present invention. l...input circuit, 2...adjustment circuit, 3...output circuit. 5...Digital arithmetic circuit, A...Analog arithmetic circuit Patent applicant Chino Seisakusho Co., Ltd.
Claims (1)
号を発生するアナログ演算回路と、このア、フ ナログ演算回路の各種ハ久メータの決定を行うデジタル
演算回路とを備えたことを特徴とする調節装置。[Claims] 1. An analog calculation circuit that performs adjustment calculations based on input signals and setting signals and generates output signals, and (a) a digital calculation circuit that determines various parameters of the FNA log calculation circuit. An adjustment device characterized by comprising:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13723083A JPS6027903A (en) | 1983-07-27 | 1983-07-27 | Control device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13723083A JPS6027903A (en) | 1983-07-27 | 1983-07-27 | Control device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6027903A true JPS6027903A (en) | 1985-02-13 |
Family
ID=15193818
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13723083A Pending JPS6027903A (en) | 1983-07-27 | 1983-07-27 | Control device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6027903A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63120045U (en) * | 1987-01-29 | 1988-08-03 | ||
US5383124A (en) * | 1989-05-20 | 1995-01-17 | Robert Bosch Gmbh | Process for undercarriage regulation |
KR100985961B1 (en) * | 2008-05-26 | 2010-10-06 | 엘에스산전 주식회사 | Module and Method for controlling temperature |
-
1983
- 1983-07-27 JP JP13723083A patent/JPS6027903A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63120045U (en) * | 1987-01-29 | 1988-08-03 | ||
JPH0422169Y2 (en) * | 1987-01-29 | 1992-05-20 | ||
US5383124A (en) * | 1989-05-20 | 1995-01-17 | Robert Bosch Gmbh | Process for undercarriage regulation |
KR100985961B1 (en) * | 2008-05-26 | 2010-10-06 | 엘에스산전 주식회사 | Module and Method for controlling temperature |
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