JPS6026327B2 - Slope signal generation circuit - Google Patents

Slope signal generation circuit

Info

Publication number
JPS6026327B2
JPS6026327B2 JP6217179A JP6217179A JPS6026327B2 JP S6026327 B2 JPS6026327 B2 JP S6026327B2 JP 6217179 A JP6217179 A JP 6217179A JP 6217179 A JP6217179 A JP 6217179A JP S6026327 B2 JPS6026327 B2 JP S6026327B2
Authority
JP
Japan
Prior art keywords
capacitors
current source
capacitor
output
signal generation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP6217179A
Other languages
Japanese (ja)
Other versions
JPS55154817A (en
Inventor
清隆 岡田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tektronix Japan Ltd
Original Assignee
Sony Tektronix Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Tektronix Corp filed Critical Sony Tektronix Corp
Priority to JP6217179A priority Critical patent/JPS6026327B2/en
Publication of JPS55154817A publication Critical patent/JPS55154817A/en
Publication of JPS6026327B2 publication Critical patent/JPS6026327B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K4/00Generating pulses having essentially a finite slope or stepped portions
    • H03K4/06Generating pulses having essentially a finite slope or stepped portions having triangular shape
    • H03K4/08Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape
    • H03K4/48Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices
    • H03K4/50Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices in which a sawtooth voltage is produced across a capacitor

Landscapes

  • Magnetic Resonance Imaging Apparatus (AREA)
  • Amplifiers (AREA)

Description

【発明の詳細な説明】 本発明は傾斜信号発生回路、特に異なる極性の優斜信号
を発生し得る回路に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a slope signal generating circuit, and more particularly to a circuit capable of generating dominant slope signals of different polarities.

オシロスコープの水平掃引回路、テレビジョンの走査回
路、関数発生器等においては時間に対して振幅が直線状
に変化する煩斜信号が必要である。
Horizontal sweep circuits for oscilloscopes, scanning circuits for televisions, function generators, and the like require oblique signals whose amplitude changes linearly with time.

斯る傾斜信号の発生には、一般に電流源と充放電コンデ
ンサの組合せ、ミラー積分回路、プートストラツプ回路
を使用することは当業者には周知である。然し、斯る従
来の回路ではシングルェンデッド信号しか得られず、相
互に逆極性のプッシュプル信号を得ることはできない。
その為に、一般にはシングルェンデッド入力をプッシュ
プル出力に変換する位相変換増幅器(バラフェーズ増幅
器)を用いるが、所望振幅且つ平衡度の良好な出力を得
ることは困難である。本発明は、従来技術の上述した欠
点に鑑みなされたものであり、単簡な回路構成と少ない
回路部品を用いて、同時に又は選択的に逆極性の傾斜信
号を発生し得る新規な回路を提供するとを目的とする。
It is well known to those skilled in the art that the generation of such a ramp signal typically involves the use of a current source and charge/discharge capacitor combination, a Miller integrator circuit, or a Putstrap circuit. However, such conventional circuits can only obtain single-ended signals, and cannot obtain push-pull signals with mutually opposite polarities.
For this purpose, a phase conversion amplifier (discrete phase amplifier) that converts a single-ended input into a push-pull output is generally used, but it is difficult to obtain an output with a desired amplitude and good balance. The present invention has been made in view of the above-mentioned drawbacks of the prior art, and it is an object of the present invention to provide a novel circuit that can simultaneously or selectively generate slope signals of opposite polarity using a simple circuit configuration and a small number of circuit components. With the goal.

本発明の技術的課題、動作及び作用効果は、添付図を参
照して行なう以下の説明から容易に理解できよう。
The technical problems, operations, and effects of the present invention can be easily understood from the following description with reference to the accompanying drawings.

第1図及び第2図は、電流源とコンデンサを使用する形
式の従来の頃斜信号発生回路であって、夫々正(上昇)
極性及び負(降下)極性の傾斜信号を発生する。一端を
基準電位源(例えば接地)に接続したコンデンサ10,
10′に電流源(カレントソース11又はカレントシン
ク11′)の電流を流す。このコンデンサ10,10′
に並列接続した制御回路12,12′に入力端子13,
13′から制御信号を加えることにより、コンデンサ1
0,10′の充放電を制御する。この場合コンデンサ1
0,10′の両端電圧e。は次式で表わされる。e。
FIGS. 1 and 2 show conventional slope signal generation circuits using a current source and a capacitor, respectively.
Generate polar and negative (falling) polarity ramp signals. a capacitor 10 connected at one end to a reference potential source (e.g. ground);
A current from a current source (current source 11 or current sink 11') is passed through 10'. This capacitor 10, 10'
The input terminal 13,
By applying a control signal from 13', capacitor 1
Controls charging and discharging of 0 and 10'. In this case capacitor 1
Voltage e across 0,10'. is expressed by the following equation. e.

=4半=きtここでCはコンデンサ10,10′の容量
、1は電流源11,11′の大きさ、tはコンデンサ1
0,10′の充電時間である。
=4 and a half = tHere, C is the capacitance of capacitors 10 and 10', 1 is the size of current sources 11 and 11', and t is capacitor 1
The charging time is 0.10'.

この時間と共に線形に変化する電圧eoを緩衝増幅器、
例えばェミッタ(又はソース)フオロワ増幅器14,1
4′を介して出力端15,15′から出力信号として利
用する。
This voltage eo, which changes linearly with time, is transferred to a buffer amplifier,
For example emitter (or source) follower amplifier 14,1
It is used as an output signal from the output terminals 15, 15' via the terminal 4'.

この煩斜信号を反復発生するには、制御信号により制御
回路12,12′を作動して、コンデンサ10,10′
を反復的に充放電すればよい。以上の説明から判るよう
に、互に逆極性の煩斜信号を発生するには、少なくとも
カレントソースとカレントシンクの2つの異なる電流源
が必要であり、しかも同時に正負両極性の煩斜信号を発
生するには別個のコンデンサが必要である。
In order to repeatedly generate this disturbing signal, the control circuits 12, 12' are activated by the control signal, and the capacitors 10, 10' are
All you have to do is charge and discharge repeatedly. As can be seen from the above explanation, at least two different current sources, a current source and a current sink, are required to generate cross-slant signals with opposite polarities, and also generate cross-slope signals with both positive and negative polarities at the same time. A separate capacitor is required for this purpose.

更に、所望の煩斜の平衡した出力信号を得るには、両軍
流源11,11′を等しく可変すると共に両コンデンサ
10,10′を等しくする必要があるので実現困難であ
り、また仮え可能でも複雑高価になる。第3図は本発明
による倭斜信号発生回路の原理図である。
Furthermore, in order to obtain the desired balanced output signal, it is necessary to vary both current sources 11 and 11' equally and to make both capacitors 10 and 10' equal, which is difficult to achieve. Even if it is possible, it will be complicated and expensive. FIG. 3 is a principle diagram of a slope signal generation circuit according to the present invention.

共通電流線(カレントソース)11の電流を直列接続し
た第1コンデンサ10a及び第2コンデンサ10bに流
す。コンデンサ10bの下端を基準電位源(例えば接地
)に接続する代りに、両コンデンサ10a,10bの接
続中点Pを高入力インピーダンスの差動増幅器、即ち蓋
動型演算増幅器16の反転入力端に接続し、その非反転
入力端は基準電位源、例えば接地に接続する。コンデン
サ10bの他端を増幅器16の出力端に接続する。電流
源11とコンデンサ10aとの接続点Qには、緩衝増幅
器14を接続する。両増幅器14及び16の出力端に出
力端子15a,15bを設ける。また、コンデンサ10
a,10bと並列に制御回路12を接続して、その入力
端子13に印加する制御信号により両コンデンサ10a
,10bの充放電制御する。制御回路12のスイッチ1
2a,12bが共にオンのときは、電流源11の電流1
はスイッチ12a,12bを介して増幅器16の出力端
に流入するので、コンデンサ10a,10bの電荷はす
べて放電し、出力端子15a,15bの位は実質的に増
幅器16の非反転入力端の電位と等しい接地電位である
A current from a common current line (current source) 11 is passed through a first capacitor 10a and a second capacitor 10b connected in series. Instead of connecting the lower end of the capacitor 10b to a reference potential source (for example, ground), the midpoint P between the capacitors 10a and 10b is connected to the inverting input terminal of a high input impedance differential amplifier, that is, a lid-type operational amplifier 16. Its non-inverting input terminal is connected to a reference potential source, for example ground. The other end of capacitor 10b is connected to the output end of amplifier 16. A buffer amplifier 14 is connected to a connection point Q between the current source 11 and the capacitor 10a. Output terminals 15a and 15b are provided at the output ends of both amplifiers 14 and 16. Also, capacitor 10
A control circuit 12 is connected in parallel with capacitors 10a and 10b, and a control signal applied to its input terminal 13 controls both capacitors 10a.
, 10b. Switch 1 of control circuit 12
When both 2a and 12b are on, the current 1 of the current source 11
flows into the output terminal of the amplifier 16 via the switches 12a and 12b, so the charges in the capacitors 10a and 10b are all discharged, and the potential at the output terminals 15a and 15b is substantially the same as the potential at the non-inverting input terminal of the amplifier 16. Equal ground potential.

次に、スイッチ12a,12bが制地信号によりオフと
なると、電流源11の電流1はすべてコンデンサ10a
,1obを流れ、夫々のコンデンサの両端に下記の電圧
ew, eobが発生する。ここでC,oa,C,ob
夫々コンデンサ10a,10bの容量、tは時間、1は
電流源11の電流である。
Next, when the switches 12a and 12b are turned off by the control signal, all of the current 1 of the current source 11 is transferred to the capacitor 10a.
, 1ob, and the following voltages ew and eob are generated across the respective capacitors. Here C, oa, C, ob
t is the capacitance of the capacitors 10a and 10b, t is the time, and 1 is the current of the current source 11.

この場合に、P点の電位は接地電位であり、実質的に不
変であることに留意されたい。
Note that in this case, the potential at point P is ground potential and remains substantially unchanged.

よって、出力端子15a,10bにおける出力信号eo
a,eのは夫々第3図に示す通り、0ボルトを基準にし
て所定の煩斜で直線状に増加及び減少する傾斜信号電圧
であって、その傾斜は上式から判る通り電流源11の電
流1とコンデンサ10a,10bの容量で決まる。よっ
て、両コンデンサ10a,10bの容量を等しく選定し
ておけば、電流1の可変のみにより両信号eQ, e■
を等しく制御することができる。これら煩斜信号の最大
電圧(振幅)が、電流源11の作動電圧以下の所定レベ
ルに達すると、制御信号が入力端子13に供給されて制
御回路12のスイッチ12a,12bを閉じる。よって
、コンデンサ10a,10bの重荷は急速に放電して、
出力信号は休止レベル(0ボルト)に復帰する。尚、図
示例では、スイッチ12a,12bは簡単の為に機械的
スイッチであるがリレー、又はトランジスタ(バイポー
ラ又はユニポーラ)を用いた電子スイッチであってもよ
い。以上の説明から明らかな如く、本発明の傾斜信号発
生回路によると、単一電流源と、2個のコンデンサと、
差動増幅器とを用いることにより、一定休止レベルから
互に逆極性で変化する2出力が同時に得られ、その信号
の傾斜は電流源の電流1を制御することにより自由に制
御できる。よって互に逆犠牲の傾斜信号を必要とする多
くの用途に好適に利用し得る。尚、制御回路12のスイ
ッチ12a,12bは何ら同時に制御する必要はなく必
要に応じて時間的に遅延させ、或は交互にオン・オフ制
御することも可能である。その場合、一方の動作が他方
の動作に影響しない、即ち干渉がないので更に実用上の
効果が高い。また、電流源11はカレントソースでなく
、カレントシンクでもよいが、その場合には出力端子1
5a,15bに得られる頭斜信号電圧eoa,eobの
極性は、図示の場合と逆になることに留意されたい。次
に、本発明の煩斜信号発生回路の新規な使用例を第4図
に基づいて明する。電流源11はトランジスタ17、ェ
ミッタ抵抗器18及びべ−ス電圧調整用ポテンショメー
タ19より構成する。ポテンショメータ19の調整によ
り、電流源11の出力電流1が連続的に変化できる。緩
衝増幅器14及び差敷増幅器16の出力側にパラフェー
ズ増幅器20を接続する。この増幅器20は、任意の従
来型式の増幅器でよいが、最も簡単な例としてヱミッタ
を結合抵抗器23で結合した1対のトランジスタ21,
22、ェミッタ抵抗器24,25及びコレク夕負荷抵抗
器26,27より成る回路を図示している。増幅器20
の一般的特性としてトランジスタ21のベース入力信号
は位相反転されて出力端子15a′‘こ現われるが、ト
ランジスタ22のベース入力信号は同相(位相反転する
ことなく)出力端子15a′‘こ現われることに留意さ
れたい。よって、制御回路12bをオンのままスイッチ
12aをオフとすると、コンデンサ10aの充麗々圧が
増幅器14を介してパラフェーズ増幅器20で増幅され
、出力端子15を,15b′間に略々平衡した傾斜信号
電圧が得られる。一方、スイッチ12aをオンのままス
イッチ12bをオフとすると、コンデンサーobの充重
々圧が出力端子15a′,15b′に現われる。ここで
、上述した理由により、増幅器14,16の出力端に現
われる傾斜信号電圧は逆極性であっても出力端子15a
′,15b′の信号極性はいずれの場合でも等しいこと
に注目されたい。それ故に第4図の回路は、コンデンサ
10a,10bを異なる容量値、例えば両者の比を1:
10又は1:100とすることにより異なる倍率の額斜
信号電圧を発生させ、オシロスコープの水平偏向に使用
する場合等に用いるのに好適である。尚、ここでェミッ
タ結合抵抗器23の抵抗値を抵抗器24,25のそれに
比して充分小さくしておけば出力信号電圧の平衡度は改
善することができる。このような水平掃引回路を有する
オシロスコープは、1個の橋引回路と実質的に同じ複雑
さ及び価格で2個の掃引回路を有するオシロスコープの
機能の多くを実現することができる。必要に応じて電流
源11のェミッタ抵抗器18の抵抗値及びコンデンサ1
0a,10bの容量を複数の異なる値に切換え選択でき
ること明らかである。以上は、本発明の基本原理及び用
例について説明したものであるが、本発明は何らこれら
実施例に限定するものではなく、本発明の種々の変更変
形も本発明の技術的思想に包含されるものである。
Therefore, the output signal eo at the output terminals 15a and 10b
As shown in FIG. 3, a and e are ramp signal voltages that linearly increase and decrease at a predetermined gradient with 0 volts as a reference, and as can be seen from the above equation, the gradient signal voltage is the gradient signal voltage of the current source 11. It is determined by the current 1 and the capacitance of the capacitors 10a and 10b. Therefore, if the capacitances of both capacitors 10a and 10b are selected equally, both signals eQ and e■ can be changed only by changing the current 1.
can be equally controlled. When the maximum voltage (amplitude) of these signals reaches a predetermined level below the operating voltage of the current source 11, a control signal is supplied to the input terminal 13 to close the switches 12a, 12b of the control circuit 12. Therefore, the burden on the capacitors 10a and 10b is rapidly discharged,
The output signal returns to the rest level (0 volts). In the illustrated example, the switches 12a and 12b are mechanical switches for the sake of simplicity, but they may also be electronic switches using relays or transistors (bipolar or unipolar). As is clear from the above description, according to the slope signal generation circuit of the present invention, a single current source, two capacitors,
By using a differential amplifier, two outputs that change with opposite polarities from a constant rest level can be obtained simultaneously, and the slope of the signal can be freely controlled by controlling the current 1 of the current source. Therefore, it can be suitably used in many applications requiring mutually inverse sacrificial slope signals. It should be noted that the switches 12a and 12b of the control circuit 12 do not need to be controlled at the same time, but can be controlled with a time delay or alternately turned on and off as necessary. In this case, one operation does not affect the other operation, that is, there is no interference, so the practical effect is even higher. Further, the current source 11 may be a current sink instead of a current source, but in that case, the output terminal 1
It should be noted that the polarities of the head oblique signal voltages eoa and eob obtained at 5a and 15b are opposite to those shown in the figure. Next, a novel usage example of the oblique signal generation circuit of the present invention will be explained based on FIG. The current source 11 is composed of a transistor 17, an emitter resistor 18, and a base voltage adjusting potentiometer 19. By adjusting the potentiometer 19, the output current 1 of the current source 11 can be changed continuously. A paraphase amplifier 20 is connected to the output sides of the buffer amplifier 14 and the differential amplifier 16. This amplifier 20 may be any conventional type of amplifier, but in the simplest example it may consist of a pair of transistors 21 with emitters coupled by a coupling resistor 23;
22, emitter resistors 24, 25 and collector load resistors 26, 27. amplifier 20
Note that as a general characteristic, the base input signal of the transistor 21 is phase-inverted and appears at the output terminal 15a'', but the base input signal of the transistor 22 is in phase (without phase inversion) and appears at the output terminal 15a''. I want to be Therefore, when the switch 12a is turned off while the control circuit 12b is turned on, the full pressure of the capacitor 10a is amplified by the paraphase amplifier 20 via the amplifier 14, and the output terminal 15 has a substantially balanced slope between the output terminals 15 and 15b'. Signal voltage is obtained. On the other hand, if the switch 12b is turned off while the switch 12a remains on, the charging pressure of the capacitor ob appears at the output terminals 15a' and 15b'. Here, for the reason mentioned above, even if the slope signal voltage appearing at the output terminals of the amplifiers 14 and 16 has opposite polarity, the output terminal 15a
Note that the signal polarities of ', 15b' are the same in both cases. Therefore, in the circuit of FIG. 4, the capacitors 10a and 10b have different capacitance values, for example, a ratio of 1:1.
By setting the ratio to 1:10 or 1:100, forehead oblique signal voltages with different magnifications are generated, which is suitable for use in horizontal deflection of an oscilloscope. Incidentally, if the resistance value of the emitter-coupled resistor 23 is made sufficiently smaller than that of the resistors 24 and 25, the balance of the output signal voltage can be improved. An oscilloscope with such a horizontal sweep circuit can perform many of the functions of an oscilloscope with two sweep circuits at substantially the same complexity and cost as one bridge circuit. The resistance value of the emitter resistor 18 of the current source 11 and the capacitor 1 may be adjusted as necessary.
It is clear that the capacitances of 0a and 10b can be switched and selected from a plurality of different values. Although the basic principle and usage examples of the present invention have been explained above, the present invention is not limited to these examples in any way, and various modifications and variations of the present invention are also included in the technical idea of the present invention. It is something.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図、第2図は従来の傾斜信号発生回路、第3図本発
明の傾斜信号発生回路の基本原理を示す回路図「第4図
は本発明の額斜信号発生回路の一応用例を示す回路図で
ある。 図中、10a,10bは夫々第1及び第2コンデンサ、
11は電流源、12は制御回路、16は差動増幅器、1
4は緩衝増幅器を示す。 FIG.l FIG.2 FIG.3 FIG.ム
1 and 2 are conventional tilt signal generation circuits; FIG. 3 is a circuit diagram showing the basic principle of the tilt signal generation circuit of the present invention; and Figure 4 is a circuit diagram showing an example of the application of the forehead tilt signal generation circuit of the present invention. It is a circuit diagram. In the figure, 10a and 10b are first and second capacitors, respectively;
11 is a current source, 12 is a control circuit, 16 is a differential amplifier, 1
4 indicates a buffer amplifier. FIG. l FIG. 2 FIG. 3 FIG. Mu

Claims (1)

【特許請求の範囲】 1 電流源と、該電流源に直列接続した第1及び第2コ
ンデンサと、該両コンデンサの接続点に反転入力端を接
続し、上記第2のコンデンサの他端を出力端に接続し、
非反転入力端を所望基準電位源に接続した差動増幅器と
、上記両コンデンサに並列接続した制御回路とを具え、
上記差動増幅器の出力端及び上記電流源と上記第1コン
デンサとの接続点から出力信号を得ることを特徴とする
傾斜信号発生回路。 2 上記制御回路として夫々上記第1及び第2コンデン
サに並列接続した第1及び第2スイツチを設け、該スイ
ツチのオン・オフを同時又は異なる時間に選択的に制御
することを特徴とする特許請求の範囲第1項記載の傾斜
信号発生回路。
[Claims] 1. A current source, first and second capacitors connected in series to the current source, an inverting input end connected to a connection point between the two capacitors, and the other end of the second capacitor being output. connect to the end,
A differential amplifier having a non-inverting input terminal connected to a desired reference potential source, and a control circuit connected in parallel to both of the capacitors,
A slope signal generation circuit characterized in that an output signal is obtained from an output end of the differential amplifier and a connection point between the current source and the first capacitor. 2. A patent claim characterized in that the control circuit is provided with first and second switches connected in parallel to the first and second capacitors, respectively, and selectively controls on/off of the switches at the same time or at different times. The slope signal generation circuit according to item 1.
JP6217179A 1979-05-22 1979-05-22 Slope signal generation circuit Expired JPS6026327B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6217179A JPS6026327B2 (en) 1979-05-22 1979-05-22 Slope signal generation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6217179A JPS6026327B2 (en) 1979-05-22 1979-05-22 Slope signal generation circuit

Publications (2)

Publication Number Publication Date
JPS55154817A JPS55154817A (en) 1980-12-02
JPS6026327B2 true JPS6026327B2 (en) 1985-06-22

Family

ID=13192402

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6217179A Expired JPS6026327B2 (en) 1979-05-22 1979-05-22 Slope signal generation circuit

Country Status (1)

Country Link
JP (1) JPS6026327B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS626559U (en) * 1985-06-26 1987-01-16

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6022186A (en) * 1983-07-18 1985-02-04 株式会社河合楽器製作所 Envelope circuit for electronic musicla instrument
FR2622374A1 (en) * 1987-10-26 1989-04-28 Commissariat Energie Atomique ADJUSTABLE VOLTAGE RAMP GENERATOR
US5317199A (en) * 1992-05-01 1994-05-31 Analog Devices, Inc. Ramp generator system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS626559U (en) * 1985-06-26 1987-01-16

Also Published As

Publication number Publication date
JPS55154817A (en) 1980-12-02

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