JPS60261287A - Subscriber's circuit constituting system - Google Patents

Subscriber's circuit constituting system

Info

Publication number
JPS60261287A
JPS60261287A JP59116420A JP11642084A JPS60261287A JP S60261287 A JPS60261287 A JP S60261287A JP 59116420 A JP59116420 A JP 59116420A JP 11642084 A JP11642084 A JP 11642084A JP S60261287 A JPS60261287 A JP S60261287A
Authority
JP
Japan
Prior art keywords
circuit
voltage level
subscriber
low voltage
level circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59116420A
Other languages
Japanese (ja)
Other versions
JPH0453157B2 (en
Inventor
Shinichi Iribe
入部 眞一
Hideo Tatsuno
秀雄 龍野
Masaki Ehata
江幡 正樹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Original Assignee
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd filed Critical Hitachi Ltd
Priority to JP59116420A priority Critical patent/JPS60261287A/en
Publication of JPS60261287A publication Critical patent/JPS60261287A/en
Publication of JPH0453157B2 publication Critical patent/JPH0453157B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04MTELEPHONIC COMMUNICATION
    • H04M19/00Current supply arrangements for telephone systems
    • H04M19/001Current supply source at the exchanger providing current to substations
    • H04M19/005Feeding arrangements without the use of line transformers

Abstract

PURPOSE:To reduce the voltage of circuit elements to make a device small-sized by constituting a feedback circuit, which determines the DC feed characteristic and the AC terminal characteristic of a subscriber's circuit, with a low voltage level circuit. CONSTITUTION:A high voltage level circuit connected directly to a subscriber's line and the low voltage level circuit as the feedback circuit of the high voltage level circuit are shown in the left and the right with respect to a line AA' in the figure. In such a high voltage level circuit, voltage and current states of the subscriber's line are detected by a means 3' and are converted to a low voltage level by a means 7. The low voltage level circuit is provided with a signal transmitting circuit 4' for DC feedback having a transfer ratio GDC. A signal transmitting circuit 5' for AC feedback having a transfer ratio GAC, and a DC power source 6', and DC and AC of the low voltage level are converted to a high voltage level by a means 8. The low voltage level circuit determines the DC feed characteristic and the AC terminal characteristic of the electronic subscriber's circuit by its feedback characteristic.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は、電話又換慎の加入者回路の構成方式に関する
ものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a system for configuring a subscriber circuit for a telephone exchange.

〔発明の背景〕[Background of the invention]

従来の加入者回路は直流供給特性及び交流終層特性を決
定する帰R回路を高電圧の印加される部分で構成してい
たため1回路素子がfi!JIt圧iCなり、形状が大
きく高価になり、特性の可変制御を行なうことも難しか
った。これを図を用いて説明する。第1図は従来の加入
者回路の構成方法のグロック図の一91Iである。第1
図において、1は加入者−の負荷抵抗、2は電圧*R変
換回路(変換比ym)ssは電圧検出回路(検出比k)
、4は直流帰還用信号伝達回l¥5(伝達比Gnc)、
”は父流帰逮用信号伝達回路(伝達比Gic ) 、6
は@ηtしゃ所用コンテンサである。
In conventional subscriber circuits, the return R circuit that determines the DC supply characteristics and AC termination characteristics was constructed from the part to which high voltage is applied, so one circuit element was fi! JIt pressure iC, the shape is large and expensive, and it is difficult to perform variable control of characteristics. This will be explained using a diagram. FIG. 1 is a block diagram 191I of a conventional method of configuring a subscriber circuit. 1st
In the figure, 1 is the load resistance of the subscriber, 2 is the voltage * R conversion circuit (conversion ratio ym), and ss is the voltage detection circuit (detection ratio k).
, 4 is a signal transmission circuit for DC feedback l\5 (transmission ratio Gnc),
” is the signal transmission circuit for father discharge arrest (transmission ratio Gic), 6
is the required condenser.

第1図において、加入者回路の等測置流抵抗zDc及び
等価交流抵抗ZAcは帰還回路の条件より次式となる。
In FIG. 1, the equal measurement current resistance zDc and the equivalent AC resistance ZAc of the subscriber circuit are expressed by the following equations based on the conditions of the feedback circuit.

ZJ)c= 1/(K−Gnc”!InL) ・・・■
”’ = ’/CK −Gic ・gtn ) 、、、
■したがって、GDc又は’JICにより、帰還特性な
決定できる。
ZJ) c= 1/(K-Gnc"!InL)...■
”' = '/CK - Gic ・gtn) ,,,
(2) Therefore, the feedback characteristic can be determined by GDc or 'JIC.

次に第2因に、従来の加入者回路の構成方法の1仇ン示
す。第2図において、1o1は加入者線の負荷抵抗、1
02 、105は電流供給用抵抗、104 、105は
電流供給用トランジスタ、106 。
Next, as a second factor, one of the methods of configuring a conventional subscriber circuit will be described. In Figure 2, 1o1 is the load resistance of the subscriber line, 1
02 and 105 are current supply resistors, 104 and 105 are current supply transistors, and 106.

107 、125はオペアンプ、ios〜+11.12
o 。
107, 125 are operational amplifiers, ios~+11.12
o.

121は抵抗、112〜118はカレントミラー回路で
丸印の人力に対して一足の比で一力を出す回路、119
 、124はトランジスタ、122は父流除去用コンデ
ンサ、125は直流バイアス用竜流源、126は直流し
ゃ鵬゛用コンテンサ、127は交流インピーダンス回路
、128は低′亀圧蒐yp、% 129は^電圧電源で
ある。
121 is a resistor, 112 to 118 are current mirror circuits that produce one force at a ratio of one foot to the human force indicated by a circle, 119
, 124 is a transistor, 122 is a capacitor for removing the pass current, 125 is a DC bias current source, 126 is a capacitor for DC bias, 127 is an AC impedance circuit, 128 is a low torque voltage, % 129 is ^ It is a voltage power supply.

第2凶において、等測置流抵抗ZDc及び等価又流抵抗
ZAcは、抵抗の埴をRに添字で示すと、R1゜、ン・
・・■ R,、= Rlo、 = R,2/?1□o= R,1
= R,R1゜2= R,o、 =&とすると。
In the second case, the equivalent positional flow resistance ZDc and the equivalent flow resistance ZAc are expressed as R1°, n.
・・■ R,, = Rlo, = R,2/? 1□o=R,1
= R, R1゜2 = R, o, =&.

〜ζ &)c:2ん・&−/ん ・・・■ Zic = 2L ” 壜” Rc/ Ra −0例と
してRi = 40kQ Rn = 9.27にGBc
 = s、”o R,。
~ζ &)c: 2n・-/n...■ Zic = 2L "Bottle" Rc/Ra -0 As an example, Ri = 40kQ Rn = 9.27 to GBc
= s,”o R,.

= 13.3A:Ωとすると。= 13.3A: Ω.

zl)c=440(Ω)・・・■ Zic = 2.ろ0 ・・・■ 第1図と対照すると、灰式のようになる。zl)c=440(Ω)...■ Zic = 2. Ro0...■ If you compare it with Figure 1, it looks like the gray type.

G、c== 1 ・・・@ G、C==五 10.0 w、2図において、GBc及びGicぞ次廻する回路で
あるカレントミラー回路115〜118及びトランジス
タ124及びコンデンサ122は゛」−べて高′岨圧レ
ベルが印加される回路にIKっている定め。
G, c== 1...@ G, C==5 10.0 w, In Figure 2, the current mirror circuits 115 to 118, the transistor 124, and the capacitor 122, which are the circuits in which GBc and Gic rotate next, are ``''- All circuits to which high pressure levels are applied must be connected to IK.

形状が大きく、耐圧条件からコスト的にも不利な条件と
7xつ℃いた。叉1%性を可変するための回路を追刀Ω
する際にも、尚耐圧の索子が必要となり、容易に実現で
きなかった。
Due to its large size and pressure resistance, it was disadvantageous in terms of cost as well. I added a circuit to change the 1% property.
Even when doing so, a pressure-resistant cable was required, which could not be easily realized.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、加入者回路の尚゛電圧レベル回路を簡
略化して、安価でかっ1%性の司変動卸が答易な加入者
回路構成方式を提供することKある。
SUMMARY OF THE INVENTION An object of the present invention is to simplify the voltage level circuit of a subscriber circuit and to provide a subscriber circuit configuration system that is inexpensive and can easily be replaced by a 1% controller.

〔発明の概要〕[Summary of the invention]

本発明は、加入者回路の直火給t!P!f性及び又流路
端特性を決定する帰還回路を低電圧レベル回路ですべて
構成するようにしたものである。
The present invention provides direct fire supply t! of subscriber circuits. P! The feedback circuit that determines the f-characteristics and the flow path end characteristics is entirely composed of low voltage level circuits.

〔発明の夾施例〕[Examples of the invention]

以下、本発明の絆aVcついて因を用いて説明する。第
3図は本発明による加入者回路構成方法の10ツク図で
ある。m13図において第1図と同一の部分は四−符号
を付してあり、2′〜6′は同−機能を実現する回路で
あるが、電圧条件が異なることを示し、7.8は電圧レ
ベル変換回路である。第6図にお匹て′電圧レベル変換
囲路7,8により分割されるAA’の触より右側はすべ
て低電圧レベルの回路で構成することか可能である。
Hereinafter, the bond aVc of the present invention will be explained using factors. FIG. 3 is a ten-step diagram of the subscriber circuit configuration method according to the present invention. In Figure m13, the same parts as in Figure 1 are marked with a 4- symbol, 2' to 6' are circuits that realize the same function, but the voltage conditions are different, and 7.8 is the voltage This is a level conversion circuit. In line with FIG. 6, it is possible to construct the entire area to the right of the point AA' divided by the voltage level converting circuits 7 and 8 with low voltage level circuits.

萬4図は本発明の第一の実Nカを示し、第2図と同一の
部分は同一符号を付してろ17,112’はカレントミ
ラーの入出力方向を変え、1113’はカレントミラー
比を10=1に変え、120’は抵抗111を乙。K変
え、カレントミラー回路115′〜iis’、トランジ
スタ124’、コンデンサ122′は耐圧条件を緩和し
てあり、!#、抗121′は務。[変え。
Figure 4 shows the first embodiment of the present invention. The same parts as in Figure 2 are given the same reference numerals. 17 and 112' change the input/output direction of the current mirror, and 1113' shows the current mirror ratio. Change to 10=1, and 120' is the resistance 111. K is changed, and the withstand voltage conditions of the current mirror circuits 115' to IIS', the transistor 124', and the capacitor 122' are relaxed. #, Anti-121' is the duty. [Change.

コンデンサ122′は10倍の値とし、13oはカレン
トミラー回路、131は低電圧11味である。第4図に
おける直流等価抵抗/Do及び電流等価抵抗ZAcは第
2図でめた値と全く同一である。そしてAA’の緘より
右1111はすべて低電圧レベルの回路で構成可能であ
る。又−R12o’及びR,、、’の憾を下げることに
よって、ダイナオックレンジか不足することを防止して
いる。
The capacitor 122' is 10 times the value, 13o is a current mirror circuit, and 131 is a low voltage circuit. The DC equivalent resistance /Do and current equivalent resistance ZAc in FIG. 4 are exactly the same as the values determined in FIG. 2. All of the circuits 1111 to the right of AA' can be configured with low voltage level circuits. Also, by lowering the resistance of -R12o' and R,,,,', it is possible to prevent the dynaoc range from running out.

次に第5図に本発明の第2の実施例を示す。Next, FIG. 5 shows a second embodiment of the present invention.

褐5図において、第2図又はm4図と1司−の部分は四
−符号を何してあり、162〜166はカレントミラー
回路、Ii 、138は′11流篭圧変換用抵抗L59
 、140は電圧電流変換抵抗、141゜142はアナ
ログ・ディジタル変換(以下A/D変換と略す。)回路
、143 、144はディジタル・アナログ変換(〃/
A変換と略す。)回路、145はティンタル演算@J#
&である。第5図におけ“る特性はA11)変換回路1
41及び142の入力V、 、 V2とD / A変換
回路145 、144の出力’m +r、の囲体により
すべて決足される。
In the brown 5 diagram, what is the symbol for the part 1 in Figure 2 or M4? 162 to 166 are current mirror circuits, Ii and 138 are '11 flow cage pressure conversion resistors L59.
, 140 is a voltage-current conversion resistor, 141° and 142 are analog-to-digital conversion (hereinafter referred to as A/D conversion) circuits, and 143 and 144 are digital-to-analog conversion (〃/
It is abbreviated as A conversion. ) circuit, 145 is tintal operation @J#
& is. The characteristics shown in Fig. 5 are A11) Conversion circuit 1
41 and 142, and the output 'm+r' of the D/A conversion circuits 145 and 144.

たとえは、第2区及び第4図と同じ特性を得るための条
件はR,、、== R1,、== R,、。= RI4
0として、稿−・への直流分を添字l)c、交流会を添
:flACで表わすと。
For example, the conditions to obtain the same characteristics as in Section 2 and Figure 4 are R,, == R1,, == R,,. = RI4
0, the DC component to the draft is expressed by the subscript l) c, and the exchange meeting is expressed by the subscript flAC.

Vs、tc =V4Ac = (Vsic +Vxic
 )−ニー!−。
Vs, tc = V4Ac = (Vsic +Vxic
) - Ni! −.

0式及び0式に%数をかければ、If電流等価抵抗び電
流等11fll抵抗を比例的に変更することは容易であ
る。
By multiplying the 0 formula and the 0 formula by a percentage, it is easy to proportionally change the If current equivalent resistance and the 11fll resistance such as the current.

又。or.

抗を従来の半分の1100.アース側の等測置流抵抗を
従来の1.5倍の3500に別々に設定することもでき
る。
The resistance is 1100. It is also possible to separately set the isometric stationary current resistance on the ground side to 3500, which is 1.5 times the conventional value.

以上の説明では?X鼻をディンタル処理するごととした
が、アナログ処理も可能なことは言う筐でもない。
With the above explanation? Although I said that the X-nose was treated with digital processing, there is no need to say that analog processing is also possible.

又1本発明を力1人者回路と同僚な機能をもつトランク
回路に通用できることも明白である。
It is also clear that the present invention can be applied to trunk circuits having the same functions as single-person circuits.

〔発明の効来〕[Efficacy of invention]

本発明によれは、カロ入省回路の高電圧レベル回路を簡
略化して、安1jffJな加入者回路を実現することか
でき1%性を可変にするための回路も低電圧レベル回路
で構成できる。さらにディジタル処理を用いることによ
り、一層、特性の可変制飾が容易にできる効果がある。
According to the present invention, it is possible to realize a low-cost subscriber circuit by simplifying the high-voltage level circuit of the calorie input-saving circuit, and the circuit for making the 1% property variable can also be configured with a low-voltage level circuit. . Furthermore, by using digital processing, there is an effect that variable decoration of characteristics can be made even more easily.

【図面の簡単な説明】[Brief explanation of drawings]

第1丙は、従来の加入8回路の構成方法 のブロック丙
、第2図は従来の加入者回路の構成方法の1例を示す回
路図、褐3図は本発明による加入者回路の構成方法のブ
ロック図、論4図は本発明による第1の実施例を示す回
路図、第5図は本発明による兜2の実施例を示す回路図
である。 1・・・加入省憩の負荷抵抗 、2・・・電圧電流変換回路 6・・・′亀圧侠出回路 4・・・直流帰還用1a号伝達回路 5・・・交流婦適用信号伝達回路 6゛・・l!流しや防用コンテンサ 101・・・加入′4#の負荷抵抗 io2.io5・・・電流供給用抵抗 i04,105・・・電流供給用トランジスタ106.
107,123・・・オペアンプ108〜111.12
0,121 用抵抗112〜118・・・カレントミラ
ー回路119.124・・・トランジスタ 122・・・電流除去用コンテンサ 125・・・直流バイアス用11L流偉126・・・m
Rしゃ11.lT用コンテンサ12ン・・・電流インピ
ーダンス回路 128・・・低寛圧電碑 129・・・高電圧IIL源 160・・・カレントミラー回路 161・・・低電圧電源 152〜136・・・カレントミラー回路137,13
8・・・電流電圧変俟用抵抗169.140・・・電圧
電流変換砥抗141.142川A/D変換回路 143.144・・・D/A変換回路 145・・・ティジタル演算回路 代理人弁理士 尚 Mk ゆ 車 1 図 翠 2 図 第 3 図
1C is block C of the conventional method for configuring 8 subscriber circuits, FIG. 2 is a circuit diagram showing an example of a conventional method for configuring a subscriber circuit, and 3rd figure in brown is a method for configuring a subscriber circuit according to the present invention. FIG. 4 is a circuit diagram showing a first embodiment of the present invention, and FIG. 5 is a circuit diagram showing an embodiment of the helmet 2 according to the present invention. 1...Load resistance for addition/reduction, 2...Voltage/current conversion circuit 6...'torque pressure output circuit 4...No. 1a transmission circuit for DC feedback 5...AC signal transmission circuit 6゛...l! Sink and protective capacitor 101...Load resistance io2 of addition '4#. io5...Resistor for current supply i04,105...Transistor for current supply 106.
107,123... operational amplifier 108~111.12
0,121 Resistors 112 to 118...Current mirror circuit 119.124...Transistor 122...Capacitor for current removal 125...11L flow resistance for DC bias 126...m
Rsha11. LT capacitor 12...Current impedance circuit 128...Low tolerance voltage monument 129...High voltage IIL source 160...Current mirror circuit 161...Low voltage power supply 152-136...Current mirror circuit 137,13
8... Resistor for current/voltage variation 169.140... Voltage/current conversion resistor 141.142 A/D conversion circuit 143.144... D/A conversion circuit 145... Digital calculation circuit agent Patent Attorney Sho Mk Yuguruma 1 Zusui 2 Figure 3

Claims (1)

【特許請求の範囲】 (1) 加入者勝路を介して端末に直流電流を供給する
手段と、該端末との間で、交流信号の送受信を行rx、
 5手段とを有する電子化加入者回路において、加入者
線に直接接続される高電圧レベル回路と、該高圧レベル
回路の帰還回路である低電圧レベル回路を具備し、該高
電圧レベル回路は加入省勝の亀圧蒐流状態を検出し、低
電圧レベルへ変換する機能と低電圧レベルの直流及び交
流を錫篭圧レベルへ変換して加入者線を駆動する機能を
有し、該低電圧レベル回路は該電子化加入者回路の直流
供給特性及び交流終端特性を決定する帰還特性を有する
ことを特徴とする加入者回路構成方式。 (2) 前記高電圧レベル回路は加入者線の両煉別々の
電圧電流信号を前記低電圧レベル回路へ伝迫するととも
に、前記低電圧レベル回路からの両巌別々の駆動信号を
加入者勝へ伝達する機能を有し、前記低電圧レベル回路
は両腕する特許請求の範囲第(1)項記載の加入者回路
構成方式。 (6) 前記低電圧レベル回路の入力側にアナログ。 テイジタル変侠回路を設け、出力側にテイジタル、アナ
ログ変撲回路を設けることにより。 帰還特性をテイジタル信号により演其又は制御可能とす
ることを特徴とする特許請求の範囲第(1)項または第
(2)項いずれかに記載の加入者回路構成方式。
[Scope of Claims] (1) Means for transmitting and receiving AC signals between the terminal and the means for supplying DC current to the terminal via the subscriber route.
The electronic subscriber circuit has a high voltage level circuit directly connected to the subscriber line, and a low voltage level circuit which is a feedback circuit of the high voltage level circuit, and the high voltage level circuit is connected to the subscriber line. It has the function of detecting the state of high voltage and converting it to a low voltage level, and the function of converting the low voltage level of direct current and alternating current to the tin cage pressure level to drive the subscriber line, and the low voltage A subscriber circuit configuration system characterized in that the level circuit has feedback characteristics that determine the DC supply characteristics and AC termination characteristics of the electronic subscriber circuit. (2) The high voltage level circuit transmits separate voltage and current signals for both sides of the subscriber line to the low voltage level circuit, and also transmits separate drive signals for both sides from the low voltage level circuit to the subscriber line. 2. The subscriber circuit configuration system according to claim 1, wherein the low voltage level circuit has a transmitting function, and the low voltage level circuit has both arms. (6) Analog on the input side of the low voltage level circuit. By providing a digital transformation circuit and a digital and analog transformation circuit on the output side. A subscriber circuit configuration system according to claim 1 or claim 2, wherein the feedback characteristic can be calculated or controlled by a digital signal.
JP59116420A 1984-06-08 1984-06-08 Subscriber's circuit constituting system Granted JPS60261287A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59116420A JPS60261287A (en) 1984-06-08 1984-06-08 Subscriber's circuit constituting system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59116420A JPS60261287A (en) 1984-06-08 1984-06-08 Subscriber's circuit constituting system

Publications (2)

Publication Number Publication Date
JPS60261287A true JPS60261287A (en) 1985-12-24
JPH0453157B2 JPH0453157B2 (en) 1992-08-25

Family

ID=14686638

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59116420A Granted JPS60261287A (en) 1984-06-08 1984-06-08 Subscriber's circuit constituting system

Country Status (1)

Country Link
JP (1) JPS60261287A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5912638A (en) * 1982-07-13 1984-01-23 Nippon Telegr & Teleph Corp <Ntt> Impedance synthesis type line circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5912638A (en) * 1982-07-13 1984-01-23 Nippon Telegr & Teleph Corp <Ntt> Impedance synthesis type line circuit

Also Published As

Publication number Publication date
JPH0453157B2 (en) 1992-08-25

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