JPS60260281A - Color television receiver - Google Patents

Color television receiver

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Publication number
JPS60260281A
JPS60260281A JP11727084A JP11727084A JPS60260281A JP S60260281 A JPS60260281 A JP S60260281A JP 11727084 A JP11727084 A JP 11727084A JP 11727084 A JP11727084 A JP 11727084A JP S60260281 A JPS60260281 A JP S60260281A
Authority
JP
Japan
Prior art keywords
circuit
signal
output
color signal
pal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11727084A
Other languages
Japanese (ja)
Other versions
JPH0544875B2 (en
Inventor
Toshiichi Okamoto
岡本 敏一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP11727084A priority Critical patent/JPS60260281A/en
Publication of JPS60260281A publication Critical patent/JPS60260281A/en
Publication of JPH0544875B2 publication Critical patent/JPH0544875B2/ja
Granted legal-status Critical Current

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  • Color Television Systems (AREA)

Abstract

PURPOSE:To simplify an externally mounted circuit to an IC by providing a switching circuit turning on an output transistor (TR) of a PAL/NTSC chrominance carrier signal and an output TR of an SECAM chrominance carrier signal only at the reception of PAL and SECAM signal. CONSTITUTION:The switching circuit 15 turning on the output TR1 of the PAL and SECAM chrominance carrier signal only at the reception of PAL is provided in an IC1 for processing PAL/NTSC colors. Moreover, the switching circuit 17 turning on the output TR2 for the SECAM chrominance carrier signal only at the reception of SECAM is provided in an IC5 for processing the SECAM color signal. Then a 1H delay circuit 12 is connected between an output terminal connected in common with the TR1, TR2 and each input terminal of the IC1 and IC5, and an output of color demodulation circuits 3, 4 and color demodulation circuits 9, 10 is extracted selectively.

Description

【発明の詳細な説明】 (イ)産業上の利用分野 本発明はPAL信号とNT8C信号とSFICAM信号
が受信可能表カラーテレビジョン受像機に関する。
DETAILED DESCRIPTION OF THE INVENTION (A) Field of Industrial Application The present invention relates to a color television receiver capable of receiving PAL signals, NT8C signals, and SFICAM signals.

(ロ)従来技術 序述の如きテレビジョン受像機用のカラー信号処理部と
して、第3図に示す如き回路構成を本出願人は先に実願
昭59−3972号で提案した。
(B) Prior Art As a color signal processing unit for a television receiver as described in the introduction, the present applicant previously proposed a circuit configuration as shown in FIG. 3 in Utility Model Application No. 59-3972.

即ち、第3図に於いて、[11はPATJ/NTSCカ
ラー信号処理用の第11C(三菱電機株式会社製のM5
1385P等)であり、PAL及びWT日Cの搬送色信
号(PAL : 4,43MHz、NTS C:3.5
8MH2)の増幅用の帯域増幅回路(2)、B−Y、R
−Y各復隅回路f31f41の他に、それらに付随する
Arc%ACC,カラーキラー回路やPAL用のより回
路、PALスイッチ回路等を備えている。(5)はSP
CAMカラー信号処理用の第2IC(三菱電機株式会社
製のM51398P等)であり、SICAM搬送色信号
の増幅用のリミッタ増幅回路(6)、該増幅回路から直
接路(Ll)を介して与えられる非遅延の搬送色信号と
端子(T7)を介して外部から入力される搬送色信号を
二つの出力路(I、z)(Ls)にIH(1水平期間)
毎に振り゛分けて導出するEllllICAMスイッチ
回路(7)、このスイッチ回路の切換動作を水平パルス
(HP)及びより信号(より)を得て制御するスイッチ
制御回路(8)、BY、R−Y各復調回路(9)flo
l等を備えてい為。
That is, in FIG. 3, [11 is the 11C (M5 made by Mitsubishi Electric Corporation)
1385P, etc.), and the carrier color signal of PAL and WT day C (PAL: 4.43MHz, NTS C: 3.5
8MH2) band amplification circuit (2), B-Y, R
-Y In addition to each corner circuit f31f41, it is provided with an Arc % ACC, a color killer circuit, a PAL twisting circuit, a PAL switch circuit, etc. attached thereto. (5) is SP
A second IC (M51398P manufactured by Mitsubishi Electric Corporation, etc.) for CAM color signal processing, and a limiter amplifier circuit (6) for amplifying the SICAM carrier color signal, which is provided via a direct path (Ll) from the amplifier circuit. A non-delayed carrier color signal and a carrier color signal input from the outside via the terminal (T7) are transferred to two output paths (I, z) (Ls) for IH (one horizontal period).
EllICAM switch circuit (7) that distributes and derives signals for each, a switch control circuit (8) that controls the switching operation of this switch circuit by obtaining a horizontal pulse (HP) and a signal (from), BY, R-Y Each demodulation circuit (9) flo
Because it is equipped with l, etc.

一方、(o)ハP A L信号、NTSG信号、smc
AM信号の各受信に応じて搬送色信号に対する信号路の
切換を行なう信号路選択回路であり、次のように構成さ
れている。即ち、前記第11C(υの端子(T1)に導
出された搬送色信号が結合コンデンサ(C1)を介して
入力される常時能動状態のバッファトランジスタ(TR
\そのエミッタに現われるPAL搬送色信号と第2IC
+51)端子(T6)K j導出されるSFCAM搬送
色信号を選択的に切換えて出力するためのスイッチング
ダイオード(Dl)(Dり% その各搬送色信号が結合
コンデンサ(C2)を通りインピーダンス整合用の抵抗
(R1)とコイル(LC) Kよって入力されるIH遅
延線01J、この遅延線を通った搬送色信号と前記トラ
ンジスタ(TR)のエミッタ側の分圧中点(A)から結
合コンデンサ(C3)を介して与えられる搬送色信号の
加減算を行なってB−Y搬送色信号とR−Y搬送色信号
に撮り分けるトランスLl、及びその各信号を第11C
(1)内の・カラー復調回路+31+41に導く線路(
Ls)(R4)、及び前記遅延線Q2を通った搬送色信
号を第2IC(5)の端子(T7 ’)K、導く結合コ
ンデンサ(C4)等を備えている。
On the other hand, (o) PAL signal, NTSG signal, smc
This is a signal path selection circuit that switches a signal path for a carrier color signal in response to each reception of an AM signal, and is configured as follows. That is, the buffer transistor (TR
\PAL carrier color signal appearing on its emitter and second IC
+51) Terminal (T6) K j Switching diode (Dl) for selectively switching and outputting derived SFCAM carrier color signals (D%) Each carrier color signal passes through a coupling capacitor (C2) for impedance matching. resistor (R1) and coil (LC) K, the IH delay line 01J is inputted, the carrier color signal passing through this delay line and the coupling capacitor ( A transformer Ll performs addition/subtraction of the carrier color signal given through C3) and separates it into a B-Y carrier color signal and a R-Y carrier color signal, and each of the signals is transferred to the 11th C
Line leading to color demodulation circuit +31+41 in (1) (
Ls) (R4), and a coupling capacitor (C4) for guiding the carrier color signal that has passed through the delay line Q2 to the terminal (T7')K of the second IC (5).

また、04は前記各復調回路+31+4)又は191f
lO)から出力されるB−Y信号及びR−Y信号をカラ
ーマトリックス回路に導くための切換回路であり、この
切換回路は前述の工C:M51398FではIC内に内
蔵されているが、ここでは便宜上外付は回路として示し
ている。
In addition, 04 is each demodulation circuit +31+4) or 191f
This is a switching circuit for guiding the B-Y signal and R-Y signal output from the IO) to the color matrix circuit, and this switching circuit is built into the IC in the aforementioned C:M51398F, but here it is For convenience, external components are shown as circuits.

なお、第11C(1)内の帯域増幅回路12)のPAL
受信時とNTBC受信時での通過帯域の切換は、外付け
の同調回路の定数を切換えることによって行なわれる。
In addition, the PAL of the band amplification circuit 12) in No. 11C(1)
Switching of the passband between reception and NTBC reception is performed by switching constants of an external tuning circuit.

また、このIC内の復調回路1B+[41に与える副搬
送波信号の同波数切換は外付けの水晶振動子の切換によ
って行なわれる。更に、NTSC受信時°にけ、このI
C内のPALスイッチ回路の切換動作を停止せしめてN
TSC用の一定位相の副搬送波信号が上記復調回路+3
041に与えられるように力っている。斯る第1IC(
1)内の構成は既に公知であるから、これ以上の説明は
省略する。
Further, switching of the same wave number of the subcarrier signal applied to the demodulation circuit 1B+[41 in this IC is performed by switching an external crystal oscillator. Furthermore, when receiving NTSC, this I
Stop the switching operation of the PAL switch circuit in C and
The constant phase subcarrier signal for TSC is sent to the above demodulation circuit +3
I am trying to give it to 041. Such 1st IC (
Since the configuration in 1) is already known, further explanation will be omitted.

さて、この第3図の回路忙於いて、第1切換端子(Pl
)にはPAL受信時のみハイレベル(ロ)の電圧が印加
され、その他の受信時はローレベルの)の電圧が印加さ
れ、他方、第2切換端子(P2)には逆にPAL受信時
にLレベルが印加され、そめ他の受信時にHレベルが印
加される。従って、PAL受信時にはダイオード(Ds
)(Ds)がオンし、ダイオード(D2)がオフとなり
、これによって第1工C11)の端子(T1)から出力
されたPALの搬送色信号は一方ではトランジスタ(T
R)のエミッタ→ダイオード(Dl)→コンデンサ(C
2)→IR遅延線(lηの経路を通ってトランス(1鴫
の1次側に印加され、他方では上記トランジスタ(TR
)→A点→コンデンサ(C6)の経路を通って上記トラ
ンス(1濁の2次側の中間タップに印加されるので、上
記2次側でIH遅延と非遅延の各PAL搬送色信号が加
減算され、その結果、線路(Us)にB−Y搬送色信号
が、線路(LJ )にR−Y搬送色信号が夫々振り分け
られる。その際、ダイオード(D3)がオンとかつてい
るので、搬送色信号に対する可変抵抗(VR)の抵抗値
が等価的に小さくなって、トランス(11の2次側の中
間タップに与えられる非遅延の信号が、1次側から降圧
されて2次側に現われるIH遅延の信号と略同じ大きさ
に調整されるようになっている。
Now, while the circuit in Figure 3 is busy, the first switching terminal (Pl
) is applied with a high level (B) voltage only during PAL reception, and a low level () voltage is applied during other receptions.On the other hand, conversely, a low level (B) voltage is applied to the second switching terminal (P2) during PAL reception. A high level is applied, and an H level is applied during other receptions. Therefore, when receiving PAL, a diode (Ds
) (Ds) is turned on and the diode (D2) is turned off, so that the PAL carrier color signal output from the terminal (T1) of the first section C11) is on the one hand connected to the transistor (T
R) emitter → diode (Dl) → capacitor (C
2)→IR delay line (lη) is applied to the primary side of the transformer (1), and on the other hand, the above transistor (TR
) → Point A → The capacitor (C6) is applied to the intermediate tap on the secondary side of the transformer (1 turbidity), so the IH delayed and non-delayed PAL carrier color signals are added and subtracted on the secondary side. As a result, the B-Y carrier color signal is distributed to the line (Us) and the R-Y carrier color signal is distributed to the line (LJ).At this time, since the diode (D3) is on, the carrier color signal is distributed to the line (Us) and the R-Y carrier color signal to the line (LJ). The resistance value of the variable resistor (VR) with respect to the signal becomes equivalently small, and the non-delayed signal applied to the intermediate tap on the secondary side of the transformer (11) is stepped down from the primary side and appears on the secondary side. The signal is adjusted to approximately the same magnitude as the delayed signal.

また、N’l’SC受信時はダイオード(Dl)(Ds
)がオフに匁るので、前記A点に現われるNT8C搬送
色信号がコンデンサ(C3)の経路のみを通ってトラン
ス(1騰の2次側中間タップ忙与えられ、ここから線路
(:t、n)(Ls)の各々に等しく導出されることに
なる。その際、ダイオード(Ds)のオフにより可変抵
抗(VR)の抵抗値が等価的に大きくなって、A点の信
号がPAL受信時の略2倍の太きさに調整され、これに
より線路(LJ )(ILs )にPムL受信時と略同
じ大きさの搬送色信号を導出できるようになっている。
Also, when receiving N'l'SC, the diode (Dl) (Ds
) turns off, the NT8C carrier color signal appearing at the point A passes only through the path of the capacitor (C3) and is applied to the intermediate tap on the secondary side of the transformer (1 step), and from there to the line (:t, n ) (Ls). At this time, the resistance value of the variable resistor (VR) becomes equivalently larger due to the diode (Ds) being turned off, and the signal at point A becomes equal to the value at the time of PAL reception. The width is adjusted to approximately twice the thickness, thereby making it possible to derive a carrier color signal having approximately the same size as when receiving the PML on the line (LJ) (ILs).

次に、SICAM受信時にはダイオード(D2)がオン
になり、ダイオード(Dt)(Dg)がオフになるので
、第2ICIb)の端子(T6)から出力された8FC
AM搬送色信号がダイオード(D2)→コンデンサ(C
2)→IH遅延線(12)→コンデンサ(Cす→端子(
T7)の経路を通って第2IC(5)の81!icAM
スイッチ回路(7)K入力され、ここからB−Y。
Next, when receiving SICAM, the diode (D2) is turned on and the diodes (Dt) (Dg) are turned off, so the 8FC output from the terminal (T6) of the second ICIb)
AM carrier color signal is transferred from diode (D2) to capacitor (C
2) → IH delay line (12) → capacitor (C → terminal (
81 of the second IC (5) through the route of T7)! icAM
Switch circuit (7) K input, from here B-Y.

R−Y缶搬送色信号に振り分けられて導出される訳であ
る。
This means that it is distributed and derived from the R-Y can transport color signal.

ところで、この従来回路では、lH遅延4!珀をPAL
用とSFtCAM用に兼用でき、且つ、Pム”1″−″
QO$舶9非1即5°yf:y−f(Csゝ3 )をN
TBC用に共用できると言う利点があるが、トランス(
11及びバッファトランジスタ(TR)や3個のスイッ
チングダイオード(Ds)(D2)(Ds)等を必要と
し、工Cの外付は回路が複雑であって安価に実現できな
いと言う欠点があつ之。
By the way, in this conventional circuit, the lH delay is 4!珀をPAL
Can be used for both SFtCAM and Pmu"1"-"
QO$ship 9 non-1 immediately 5°yf:y-f(Csゝ3) to N
It has the advantage that it can be shared for TBC, but the transformer (
11, a buffer transistor (TR), three switching diodes (Ds) (D2) (Ds), etc., and the external installation of the circuit C has the disadvantage that the circuit is complicated and cannot be realized at low cost.

eう 発明の目的 本発明は上記の点に鑑みなされたものであり、前述の各
方式のカラーテレビ信号が受信可能なテレビジョン受像
機を実現するに当って、カラー信号処理用のICの外付
は回路をできるだけ簡素化することによって安価に実現
することを目的゛゛とする。
Purpose of the Invention The present invention has been made in view of the above points, and in realizing a television receiver capable of receiving color television signals of each of the above-mentioned systems, it is possible to use an IC other than an IC for color signal processing. The purpose of this is to simplify the circuit as much as possible and realize it at low cost.

に)発明の構成 本発明のカラーテレビジョン受像機では、FAI、/N
 T S Cカラー信号処理用の第11C内にPAIJ
及びNTSC各搬送色搬送色信号される第1の出力トラ
ンジスタをアAL受信時のみオンさせる第1の切換回路
と、上記各搬送色信号が該第11C内の直接路を介して
一方の入力として与えられ他方の搬送色信号入力が該第
11Cの入力端子を介して外部から入力される搬送色信
号分配回路とが設けられ、811ICAMカラー信号処
理用の第2IC内にはIIIIEICAM嶺送色信号が
入力言送色信号出力トランジスタ2,81nCAM受信
時のみオンさせる第2の切換回路と、上記81!ICA
M搬送色信号が該第2IC内の直接路を介して一方の入
力として与えられ他方の搬送信号入力が該第2工Cの入
力端子を介して外部から与えられるSIIICAMスイ
ッチ回路とが設けられ、また、上記第1第2出力トラン
ジスタの共通接続した出力端と第1第2ICの前記各入
力端子との間KIH遅延回路が接続されている。そして
、前記搬送色信号分配回路の出力信号が与えられる第1
1C内のカラー復調回路と前記8FiCAMスイッチ回
路からの出力信号が与えられる第2IC内のカラー復調
回路の各出力信号を選択的に取り出すようKしている。
B) Structure of the Invention In the color television receiver of the present invention, FAI, /N
PAIJ in the 11th C for TSC color signal processing
and a first switching circuit that turns on a first output transistor to which the NTSC carrier color signal is received only when AL reception is received; A carrier color signal distribution circuit is provided in which the other carrier color signal input is inputted from the outside through the 11C input terminal, and the IIIEICAM color signal is inputted in the second IC for 811ICAM color signal processing. Input transmission color signal output transistor 2, 81 A second switching circuit that is turned on only when receiving CAM, and the above-mentioned 81! ICA
A SIII CAM switch circuit is provided, in which an M carrier color signal is provided as one input via a direct path in the second IC, and the other carrier signal input is provided externally via an input terminal of the second IC, Furthermore, a KIH delay circuit is connected between the commonly connected output terminals of the first and second output transistors and each of the input terminals of the first and second ICs. and a first one to which the output signal of the carrier color signal distribution circuit is applied.
Each output signal of the color demodulation circuit in the 1C and the color demodulation circuit in the second IC to which the output signals from the 8FiCAM switch circuit are applied is selectively taken out.

(ホ)実施例 第1図は本発明の一実施例の要部概略構成を示しており
、第1図との対応部分には同一図番を付して説明を省略
し、異なる部分についてのみ説明する。即ち、この実施
例に於いて、先ず、PAL/NTBCカラー信号処理用
の第1工C1L)内には、第3図のものと同様の帯域増
幅回路(2)及び復調回路(3)(4)の他に、第1切
換回路(16、第1出力トランジスタ(TR1)、搬送
色信号分配回路+IT@を備えている。前記第1切換回
路O0は、後述する第1キラー電圧(Kl)トN T 
S Cx(ツチ信号(R8)K応答して動作し、帯域増
幅回路(2)の出力信号の大きさく利得)を切換えると
共に、この出力信号の導出用の前記第1出力トランジス
タ(TR1)をオン、オフさせるようになっている。ま
た、搬送色信号分配回路(1輪は、加算回路及び減算回
路を有し、その両回路の各一方の入力として前記第1切
換回路+1mからのPAL又はNTSC搬送色信号が直
接路(L6)を介して与えられ、各他方の搬送色信号入
力が端子(T12)を介して工C外部から与えられる。
(E) Embodiment FIG. 1 shows a schematic configuration of the main parts of an embodiment of the present invention. Parts corresponding to those in FIG. explain. That is, in this embodiment, first, in the first section C1L for PAL/NTBC color signal processing, a band amplification circuit (2) and a demodulation circuit (3) (4) similar to those in FIG. ), a first switching circuit (16, a first output transistor (TR1), and a carrier color signal distribution circuit +IT@) is provided. N.T.
Switches the S Cx (operates in response to the signal (R8) K and increases the gain of the output signal of the band amplifier circuit (2)), and turns on the first output transistor (TR1) for deriving this output signal. , it is set to turn off. Further, the carrier color signal distribution circuit (one wheel has an addition circuit and a subtraction circuit, and the PAL or NTSC carrier color signal from the first switching circuit +1m is directly routed (L6) as an input to each of the two circuits. The other carrier color signal input is applied from outside the unit C through the terminal (T12).

そして、上記加算回路の出力信号はIC内の線路(L7
)によってB−Y復調回路(3)に入力され、減算回路
の出力信号は線路(L8)によってR−Y復調回路(4
)に入力されるよう虻なっている。
The output signal of the adder circuit is transmitted to the line (L7) in the IC.
) to the B-Y demodulation circuit (3), and the output signal of the subtraction circuit is input to the R-Y demodulation circuit (4) by the line (L8).
).

ここで、前記第1キラー電圧(K1)は第11C+1)
内の図示しないカラーキラー回路でのPAL又けNT8
G信号中信号−スト信号の有無の検出によって発生され
る。また、NT8Cスイッチ信号(N8’)は受信信号
がMTBC信号か否かを示す信号であって、IC外部に
設けた手動の選択スイッチ或いは水平、垂直走査周波数
の検出回路等から与えられるよう釦なっている。々お、
第1工C(1)内には第3図のものと同様により回路や
FALスイッチ回路等の回路も勿論設けられている。
Here, the first killer voltage (K1) is the 11th C+1)
PAL spanning NT8 in color killer circuit (not shown)
The G signal is generated by detecting the presence or absence of the strike signal. Further, the NT8C switch signal (N8') is a signal indicating whether the received signal is an MTBC signal or not, and is provided via a manual selection switch provided outside the IC or a detection circuit for horizontal and vertical scanning frequencies. ing. Oh,
Of course, circuits such as circuits and FAL switch circuits are also provided in the first section C(1), similar to those shown in FIG.

次□に、Ell!IcAMカラー信号処理用の第2IC
(6)は、リミッタ増幅回路(6)の出力信号を導出す
るための第2出力トランジスタ(TR1)を第2キラー
電圧(K2)に応答してオン・オフさせる第2切換回路
a乃が追加されている以外は、@3図のものと同様に構
成されている。
Next □, Ell! 2nd IC for IcAM color signal processing
In (6), a second switching circuit ano is added that turns on and off the second output transistor (TR1) for deriving the output signal of the limiter amplifier circuit (6) in response to the second killer voltage (K2). The configuration is the same as that in Figure @3 except for the following.

本実施例では第1第2IC1l(5)を上記のように構
成すると共に、エミッタホロワ構成の前記第1第2出力
トラy)、t、Ic“Rz)(TRtCD各”ミ1 )
に接続された出力端子(T11)(71s)間を接続し
、その接続中点(至)K結合コンデンサ(C2)を介し
てインピーダンス整合用の抵抗(R1)及びコイA(L
 C)と共にIH遅延線α随の入力端を接続し、この遅
延線の出力端を結合コンデンサ(C4)を介して第2X
C(5)の入力端子(T16)に接続し、且つ、上記遅
延線[1fiの出力側に接続した遅延出力の振幅調整用
の可変抵抗(TR2)の摺動子を結合コンデンサ(C6
)を介して第11Ctl)の入力端子(T12)に接続
した点を特徴としている。なお% (LC)は遅延時間
の調整用のコイルである。
In the present embodiment, the first and second ICs (5) are configured as described above, and the first and second output tries of the emitter-follower configuration are
The output terminals (T11) (71s) connected to
C) and the input end of the IH delay line α, and the output end of this delay line is connected to the second X through a coupling capacitor (C4).
A slider of a variable resistor (TR2) for adjusting the amplitude of the delayed output connected to the input terminal (T16) of C(5) and connected to the output side of the delay line [1fi] is connected to the coupling capacitor (C6).
) is connected to the input terminal (T12) of the 11th Ctl). Note that % (LC) is a coil for adjusting the delay time.

さて、この実施例に於いて、PjlkL受信時には第2
図に示すように第1キラー電FE(Ki)がHレベルで
、NTEICスイッチ信号(MS)がLレベルにまる。
Now, in this embodiment, when receiving PjlkL, the second
As shown in the figure, the first killer electric current FE (Ki) is at H level, and the NTEIC switch signal (MS) is at L level.

これによって第1切換回路(Inは帯域増幅回路(2)
からのPAL搬送色信号の利得を略圭に減衰せしめると
共に、第1出力トランジスタ(TRI)をオンせしめて
その減衰されたPAL搬送色信号を出力端子(T11)
K導出させる。このとき、第2キラー電圧(K2)はニ
ーレベルにカリ、それKよって第2切換回路(+71が
第2出力トランジスタ(TR2)をオフさせるが、この
状態は両トランジスタ(TR+)(TR2)が共通エミ
ッタ接続されているので確実忙達成される。これKより
出力端子(T11)に導出されたPAL搬送色信号が1
■遅延線(lfiを通つ九のち入力端子(T12)を通
り第11C+1)内の搬送色信号分配回路fllK入力
され、この回路に直接路(L6)を通って入力される非
遅延の搬送色信号との加減算により振抄分けられたB−
Y%R−Y各搬送色信号がそれぞれ対応の復調回路fS
)(+)にそれぞれ与えられるととKなる。
As a result, the first switching circuit (In is the band amplifier circuit (2)
At the same time, the gain of the PAL carrier color signal from the output terminal is substantially attenuated, and the first output transistor (TRI) is turned on to output the attenuated PAL carrier color signal to the output terminal (T11).
Derive K. At this time, the second killer voltage (K2) reaches the knee level, so that the second switching circuit (+71) turns off the second output transistor (TR2), but in this state both transistors (TR+) (TR2) are common. Since it is connected to the emitter, it is reliably achieved.The PAL carrier color signal derived from K to the output terminal (T11) is 1
■The non-delayed carrier color is inputted to the carrier color signal distribution circuit fllK in the delay line (lfi, then passes through the input terminal (T12) to the 11th C+1), and is input to this circuit directly via the path (L6). B- divided by addition and subtraction with the signal
Demodulation circuit fS corresponding to each Y%R-Y carrier color signal
)(+) respectively, it becomes K.

次に、NTBC受信時は第2図のように第1キラー電圧
(K1)及びNT8Cスイッチ信号(R8)が共KHレ
ベルにカる。これによって第1切換回路(l荀は帯域増
幅回路(2)からのN78G搬送色信号の利得を減衰さ
せず、しかも、第1出力トランジスタ(TR1)をオフ
にする。このとき第2キラー電圧(K2)はLレベルに
なり、第2出力トランジスタ(TR2)もPAL受信受
信量様にオフになっている。その結果、第1切換回路(
I@から直接路(L4)を通るHTEJC搬送色信号だ
けが分配回路(l−に入力され、従って、第11C+1
1内の復調回路[31(4)には同一のN T B、C
搬送色信号が’PAL受信時と略同じ大きさで入力され
ることになる。
Next, when receiving NTBC, the first killer voltage (K1) and the NT8C switch signal (R8) both reach the KH level as shown in FIG. As a result, the first switching circuit (1) does not attenuate the gain of the N78G carrier color signal from the band amplifier circuit (2), and also turns off the first output transistor (TR1). At this time, the second killer voltage ( K2) becomes L level, and the second output transistor (TR2) is also turned off in accordance with the amount of PAL reception.As a result, the first switching circuit (
Only the HTEJC carrier color signal passing through the direct path (L4) from I@ is input to the distribution circuit (l-, and therefore the 11th C+1
The demodulation circuit in 1 [31 (4) has the same N T B, C
The carrier color signal is input with substantially the same magnitude as when receiving 'PAL.

更に、8FICA受信時には第1キラー電圧(K1)及
びNT8Cスイッチ信号(K8)がLレベルとなること
釦よって第1出力トランジスタ(TRI)がオフになり
、逆に第2キラー電圧(K2)が■レベルになって第2
出力トランジスタ(TR2)がオンになるので、第21
c(5)の出力端子(’I’+s)に現われる811f
CAM搬送色信号がIH遅延線(l喝を通ったのち入力
端子(Tt6)を介して第2xc(5)内の81!iC
AMスイッチ回路(7)に入力されるので、以後は第3
図の場合と同様にB−Y搬送色信号とR−Y搬送色信号
に振り分けられ、その各信号がそれぞれ復調回路t9H
11に与えられる訳である。
Furthermore, when receiving 8FICA, the first killer voltage (K1) and the NT8C switch signal (K8) go to L level, so the first output transistor (TRI) is turned off, and conversely, the second killer voltage (K2) is turned off. Level 2
Since the output transistor (TR2) is turned on, the 21st
811f appearing at the output terminal ('I'+s) of c(5)
After the CAM carrier color signal passes through the IH delay line (1), it passes through the input terminal (Tt6) to 81!iC in the second xc (5).
Since it is input to the AM switch circuit (7), the third
As in the case shown in the figure, the signals are divided into the B-Y carrier color signal and the R-Y carrier color signal, and each signal is sent to the demodulation circuit t9H.
This is the translation given to 11.

々お、第1第2キラー電圧(K1)(K2)は搬送色信
号分配回路(l→及びスイッチ制御回路(8)Kもそれ
ぞれ入力され、それらがLレベルのときに上記各回路(
11+81の動作をそれぞれ停止させるようになってい
る。
Furthermore, the first and second killer voltages (K1) (K2) are also input to the carrier color signal distribution circuit (l→ and the switch control circuit (8) K, respectively, and when they are at L level, the above-mentioned circuits (
11+81 operations are respectively stopped.

(へ)発明の効果 本発明に依れば、FAI、%NT日C,811ICAM
各方式のテレビジョン信号を受信可能なテレビジ゛ヨン
受像機を実現するに当って、カラー信号処理用ICの外
付は回路を部品点数の少ない非常に簡単な構成とするこ
とができ、安価に実現できると言う利点がある。
(f) Effect of the invention According to the present invention, FAI, %NT day C, 811 ICAM
In creating a television receiver that can receive television signals of various formats, externally attaching a color signal processing IC allows the circuit to have a very simple configuration with a small number of components, making it possible to reduce costs. It has the advantage of being achievable.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の要部概略構成を示す回路図
、第2図はその動作説明に使用する図、第3図は従来の
カラーテレビジョン受像機の要部概略構成を示す回路図
である。 (1):第11C,K51:第2IC,(TR1):第
1出力トランジスタ、(Tug戸27.2出力トランジ
スタ、aカ=IH遅延回路。 出願人 三洋電機株式会社 代理人弁理士佐野静 夫
Fig. 1 is a circuit diagram showing the schematic configuration of the main parts of an embodiment of the present invention, Fig. 2 is a diagram used to explain its operation, and Fig. 3 shows the schematic structure of the main parts of a conventional color television receiver. It is a circuit diagram. (1): 11th C, K51: 2nd IC, (TR1): 1st output transistor, (Tug door 27.2 output transistor, a = IH delay circuit. Applicant: Sanyo Electric Co., Ltd. Representative Patent Attorney Shizuo Sano

Claims (1)

【特許請求の範囲】 +1) PAL信号と1iTBc信号とEIFICAM
信号とが受信可能なテレビジョン受像機であって、PA
L/NT8Cカラー信号処理用の第1IC内にはPAL
及びNTS(!搬送色信号増幅用の帯域増幅回路と、該
増幅回路の出力信号が入力される第1の出力トランジス
タをPAL受信受信路オンさせる第1の切換回路と、加
算回路及び減算回路を有し該両回路の一方の入力端が前
記第11C内の直接路を介して前記帯域増幅回路の出力
側に接続され他方の入力端が該第11cの搬送色信号入
力端子に接続された搬送色信号分配回路と、該分配回路
からの各搬送色信号の復調を行なうカラー復調回路を設
け、SFiCAMカラー信号処理用の第2IC内にはS
VC入M入退搬送色信号増幅用きツタ増幅回路と、該増
幅回路の出力信号が入力される第2出力トランジスタ・
をS:[!IcAM受信時のみオンさせる第2の切換回
路と、一方の入力端が前記第2IC内の面接路を介して
前記リミッタ増幅回路の出力側に接続され他方の入力端
が該第2xcの搬送色信号入力端子に接続されたsNl
ICAMスイッチ回路と、該スイッチ回路からの各搬送
色信号の復調を行なうカラー復調回路とを設けると共に
、前記第1第2出力トランジスタの共通接続した出力端
と前記第1第2ICの各搬送色信号入力端子との間にI
H遅延回路を接続し、前記第1第2IC内の各カラー復
調回路の出力信号を切秒換えて取り出すようにしたカラ
ーテレビジョン受像機。 (2)前記第1第2出力トランジスタは何れもエミッタ
ホロワ型忙構成きれ、その各エミッタが互いに前記IT
l遅嶌回路の入力端に共通接続されていることを特徴と
する特許請求の範囲第1項記載のカラーテレビジョン受
像機。 (3)前記第1の切換回路けNT8G受信時に前記直接
路にPAL受信受信路2倍の大きさをもつ搬送色信号を
導出させるよう切換えることを特徴とする特許請求の範
囲81項記載のカラーテレビジョン受像機。
[Claims] +1) PAL signal, 1iTBc signal, and EIFICAM
A television receiver capable of receiving a signal from a P.A.
PAL is included in the first IC for L/NT8C color signal processing.
and NTS (!) A band amplification circuit for amplifying a carrier color signal, a first switching circuit that turns on a PAL reception path for a first output transistor into which the output signal of the amplification circuit is input, an addition circuit and a subtraction circuit. a carrier, wherein one input end of the two circuits is connected to the output side of the band amplification circuit via a direct path in the 11C, and the other input end is connected to the carrier color signal input terminal of the 11C. A color signal distribution circuit and a color demodulation circuit for demodulating each carrier color signal from the distribution circuit are provided, and the second IC for SFiCAM color signal processing includes an S
A VC input/output carrier color signal amplification circuit amplifying circuit, and a second output transistor to which the output signal of the amplifying circuit is input.
S: [! a second switching circuit that is turned on only when receiving IcAM, one input end of which is connected to the output side of the limiter amplifier circuit via a surface path in the second IC, and the other input end of which is connected to the output side of the limiter amplifier circuit; sNl connected to the input terminal
An ICAM switch circuit and a color demodulation circuit for demodulating each carrier color signal from the switch circuit are provided, and the commonly connected output ends of the first and second output transistors and each carrier color signal of the first and second IC are provided. I between input terminal
A color television receiver in which an H delay circuit is connected, and the output signals of each color demodulation circuit in the first and second ICs are switched and taken out. (2) Both of the first and second output transistors have an emitter-follower type structure, and their respective emitters are mutually connected to the IT.
1. A color television receiver according to claim 1, wherein the color television receiver is commonly connected to the input terminals of the slow-wave circuit. (3) The color according to claim 81, characterized in that the first switching circuit switches to derive a carrier color signal having a size twice that of the PAL reception path to the direct path during NT8G reception. television receiver.
JP11727084A 1984-06-07 1984-06-07 Color television receiver Granted JPS60260281A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11727084A JPS60260281A (en) 1984-06-07 1984-06-07 Color television receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11727084A JPS60260281A (en) 1984-06-07 1984-06-07 Color television receiver

Publications (2)

Publication Number Publication Date
JPS60260281A true JPS60260281A (en) 1985-12-23
JPH0544875B2 JPH0544875B2 (en) 1993-07-07

Family

ID=14707597

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11727084A Granted JPS60260281A (en) 1984-06-07 1984-06-07 Color television receiver

Country Status (1)

Country Link
JP (1) JPS60260281A (en)

Also Published As

Publication number Publication date
JPH0544875B2 (en) 1993-07-07

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