JPS60257770A - Switching power source circuit - Google Patents

Abstract

PURPOSE:To perform a power source circuit having high quality and good reliability with less number of parts by providing a collector current detector of a switching transistor in individual converters, and limiting the drive pulse width of the individual converters. CONSTITUTION:A switching power source circuit has the first, second converters, a voltage controller 12, the first and second current detectors 17, 16, 13, and the first and second pulse width limiters 10, 11, and supplies a power to a common load 9. The output of the controller 12 is supplied to two switching transistors 4a, 4b, and when a difference occurs between the collector currents of the transistors, the detected threshold value of the current detector exceeds the collector current. Thus, the detector 13 delivers a detection signal to an AND circuit 11. A reset signal is fed to a D type flip-flop 10, the output width is controlled to prevent the load from abnormally concentrating at the individual converters.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a switching power supply circuit that controls a plurality of converters with one voltage control circuit.

[Prior art]

Switching power supplies that control multiple converters in parallel are used when the output power of one converter is insufficient due to the shape limitations of the parts used, but conventional power supplies of this type are independent switching power supplies. The configuration is such that a plurality of outputs are connected in parallel, or only a plurality of converter parts are connected in parallel, and the switching transistors of each converter are driven in parallel with one drive pulse.

Of these, the former method of using independent switching power supplies in parallel poses no problem in terms of performance, but it cannot avoid increasing the cost and mounting space as the number of control circuits required increases. on the other hand,
The latter method, in which only the converter sections are paralleled, suffers from variations in components such as storage time ts of switching transistors and variations in wiring resistance, uneven load sharing among paralleled converters, and partial load concentration. This increases stress on parts, leading to a decline in quality and reliability.

[Purpose of the invention]

An object of the present invention is to provide a switching transistor collector current detection circuit for each converter used in parallel, and to independently control the maximum value of the driving pulse width of the switching transistor, thereby preventing abnormal load concentration with a small number of components. The purpose of the present invention is to provide a switching power supply circuit that can solve these problems.

[Summary of the invention]

The present invention provides a switching power supply circuit in which the outputs of a plurality of converters are connected in parallel to a common load and the output voltage is controlled by one voltage control circuit, in which each of the converters is provided with a collector current detection circuit of a switching transistor,
The current detection circuit includes a D-type flip-flop circuit, which uses an AND signal of the output signal of the current detection circuit and the output signal of the voltage control circuit as a reset signal, and uses the output signal of the voltage control circuit as a clock input signal. The switching transistor is provided corresponding to each of the switching transistors, and the switching transistor is drive-controlled by the output signal of the flip-flop circuit.

[Explanation of Examples]

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a switching power supply circuit according to the present invention, and FIG. 2 is a diagram explaining the circuit operation of the embodiment.

First, referring to FIG. 1, one embodiment of the present invention includes a first converter (current detection transformer 2a, power conversion transformer 3a + switching transistor 4a, i-channel circuit 52I) connected to the input power source 1.

A circuit consisting of a rectifier diode 6a + a chiyoke transformer 7a, and a smoothing capacitor 83), and a second converter (a circuit consisting of a first
A circuit consisting of 2b to 8b (similar to the converter) and
Voltage control circuit 12 that detects output voltage and converts it into pulse width
The reference voltage (REF) of this circuit 12 is connected to a resistor 14.
A first current detection circuit (a circuit consisting of a diode 17a, a detection resistor 16a, and a voltage comparison circuit 13a) having a threshold voltage divided by 15, and a second current detection circuit (17b, like the first current detection circuit), 16b, 13b), the first pulse width limiting circuit, that is, the AND circuit 11a which takes the logical product of the first current product - output circuit output, and the output of the voltage control circuit 12. (R8T) terminal and the output of the voltage control circuit 12 is connected to the clock (CLK) terminal, a second pulse width limiting circuit (tb), and a second current detection circuit. It consists of a circuit formed by connecting an AND circuit 11b and a D-type flip-flop 10b in the same manner as the first pulse width limiting circuit. Note that the reference numeral 9 in the figure indicates a common load.

The operation of the switching power supply circuit configured as described above will be explained using FIG. 1 and FIG. 2 together.

Assume now that the output of the voltage control circuit 1 12 has a width of 131 from time to as shown in FIG. When the collector currents of the two switching transistors 4a and 4b differ as shown in FIG. 2 due to variations in transformer width ratio, wiring resistance, etc., the circuit according to the embodiment operates as follows. Since the collector current Ic of the switching transistor 4a is smaller than the detection current IDET of the current detection circuit, the voltage comparison circuit 13a does not send out a detection signal, and the output pulse width of the D-type flip-flop 1, Oa is the pulse width of the voltage control circuit 12. is the same as On the other hand, the collector current of the switching transistor 4b is 1. Since IDET k is exceeded at the point in time, the voltage comparison circuit 13b sends out a detection signal and sends out a reset signal to the D-type flip-flop 10b. Therefore, it is controlled by the output pulse width t1 of the flip-flop 10b. The output of the voltage comparator circuit 13b is the transistor 4
It is recovered at time t when the storage time of b is over, but since the flip-flop 10b is a D-type flip-flop or a delay delay type, it is held until the next clock is input, and the drive signal for the transistor 4b is not sent out. In this way, since the collector current of the switching transistor of each converter is independently controlled by the detection threshold IDET, it is possible to prevent abnormal concentration of the through load on each converter.

On the other hand, in the conventional switching power supply circuit shown in FIG. 3 in which two converters are connected in parallel, the current detection circuit (diode 17, detection resistor 16, voltage comparison circuit 1
3) and a pulse width limiting circuit (AND circuit 11
．． Since there is only one system (a circuit consisting of a D-type flip-flop circuit 10), the drive pulse width is the same for the two converters, and the current of the switching transistor 4b is the same as the transistor 4 drive waveform shown in FIG. Depending on the conditions, the current 5 may be several times that of the transistor 4a. IDBT in this case is 2
It is set for the sum of the collector currents of two transistors. In addition, in the circuit shown in Figure 3, even if all other conditions are the same, variations in the transistor nutrage time will cause variations in the pulse width, which will cause variations in the collector current, so it is necessary to align the characteristics of the main components in advance. .

In the above embodiment, the case where the number of parallel converters is two is shown, but the case where the number of parallel converters is three or more can be similarly implemented.

〔Effect of the invention〕

As explained above, in a switching power supply in which the outputs of a plurality of converters are connected in parallel and controlled by one voltage control circuit, each converter is provided with a collector current detection circuit of a switching transistor, and a detection signal is detected. (by limiting the drive pulse width of each individual converter), and due to variations in the characteristics of circuit components.
Abnormal concentration of tortoise current can be prevented, and a switching power supply circuit with good quality and reliability can be realized with a small number of parts.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is an operation waveform diagram explaining the present invention in detail, and FIG. 3 is a block diagram showing an example of a conventional system. 1... Input' power supply, 2 + 2a + 2b・
・Current detection door, 3a, 3b...
・Power conversion transformer, 4a. 4b...Switching transistor, 5a, 5
b...Drive circuit, 6a, 51)... Rectifier diode, 7a. 7b... Chimique transformer, 8a, 8b...
...Ebb and flow capacitor, 9...Load, 1011
0a, 10b ・S...D type flip-flop 7', 1
1. lla, llb ・Old...AND circuit, 12...
...'Kamedo leg circuit, 13, 13a, 13b...
... Voltage ratio 1maki circuit, 14.15... Voltage dividing resistor, 16.16a, 16b ・=-' current detection resistor, 17
．． 17a+17b...Diode. Agent Patent Attorney Oto Uchihara

Claims (1)

[Claims] In a switching power supply circuit in which the outputs of a plurality of converters are connected in parallel to a common load and the output voltage is controlled by one voltage control circuit, each of the converters is provided with a collector current detection circuit of a switching transistor, A D-type flip-flop circuit, which uses an AND signal of an output signal and an output signal of the voltage control circuit as a reset signal and uses an output signal of the voltage control circuit as a clock input signal, is provided corresponding to each of the current detection circuits. A switching power supply circuit further comprising Irf'e for driving and controlling the switching transistor υ by the output signal of the flip-flop circuit.