JPS60256986A - Reproducing device - Google Patents

Abstract

PURPOSE:To attain accurate signal processing by shifting its capture range to a proper section in response to a reproducing signal at a PLL extracting a clock signal so as to obtain the clock signal in synchronizing with an input signal at all times. CONSTITUTION:A deciding circuit 47 detects only a period when a pilot signal is reproduced by a signal from a pulse generator 23, applies decision for the period only, and the frequency dividing ratio of a frequency divider 43 is controlled from the result of decision. When the frequency of the reproduced pilot signal is f0/4 (bit rate of an NRZ signal is fCH/2), the frequency of the pilot signal at recording is f0/2, the signal is reproduced at a half recording speed and the circuit 47 applies the result of decision of the ''1/2 state'' to a PLL32. The value of an output signal PLCK of the PLL32 is equal to the bit rate fCH/2 of the reproduced NRZ signal, and the NRZ signal and the PLCK signal are subject to phase locking. Thus, the capture range of the PLL32 is shifted.

Description

Detailed Description of the Invention [Technical Field of the Invention] The present invention relates to a reproducing device for reproducing information signals from a record carrier having information signals recorded at a plurality of recording speeds, and in particular to This is a playback device that performs playback at an appropriate playback speed depending on the recording speed, or performs playback by performing appropriate signal processing depending on the recording speed.

[Prior Art] FIG. 1 is a diagram showing an example of a recording format of a magnetic tape which is a record carrier. In FIG. 1, magnetic tape 1
A signal track 2 inclined with respect to the width direction of the tape 1 is formed on the tape 1 . This signal track 2 is composed of a portion 3 where a digital information signal is recorded and a portion 4 where a pilot signal is recorded. The pilot signal is
The digital information signal is recorded at a constant frequency of 172 * fo / 2, which is related to the recording speed (a predetermined recording bit rate f.

FIG. 2 is a diagram showing an example of the mechanism of an apparatus for recording or reproducing information signals on a magnetic tape as described above. In FIG. 2, a magnetic tape 1 is sent out from a feed-out roll 12 driven by a drive motor 14, and a pair of magnetic heads 11 are rotated by a motor 22.
(In the figure, one side is not visible due to the shadow of drum 1o)
and the drum 10 by pins 16 and 17. The magnetic tape 1 set in this way is
Next, it is held between the capstan 19 and the pinch roller 18, and is driven by the capstan drive motor 2o. Thereafter, the tape 1 is wound onto a take-up reel 13 driven by a motor 15. The rotating shaft of the magnetic head 11 is coupled to a pulse generator 23 that generates pulses in synchronization with the rotation thereof, and the pinch row 518 is coupled to the pulse generator 21 that generates pulses proportional to the number of rotations thereof.

In the recorded information reproducing apparatus configured as described above, during normal reproduction, the magnetic head 11 traces the track 2 using pulses and other signals from the pulse generators 21 and 23 to accurately reproduce information. As much as possible, the rotation control circuit 24 controls the rotation of the magnetic head 11 and the running of the magnetic tape 1. In addition,
In FIG. 2, for convenience IJ: the control path of the capstan drive motor 20 by the swing control circuit 24 is omitted.

FIG. 3 is a diagram showing an example of a conventional reproduction signal processing circuit of a reproduction apparatus that reproduces the magnetic tape 1 shown in FIG. 1 using the mechanism shown in FIG. 2. In FIG. 3, NRZ (N on-Return
-to -Zero) The modulated and recorded information signal is sent from the rotating magnetic head 11 to the rotary transformer 3.
Read by 0. Since this read signal HF is weak, it is waveform-shaped and amplified by the waveform shaping circuit 31 to become a signal of an appropriate level (hereinafter referred to as NRZ signal), and then processed by the phase locked circuit (hereinafter referred to as PLL) 32 and signal processing. It is output to the circuit 33. This PLL32 is NR2
A clock signal (bit clock) included in the information signal is extracted from the signal, and a signal (hereinafter referred to as PLCK) that controls the timing of a circuit that performs various signal processing in the subsequent stage is output. The signal processing circuit 33 handles the NRZ signal and the PL
CK is input and digital signal processing is performed. Therefore, in order for this signal processing circuit 33 to perform signal processing operations normally, PLCK must always be synchronized with the NRZ signal.

FIG. 4 is a diagram showing the response of the PLL 32 to changes in the bit rate fCN of the input NRZ signal.

In the figure, the horizontal direction indicates the NRZ bit rate fcH,
The vertical direction indicates the frequency fPLCK of PLCK. The operation of the PLL 32 will be described below with reference to FIG.

Now, the bit rate f of the NRZ signal. If H increases slowly from a sufficiently low point, 1. PLCK in fcL
begins to phase synchronize (zuc8-fPtc-) with the NRZ signal, and loses synchronization at rLU.

Conversely, when the bit rate fcH gradually decreases from a sufficiently high level, synchronization begins at fcL and synchronization is lost at fL. Interval [fCL+'fCL
l] is the capture range, and also the interval [fLL, fL
U] are respectively called lock ranges. therefore,
In order for the output signal PLGK of the PLL 32 to be always phase-synchronized with the input NRZ signal, the bit rate rcH of the NRZ signal must be within the capture range of the PLL 32. In other words, it is not possible to extract a phase-synchronized PLGK from a signal having a bit rate outside the capture range.

Therefore, if a malfunction occurs, such as reproducing the magnetic tape 1 recorded in the double speed mode at the normal mode speed, and the bit rate of the NRZ signal deviates from the predetermined capture range of the PLL 32, the conventional method shown in FIG. In the reproducing apparatus, it was not possible to extract the PLCK phase-synchronized with the NRZ signal, and the signal processing circuit 33 was unable to perform accurate signal processing.

[Summary of the Invention] It is an object of the present invention to eliminate the above-mentioned drawbacks, so that even when the frequency or bit rate of the input signal to the PLL is outside the PLL's capture range, the output signal of the PLL remains consistent with the input signal. It is an object of the present invention to provide a reproducing circuit configured to always be synchronized.

In summary, the present invention records and reproduces a pilot signal having a frequency or bit rate related to the frequency or bit rate value of a recorded information signal, and uses this pilot signal to generate a clock signal in a reproduction circuit. The capture range of this PLL is shifted so that the output signal of the PLLL to be extracted is always synchronized with the input signal of this PLLL.

The above-mentioned objects and other objects and features of the present invention will become apparent from the detailed description given below with reference to the drawings.

[Embodiment of the Invention] FIG. 5A is a schematic block circuit diagram of a reproduction circuit which is an embodiment of the invention. In FIG. 5A, unlike the conventional reproducing circuit shown in FIG. A frequency discrimination circuit 34 is added to supply the PLL 32.

FIG. 5B is a diagram schematically showing the configuration of the frequency discrimination circuit 34 and PLL 32 shown in FIG. 5A. Fifth
In Figure B, the PLL 32 is composed of a frequency divider 43, a voltage controlled oscillation circuit 41, and a phase comparator 42. Further, the discrimination circuit 34 includes band pass filters BPF・-I, BPF
-1[, BPF 711r, and a determination circuit that determines the current playback speed based on the signal from this bandpass filter. The operation of this reproducing circuit will be described below with reference to FIGS. 5A and 5B. Now, on the magnetic tape 1 - is an information signal (fC) with a bit rate fc H and l is f.

Should be again. /2) and frequency f. /2
The pilot signal Q signal of
). Further, a voltage controlled oscillation circuit (hereinafter referred to as VCO) 41 of the PLL 32 outputs a frequency signal that changes depending on the output voltage of the phase comparator 42, centered on the 2f CH.

Here, the frequency of the pilot signal is recorded at a constant frequency fo/2 regardless of the recording speed.

Therefore, when an information signal recorded in double speed mode is reproduced in normal mode, the reproduction frequency of the pilot signal is fo/
2 times f. becomes. Furthermore, when an information signal recorded in normal mode is reproduced in double speed mode, the frequency of the reproduced pilot signal is f. 1/2 times f of /2. /4. If the recording speed and reproduction speed are the same, the frequency of the reproduction pilot signal remains fo/2. Further, the reference signal frequency 2'fcs of the VCO 41 is 2fo depending on whether the playback speed is set to normal mode or double speed mode.

2・fo/2. The bandpass filters BPF-1, BPF-M, and BPF-I of the discriminator circuit 34 select the frequency f of the possible regenerated pilot signal. /2. fO.

Each band of fo/4 is passed through. The determination circuit 44 detects only the period during which the pilot signal is being reproduced by the signal from the pulse generator 23, performs a determination operation only during that period, and controls the frequency division ratio of the frequency divider 43 based on the determination result. The divider 43 is designed to divide the frequency of the determination result by 1/2 (if the determination result is "1", divide the frequency by IX1/2-1/2).

Now, suppose the frequency of the regenerated pilot signal is f0/4 (the bit rate of the NRZ signal is tcu/2
), since the frequency of the pilot signal during recording is fo/2, it is currently being reproduced at 1/2 the recording speed. At this time, the determination circuit 44 outputs a determination result of "1/2 state" to the PLL 32. Frequency divider 43
is designed to perform 1/2 division of the determination result, so the frequency fP of the output signal PLCK of the PLL 32
L CK Hare LcK=2・fcs・1/2・1
/2-rc i+ /2, and the value of PLGK is equal to the pit rate fcI+/2 of the reproduced NR2 signal at this time, and the NRZ signal and PLCK are phase synchronized.

FIG. 6 is a diagram showing how the capture range of the PLL 32 described above is shifted. In FIG. 6, the solid line shows the response of the PLL 32 to the input signal NR2 before shifting, and the broken line shows the response after shifting.

Also, the frequency of the regenerated pilot signal is f. , fo/2, each fPLcK is 2' CHe '
CM, and similarly the NRZ signal and PLCK are phase synchronized.

Here, the frequency of the recorded pilot signal is fo /
2, but there is no need to limit it to ``./2.
. It suffices if it is a function value.

In the above embodiment, the playback speed is constant and PLL3? However, it is also possible to shift the capture range and play back at the same playback speed as the recording speed. The method will be described below. Normally, the pit rate when recording is fo I3
and f. The data is recorded at two types of pit rates: /2, but the bit recording density is constant. That is, during recording, the magnetic head-magnetic tape relative speed (hereinafter simply referred to as relative speed) is V. and V. /2 corresponds to the pit rate value. The pilot signal recorded on the portion 4 of the signal track 2 on the magnetic tape 1 is independent of the change in relative velocity, t, = fo /e7゜h = To /
16. The information is recorded in a time-division manner in accordance with the magnetic head 11 at three different frequencies: f, -fo/36. These three-frequency pilot signals are used for so-called tracking control, which controls the running of the magnetic tape 1 so that the magnetic head 11 accurately follows the track.

FIG. 7 is a diagram showing frequency components that appear depending on the reproduction speed of the three-frequency pilot signal in the reproduction state. - These three frequency pilot signals f, , f2. Since f is recorded in a time-division manner, each frequency component appears independently in FIG. 7, but these are shown superimposed for convenience. In FIG. 7, the solid line indicates normal playback, that is, the case where the relative speed during playback (hereinafter referred to as readout speed) is the same as the relative speed during recording, and the broken line indicates the case where the readout speed is 1/2 of normal playback. The one-dot chain line represents the case where the reading speed is twice that of normal playback. As is clear from Fig. 7, if a signal with a frequency of 2f appears, the reading speed is twice the normal speed, so the reading speed is reduced to 1.
If the speed is reduced to /2, the relative speed becomes the same as the recording speed, and normal playback can be performed. At this time, the relative speed of recording and playback is V
. and V. There are only two types: /2, so the read speed is V. /2 allows normal playback. Similarly f.

If a signal with a frequency of /2 appears, the reading speed should be doubled, so it can be seen that the normal reading speed is Vo. In addition, if the f component appears, it can be seen that normal reproduction is occurring.

f2. The same applies to f and the component.

If the above-mentioned phenomenon is utilized and the reading speed is set to be the same as the relative speed at the time of recording, the P signal will always be phase-synchronized with the NRZ signal.
It is possible to take out the LCK.

FIG. 8 is a schematic block circuit diagram of a reproducing apparatus according to another embodiment of the present invention. In FIG. 8, a frequency discrimination circuit 35 receives a signal from a tracking control circuit 36, and also provides a signal for controlling this control circuit 36 to the control circuit 36. The operation will be explained below. The frequency discrimination circuit 35 uses the pulse signal from the pulse generator 23 to determine whether or not the pilot signal recorded in the portion 4 of the signal track 2 on the magnetic tape 1 is currently being reproduced. If so, distinguish the frequency of that signal. At this time, the discrimination circuit 35 is simultaneously given a signal indicating the current read speed from the servo circuit 36. The discrimination circuit 35 uses this pilot signal and the signal from the servo circuit 36 to determine if the relative speed at the time of storage is vo.
or V. /2, and provides the servo circuit 36 with a signal for controlling the servo circuit 36 so that the reading speed matches the relative speed during recording. At this time, PLL3
The signal controlling the frequency divider 43 of No. 2 is also sent from the discrimination circuit 35 to the PL.
Given to L32.

FIG. 9 is a diagram showing a discrimination algorithm in the frequency discrimination circuit 35. In FIG. 9, only the fl component is shown, but f2. The same applies to the signal component of f. The operation will be explained using FIG. 9. First, the frequency of the reproduced pilot signal is 2f+, and the current output speed from the servo circuit 36 is V. Assume that a signal indicating that . At this time,
The playback bit rate is fo. At this time, according to the discrimination algorithm shown in FIG. 9, the normal successive speed (the same relative speed as during recording) is v0/2, and the normal bit rate is f. /2. Therefore, if a signal is given from the discrimination circuit 35 to the servo circuit 36 to reduce the reading speed to 1/2 and the voltage application to the capstan motor 20 and drum motor 22 is controlled, the current reading speed becomes Vo/2. , pit rate is f. /2, and the reading speed becomes normal. Further, at this time, since the normal pit rate is instructed to the PLL 32 from the discrimination circuit 35, the PLCK from the PLL 32 is always phase-synchronized with the NRZ signal. The method of achieving phase synchronization between the PLCK and the NRZ signal is exactly the same as in the embodiment of the invention described above.

With the above configuration, two types of relative velocities V can be obtained. .

The magnetic tape 1 recorded at either vo/2 is reproduced at the same relative speed as at the time of recording, and the capture range of the PLL 32 is a frequency range that matches the pit rate of the reproduced signal. Therefore, the pit rate of the NRZ signal is the same as that during recording, and the PLCK is
Since it is phase-synchronized with the Z signal, the signal processing circuit 33 can perform accurate signal processing.

In the above two embodiments, an apparatus for reading out signals from a magnetic tape on which digital signals are recorded using a rotating magnetic head and having two types of recording/reproducing speeds has been described. It is not limited to. That is, when the signal is a video signal or an analog signal instead of a digital signal, when the record carrier is other than a disc-shaped record carrier or a magnetic tape, when the signal reading means is an optical type.

, When the signal tracks are arranged parallel to the tape running direction, when there are three or more recording/playback speeds.

2 above even in cases where there is a combination of any of the above.
Effects similar to those of the embodiment can be obtained.

[Effects of the Invention] As described above, according to the present invention, when reproducing record carriers recorded at various speeds, P
The LL has a regeneration circuit that shifts its capture range to an appropriate interval according to the reproduction signal, so the PLL can always output a clock signal that is synchronized with the input signal, allowing accurate signal processing. can be done.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a recording format of a magnetic tape. FIG. 2 is a diagram showing the magnetic tape running mechanism of FIG. 1. FIG. 3 is a schematic block circuit diagram of a conventional reproduced signal processing circuit. FIG. 4 is a diagram showing the response of the PLL to the input signal. FIG. 5A is a schematic block circuit diagram of a reproduced signal processing circuit according to an embodiment of the present invention. Figure 5B is P of Figure 5A.
3 is a schematic block diagram showing the configurations of an LL 32 and a discrimination circuit 34. FIG. FIG. 6 is a diagram showing the response of the PLL shown in FIG. 5 to an input signal. FIG. 7 is a diagram showing the presence or absence of frequency components of the reproduced pilot signal. FIG. 8 is a schematic block diagram of a reproduced signal processing circuit according to another embodiment of the present invention. FIG. 9 is a diagram showing a discrimination algorithm of the frequency discrimination circuit shown in FIG. 8. In the figure, 20 is a capstan motor, 22 is a rotating drum drive motor, 23 is a pulse generator, and 32 is a P
LL, 34', and 35 are frequency discrimination circuits, 36 is a tracking servo circuit, 43 is a frequency divider, and 47 is a determination circuit. In addition, in the figures, the same reference numerals indicate the same or corresponding parts. Agent, Masuo Oiwa Figure 1 Figure 2 Figure 3 Figure 5A Figure 61! I Figure 7 2 2 2 Figure 8 Figure 9 Procedural amendment (voluntary) 2. Device for reproducing the name of the invention 3. Relationship with the chopsticks case to be amended Patent applicant address 2-2 Marunouchi, Chiyoda-ku, Tokyo No. 3 name
(601) Mitsubishi Electric Co., Ltd. Representative Hitoshi Katayama Department 4, Agent 5, Subject of amendment/Meiji 1 Correct "other than" to "is". that's all

Claims (1)

[Scope of Claims] 11) A reproducing device for reproducing an information signal from a record carrier on which an information signal and at least one type of pilot signal of a constant frequency are recorded, comprising a reading means for reading out the information signal; a signal processing means for processing the information signal read from the reading means; a frequency discrimination means for discriminating the frequency of the pilot signal; and a signal processing means for discriminating the frequency of the pilot signal; and a signal processing means for discriminating the frequency of the pilot signal; a timing signal generating means for generating a timing signal from the input signal, wherein the processing means processes the information signal in response to the timing signal. (2) The reproducing device according to claim 1, wherein the timing signal extraction means is a phase synchronized circuit including a divider, and the divider changes a frequency division ratio in response to the discrimination output. (3) The reproducing device further includes a speed control circuit for controlling a reading speed at which the reading means reads out the information signal,
3. The reproducing apparatus according to claim 1, wherein said speed control circuit controls said readout speed in response to a discrimination output from said discrimination circuit. (4Σ The record carrier is a magnetic tape, and has a plurality of signal tracks provided at an angle with respect to the running direction of the magnetic tape, and the pilot signal is recorded on a part of the signal track. The reproducing device according to claim 1, 2, or 3. (5) The information signal is a digital signal including a timing signal, and the generating means takes out the timing signal and the processing means ( Claims 1 or 2 or 3, wherein the timing signal is controlled by the timing signal.
Reproduction device as described in section.