JPS60256948A - Tracking error signal detecting circuit - Google Patents

Abstract

PURPOSE:To detect a tracking error signal with high accuracy and simple constitution by utilizing a block synchronizing signal recorded on inclined magnetic tracks closed together. CONSTITUTION:Magnetic heads H1, H2 reproducing plural inclined magnetic tracks on a magnetic tape on which an information signal including a block synchronizing signal is recorded so as to form plural adjacent inclined magnetic tracks with different recording azimuth, circuits SD1, SD2 detecting the block synchronizing signal among reproducing information signals from each head, a circuit 14 detecting a phase difference of plural synchronizing detecting signals, a phase difference discriminating circuit 19 passing an output only when a phase difference detection output is within a prescribed phase difference range, and a circuit 23 operating means value based on the output of the circuit 19 are provided. Then a tracking error signal is obtained from the operated mean value.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a trunking error signal detection circuit suitable for application to digital VTRs and the like.

BACKGROUND TECHNOLOGY AND PROBLEMS First, the recording format of a conventional digital VTR will be explained. Since the signal band of a digital VTR is wide, for example, one field of digital video signal is divided into 5 parts in the NTSC system, 6 parts in the PAL or SECAM system, and 2 parts using each path. Recording was performed on a magnetic tape using magnetic heads having magnetic gaps having mutually different azimuths to form closely spaced magnetic tracks, and these tracks were then reproduced. Therefore, in such a digital VTR, for example, 180
There are two sets of rotating magnetic heads arranged with an angular division of °, and each set consists of two rotating magnetic heads arranged close to each other having magnetic gaps having different azimuths as described above. . Then, digital video signals are recorded on the magnetic tape by the two sets of rotating magnetic heads so as to alternately form inclined magnetic tracks, and the digital video signals are reproduced.

FIG. 1 shows inclined magnetic tracks T1 and T2 arranged close to each other and rotary magnetic heads H1 and H2 for reproducing the tracks. gt+g2 is a magnetic gap that makes the azimuth of the rotating magnetic head H1°B2 different. These inclined magnetic tracks T
1. The digital video signal to be recorded on T2 is divided into blocks, and after being encoded in units of one block or several blocks through an encoding circuit for error correction and a channel encoding circuit, the digital video signal is sent to the rotating magnetic head H1°. B2 and recorded on the recording magnetic tape, and its magnetic track T1. T2 is reproduced by a rotating magnetic head H11H2, and the reproduced signal is supplied to a channel decoding circuit and an error correction correction decoding circuit for decoding to obtain an original digital video signal.

In FIG. 1, BL is the inclined track Tl.

One block of the digital video signal recorded in T2 is shown, and B1. B2 is the magnetic track T1. The block synchronization signal of each block of T2 is shown. In the example of FIG. 1, block synchronization signals B1 . B2 is recorded with a predetermined phase difference in a steady state.

Of course, recording may be performed with a phase difference of 0 in a steady state.

Inclined magnetic track T1 in FIG. In T2, only the digital video signal was recorded, but as shown in FIG. 2, the inclined magnetic track T1. This is a case where most of the digital video signal (2) is recorded in T2, and the digital audio signal A is recorded at the rear end. In this case as well, the block synchronization signal Bs is also applied to the digital audio signal portion.

It is assumed that B2 is arranged in the same way as a digital video signal.

Such a tilted magnetic track T1. T2 has a considerably narrow width for high-density recording. Therefore, mistracking is relatively likely to occur during playback.

Therefore, the present applicant has previously proposed a method for detecting a tracking error signal by using synchronization signals having the same period, such as block synchronization signals recorded on inclined magnetic tracks adjacent to each other, as disclosed in Japanese Patent Application No. 57-71027. proposed a circuit.

Such a tracking error signal detection circuit reproduces a plurality of inclined magnetic tracks of a magnetic tape recorded such that information signals including synchronizing signals of the same period form a plurality of adjacent inclined magnetic tracks having different recording azimuths. A plurality of magnetic heads, an extraction circuit for extracting a synchronization signal from reproduction information signals from the plurality of magnetic heads, and a detection circuit for supplying a plurality of synchronization signals from the extraction circuit and detecting the phase difference thereof. The tracking error signal is obtained from this detection circuit.

An example in which this tracking error signal detection circuit is applied to a digital VTR will be described below with reference to FIG. In FIG. 3, H1 and B2 are rotating magnetic heads having magnetic gaps gx and g2 with different azimuths, and may be used only for reproduction or for both recording and reproduction. The reproduction signals from the rotating magnetic heads H1 and H2 are transmitted through a reproduction amplifier (lx),
(12) respectively. Regenerative amplifier (11), (1
The reproduced signal from 2) is transmitted to the bit synchronization circuit (21) and PL.
L (31). A clock signal (for example, 100 MHz) obtained from the PLL (3t) is supplied to this bit synchronization circuit (21), and a synchronized digital video signal is obtained on the output side of the six-pin regenerative amplifier (12). ) is similarly output from the bit-synchronized circuit (
22) and PLL (32). PLL (32
) The clock signal obtained from the bit synchronization circuit (22)
It is supplied to and supplied to. A synchronized digital video signal is then obtained at the output side of the bit synchronization circuit (22).

Since this is a case where the block synchronization signals Bl and B2 as shown in FIG. 1 or FIG. , bit synchronization circuit (2z), (2
2) The synchronized digital video signals and clock signals from , PLL (3s)-, and (32) are switched and supplied to the block synchronization signal extraction circuit (7). The changeover switch (4) has switches (5) and (6), and the switch (5) has a bit synchronization circuit (
2z), (22) and extracting circuit (7).
), and switch (6) supplies PLL (31), (32
) is switched and supplied to the extraction circuit (7). The block synchronization signals Bl' and B2 from the extraction circuit (7) are supplied to a detection circuit (8) that detects the phase difference between the synchronization signals.

The clock signal from the switch (6) is also sent to this detection circuit (8).
). The output from the extraction circuit (7) is supplied to the changeover switch (4) as a switching control signal, and the switches (5) and (6) are switched in conjunction. The output from the detection circuit (8) is supplied to the phase servo circuit (9), and the control signal from it is sent to the capstan motor αG).
The rotation of the magnetic heads H1 and H2 is controlled so as to accurately track the inclined magnetic trunks T1 and T2 during reproduction.

Next, the operation of the circuit shown in FIG. 3 will be explained with reference to FIG. 4A and 4B show block synchronization signals B1 and B2 extracted from the reproduction signals of the rotary magnetic heads H1 and H2 obtained by the block synchronization signal extraction circuit (7). Then, the block synchronization signals Bz and B2 are supplied to the detection circuit (8), and the phase difference between them is detected as a rectangular wave pulse as shown in FIG. 4C. The clock signal is supplied to the AND gate to obtain intermittent pulses as shown in Fig. 4, the number of which corresponds to the phase difference between the block synchronization signals B1 and B2. By supplying this intermittent pulse to the servo circuit (9), the capstan motor α is digitally controlled.

Note that each block synchronization signal B1. B2 is a rotating magnetic head H
1. If H2 moves in a direction perpendicular to the extending direction of the inclined magnetic tracks Ti, T2, resulting in mistracking,
When the phase of one block synchronization signal B1 lags, the phase of the other block synchronization signal B2 advances, and when the phase of block synchronization signal B1 advances, the phase of the other block synchronization signal B2 advances.
works differentially so that the phase of is delayed.

In the example shown in FIG. 3 described above, the synchronization signal extraction circuit (7) is shared and a changeover switch (4) is provided.
A separate extraction circuit (71) as shown in FIG.

(72) may also be provided. That is, in the example of FIG. 5, the synchronized digital video signal from the bit synchronization circuit (21) and the clock signal from the PLL (31) are supplied to the block synchronization signal extraction circuit (71), and the bit synchronization circuit ( The synchronized digital video signal from 22) and the clock signal from PLL (32) are supplied to the block synchronization signal extraction circuit (72), and the block synchronization signal extraction circuits (71) and (72) respectively The block synchronization signals B1. B2 is supplied to a detection circuit (8) that detects the phase difference. In this case, as described above, the adjacent gradient magnetic trunks T1.
Even if the phase difference of the block synchronization signal Bi+82 recorded in T2 is a predetermined value or zero in a steady state, it can be adopted.

By the way, the block synchronization signal extraction circuit 7) in the tracking error signal detection circuit of FIGS. 3 and 5 proposed above is a circuit whose circuit size is also important for a digital VTR, and in reality, Eliminate spurious signals, use an error correction circuit for the synchronization signal pattern (perform error correction by considering the relationship between previous and subsequent synchronization data, interval between synchronization signals, past and future history of synchronization data, etc.), etc. To achieve this goal, a complex and large-scale circuit configuration is adopted.

However, the block synchronization signal extracting circuit for obtaining the tracking error signal only needs to be able to accurately detect the phase difference between the block synchronization signals of two channels, and does not need to precisely detect the block synchronization signal itself.

Purpose of the Invention In view of the above points, the present invention is capable of detecting a highly accurate tracking error signal with a simple configuration by using block synchronization signals recorded on inclined magnetic tracks close to each other. This is an attempt to propose a circuit.

SUMMARY OF THE INVENTION A tracking error signal detection circuit according to the present invention detects a plurality of inclined magnetic tracks of a magnetic tape recorded such that information signals including a block synchronization signal form a plurality of closely spaced inclined magnetic tracks having different recording azimuths. a synchronization detection circuit that detects a block synchronization signal from among the reproduction information signals from the plurality of magnetic heads; and a synchronization detection circuit that supplies a plurality of synchronization detection signals from the synchronization detection circuit and detects the phase difference between them. A phase difference detection circuit that detects the phase difference, a phase difference discrimination circuit that supplies the phase difference detection output of this phase difference detection circuit and passes it only when it is within a predetermined phase difference range, and a phase difference discrimination circuit that supplies the output of this phase difference detection circuit. A tracking error signal is obtained from this average value calculation circuit.

According to the present invention, it is possible to obtain a circuit that can detect a highly accurate tracking error signal with a simple configuration by using block synchronization signals recorded on inclined magnetic tracks that are close to each other. I can do it.

Embodiment Below, with reference to FIG. 6, an embodiment in which a tracking error signal detection circuit according to the present invention is applied to a digital VTR will be described in detail along with its operation.

In FIG. 6, H1 and H2 are rotary magnetic heads having magnetic gaps gx+g2 of different azimuths as shown in FIGS. 1 and 2, and may be used only for reproduction or for both recording and reproduction. Reproduction signals from the rotary magnetic heads H1 and H2 obtained by scanning the inclined magnetic track of FIG. 1 or 2 are supplied to reproduction amplifiers (11) and (12), respectively.

Regenerative signals from the regenerative amplifiers (11) and (12) are supplied to the bit synchronization circuit (21) and PLL (3rd stage).

By supplying a clock signal (for example, 100 MHz) obtained from the PLL (3z) to this bit synchronization circuit (21), a synchronized digital video signal is obtained at its output side. Also, the output from the regenerative amplifier (12) is similarly connected to the bit synchronization circuit (22) and the PLL (32).
). The clock signal obtained from the PLL (32) is supplied to the bit synchronization circuit (22). A synchronized digital video signal is then obtained at the output side of the bit synchronization circuit (22).

The digital video signals from the bit synchronization circuits (2z) and (,22) are transferred to shift registers (lli) and (112) which constitute synchronization detection circuits SDz and SO2, respectively.
and shifted by clock signals from PLL (3s) and (32), respectively. (121).

(122) is a bit pattern generation circuit for a block synchronization signal of a predetermined bit that constitutes the synchronization detection circuits Slh and SO2, respectively, and the comparison circuits (13z) and (132) that constitute the synchronization detection circuits SDt and SO2, respectively The parallel output of the same predetermined bit from the shift register (lb), (112) and the bit pattern generation circuit (1
The parallel outputs of (2s) and (122) are compared bit by bit, and when all of the predetermined bits match, a block synchronization signal detection pulse is supplied to each phase difference detection circuit (14).
). In the phase difference detection circuit (14),
The RS flip-flop circuit is triggered by the block synchronization signal detection pulse from the comparison circuit (13z) and (132), and the rectangular wave from this flip-flop circuit is supplied to the AND circuit, which is then connected to the block synchronization signal generator (15). ), a number of pulses corresponding to the phase difference between the block synchronization signal detection pulses from the comparator circuits (!31) and (132) are obtained, and these are counted by a 12-bit counter. Ru.

The count value A (12-digit binary value) of the counter of the phase difference detection circuit (14) is supplied to the subtracter (16), and the reference value B (12-digit binary value) from the reference value generator (17) is supplied to the subtracter (16). binary value)
is subtracted and the resulting value C (=A-B) (12-digit binary value)
is output. Note that this reference value B is the control circuit (18)
The reference value B is set so that C=25=32 when tracking of the magnetic heads H1 and H2 is achieved.

Of the 12 parallel bits output from the subtracter (16), the output of the lower 6 bits is supplied to the launch circuit (2o) that constitutes the phase difference discrimination circuit (19), and the output of the upper 6 bits and 1 bit are The borrow output is the wind signal generation circuit (21)
supplied to Further, the waveform-shaped detection pulse of the block synchronization signal detection pulse from the comparator circuit (13x) or (132) from the phase difference detection circuit (14) is combined with the wind signal from the window signal generation circuit (2I) to It is supplied to the circuit (22). Note that this detection pulse is also supplied to the subtracter (16) as a synchronization control pulse. The window signal generation circuit (21) outputs "1" when both 7-bit parallel input signals are "0", and otherwise outputs "1".
0" is output. Therefore, the window signal generation circuit (21
) is "1", the detection pulse from the phase difference detection circuit (14) is supplied as a latch pulse to the latch circuit (20) through the AND circuit (22). That is, it is latched only when the input value to the latch circuit (20) is within the range of 0 to 64, and is not latched when it exceeds this range.

The output of the latch circuit (20) of the phase difference discrimination circuit (19) is supplied to the average value calculation circuit (23), and the average value of, for example, 16 samples is calculated. Furthermore, the AND circuit (22
), the calculation of the average value calculation circuit (23) is also stopped.

The average value output (6-bit parallel output) from the average value calculation circuit (23) is supplied to the selection circuit (25) of the protection circuit (24). The detection pulse from the AND circuit (22) is supplied to the retrigger monostable multivibrator (26) constituting the protection circuit (24), and the time constant of this monostable multivibrator (26) is selected to be sufficiently long. Under normal conditions, a monostable multivibrator (2
6) is always "1", and when the VTR starts up after power is turned on, or when the magnetic tape is not genuine, the AND circuit (22) cannot output for a long time and the output becomes "0". becomes. The selection circuit (25) is controlled by the output of this monostable multivibrator (26), and when the output of the monostable multivibrator (26) is "1", the output of the average value calculation circuit (23) is controlled by the selection circuit. (25
), and when rOJ, the reference value 2'=32 from the reference value generation circuit (27) forming the protection circuit (24) passes through the selection circuit (25).

The parallel 6-bit output of the selection circuit (25) of the protection circuit (24) is supplied to the D/A converter (29) via the output buffer amplifier (28) and converted into an analog signal. It is supplied to the capstan motor αl via the phase servo circuit (9), and its rotation is controlled.
During reproduction, the rotating magnetic track H1°H2 is tilted to the magnetic track T1. Controlled to accurately track T2. Also, the output of the selection circuit (25) is sent to the display drive circuit (30).
The tracking condition is digitally displayed.

According to the present invention described above, it is possible to obtain a circuit that can detect a highly accurate tracking error signal with a simple configuration by using block synchronization signals recorded on inclined magnetic tracks that are close to each other. be able to.

Therefore, highly accurate tracking servo becomes possible.

In the above description, the present invention is applied to a digital VTR, but it can also be applied to an analog VTR.
It can also be applied to recording/reproducing devices for digital or analog audio signals, regardless of the type of information signal.

Also, tracking servo control is achieved by attaching a rotating magnetic head to a rotating drum or rotating disk via an electro-mechanical converter such as a bimorph, and controlling the electro-mechanical converter using the tracking error signal obtained as described above. You can also do

Effects of the Invention According to the present invention described above, a highly accurate trunking error signal can be detected with a simple configuration by using block synchronization signals recorded on inclined magnetic tracks close to each other. It is possible to obtain a circuit that can do this.

[Brief explanation of drawings]

1 and 2 are diagrams showing the magnetic trunk pattern and magnetic head in a conventional digital VTR, FIG. 3 is a block diagram showing an example of the previously proposed trunking error signal detection circuit, and FIG. is a waveform diagram, FIG. 5 is a block diagram showing another example of the tracking error signal detection circuit proposed earlier, and FIG. 6 is a block diagram showing one embodiment of the tracking error signal detection circuit according to the present invention. . T1. T2 is a tilted magnetic track, Hl and H2 are multiple magnetic heads, SDl and SO2 are synchronization detection circuits, (14)
is a phase difference detection circuit, (19) is a phase difference discrimination circuit, (
23) is an average value calculation circuit. Figure 1 Figure 3 I

Claims (1)

[Claims] a plurality of magnetic heads for reproducing the plurality of inclined magnetic tracks of a magnetic tape on which information signals including block synchronization signals are recorded so as to form a plurality of adjacent inclined magnetic tracks having different recording azimuths; a synchronization detection circuit that detects the block synchronization signal from a reproduced information signal from the head; a phase difference detection circuit that supplies a plurality of synchronization detection signals from the synchronization detection circuit and detects a phase difference therebetween;
It has a phase difference discrimination circuit which supplies the phase difference detection output of the phase difference detection circuit and allows the phase difference to pass only when it is within a predetermined phase difference range, and an average value calculation circuit to which the output of the phase difference discrimination circuit is supplied. A tracking error signal detection circuit characterized in that a tracking error signal is obtained from the average value calculation circuit.