JPS60254492A - Quantum interference type josephson memory cell - Google Patents

Abstract

PURPOSE:To improve the operation margin of the writing and reading operation of the memory cell by providing a capacitance in parallel to the Josephson junction of a single magnetic flux quantum memory cell. CONSTITUTION:Capacitances 30 and 31 are formed between a counter electrode 32 and a base electrode 26 iin parallel to Josephson junction parts 27 and 28. Namely, the capacitances 30 and 31 are adjacent to the Josephson junction parts 27 and 28 and are on the base electrode 26, so they are formed by arranging insulating films between the counter electrode 32 and base electrode 26. Consequently, the design of the Josephson junction parts is given a degree of freedom.

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical field of the invention The present invention relates to a memory cell using a Josephson element, and in particular to improving the operating margin of a single flux quantum memory cell that utilizes the magnetic flux mode of a quantum interference element. Regarding.

(2) Background of the Technology With the invention of the Josephson element, there is a desire to develop a Josephson computer that is faster, smaller, and consumes less power. In particular, memory needs to have a small footprint, low power consumption, and a large operating margin.

(3) Prior Art and Problems As a Josephson memory that satisfies the above conditions, there is a conventional bridge type single flux quantum memory.

FIG. 1 is a sectional view of a memory cell on an LSI substrate of such a memory. An insulating film 2 is deposited on a ground plane 1, and a base electrode 3 of a memory cell is formed thereon. Then, tunnel oxide films 4, 5 and insulating films 6, 7.8 made of a lead oxide film or the like for Josephson junction are formed thereon, and furthermore, a counter electrode 9 is formed thereon. The counter electrode 9 is covered with an insulating film 10, and a control line 11 is formed on the insulating film 10. In such a single flux quantum memory cell, the base electrode 3, the counter electrode 9 and the two Josephson junctions 4.5 are connected to the insulating film 6.
The two Josephson junctions 4 and 5 are connected in parallel via this inductance bridge to form a superconducting loop.

FIG. 2 shows the equivalent circuit. The terminal 12 side is the counter electrode 9 in FIG. The terminal 13 side corresponds to the base electrode 3, and inductances 14 and 15 formed by an inductance bridge surrounding the insulating film 6 are connected to the Josephson junctions 4 and 5, respectively. Also the first
Control line 11 in the figure is connected to terminals 16 and 17 in FIG.
and an inductance 18 between the counter electrode 9 and the opposite electrode 9.
and 19 are formed. With this structure, a superconducting loop is formed between the terminals 12 and 13.

In a single magnetic flux quantum memory cell having the above structure, a bias current flowing between terminals 12 and 13;
By manipulating the control current flowing between terminals 16 and 17, a persistent current is caused to flow in the superconducting loop between terminals 12 and 13. This persistent current forms a magnetic flux between the superconducting loops, and this magnetic flux takes a value that is an integral multiple of the minimum magnetic flux unit called a magnetic flux quantum. In other words, the bias current flows between the counter electrode 9 and the substrate electrode 3 in FIG.

By manipulating the control current flowing through the control line 11, the persistent current flowing through the superconducting loop can be controlled. Accordingly, the number of magnetic flux quanta confined within the insulating film 6 surrounded by the inductance bridge can be controlled. The bridge type single magnetic flux quantum memory cell has a binary number "l" depending on the presence or absence of magnetic flux quanta in the insulating film 6.
Or, it is a memory structured to store "'0".

Next, the operation of this memory cell will be explained with reference to FIG.

The portion of the Josephson junction 4 or 5 in FIG. 1 can assume two states when a bias current is flowing from the counter electrode 9 to the base electrode 3. One is a zero voltage state in which no voltage is generated across the junction, and the other is a voltage state in which voltage is generated across the junction. The bias current that gives the dark values of these two states is called a critical current, and this critical current changes depending on the control current flowing through the control line 11 (FIG. 1). The curves represented by solid lines 20 and 21 in FIG. 3 show the dark value characteristics. As you can see from this diagram,
The critical current changes periodically with respect to the control current. This is because each time a magnetic flux quantum is taken into the insulating film 6 surrounded by the inductance bridge, the partial phase difference of the Josephson junction 4 or 5 changes by 2π, and the same state is reproduced. When the operating point of the memory cell is within the central mountain surrounded by the curve 2° and the broken line 22, the superconducting loop formed by the counter electrode 9, the Josephson junction 4.5, and the base electrode 3 has almost no power. No persistent current flows, and no magnetic flux quanta exist in the insulating film 6. When the operating point is within the mountain on the right surrounded by the curve 21 and the broken line 23, a persistent current flows through the superconducting loop, and one magnetic flux quantum is taken into the insulating film 6. In a single magnetic flux quantum memory cell, the operating point of the memory cell is between the center peak and the right peak, and the state where no magnetic flux quantum is inside the insulating film 6 is a binary number "0", and the operating point is between the right peak and the right peak. The state in which there is one magnetic flux quantum in the mountain and one in the insulating film 6 corresponds to the binary number "1". Writing a ``0'' or ``1'' to a memory cell can then be done by moving the operating point across the dashed lines 22 or 23, at the center without changing the voltage state of the Josephson junction 4 or 5 (FIG. 1). A transition is made between the peak and the peak on the right (MB magnetic flux mode transition in Fig. 3).

Further, reading is performed by changing the voltage state of the Josephson junction 4 or 5 by making the operating point cross the solid line 20 or 21 (MY in FIG. 3 indicates voltage transition). Specifically, first, a direct current is applied to the control line 11 (FIG. 1), and the operating point is set at point a in FIG. 3. In order to write "1" in this state, the control line 11 and the counter electrode 9. By controlling the current between the base electrodes 3, the operating point is set to a-
Move to +-b-d point. As a result, one magnetic flux quantum is written into the memory cell, and even if the operating point and the point a are then set, the memory cell remains in the ``1'' state because it does not go beyond the peak on the right. Similarly, to write 'o',
All you have to do is move the a-1-c-16 points and the operating point and place the operating point in the central mountain. When reading next time, the operating point is moved from point a to f to point e. If 0” is written in the memory cell, the operating point is the solid line 2 of the mountain in the center.
0 is not crossed, the voltage across the Josephson junction 4 or 5 (FIG. 1) remains at zero voltage. If PA 1°' is rewritten into the memory cell, the operating point crosses the solid line 21 of the right mountain (both Josephson junctions 4 or 5?
A voltage appears at IjjA. This allows reading.

In a single-flux quantum memory cell that operates as described above, the current value 1cr (dark blue axis in Figure 3) that provides the boundary between magnetic flux mode transition and voltage transition in write and read operations is mainly caused by Josephson junction 4 or It is determined by the nonlinear conductance and junction capacitance that appear in the voltage state of 5. Since the current value when moving the operating point to point a-+f changes depending on the value of Icr, determining the boundary current 1cr at the time of designing the memory cell is a very important element. However, as mentioned above, Icr is determined by the characteristics of the Josephson junction, and these characteristics are determined by the material and thickness of the tunnel oxide film forming the Josephson junction, which limits the degree of freedom when designing memory cells. There was a problem with this.

(4) Purpose of the Invention In order to eliminate the above-mentioned problems, the present invention provides a capacitance in parallel with the Josephson junction in a single-flux quantum memory cell using a quantum interference device, so that the above-mentioned boundary current value Icr
An object of the present invention is to provide a single flux quantum memory cell that can improve the operating margin in memory operation.

(5) Structure of the Invention The object of the present invention is to provide a single-magnetic An object of the present invention is to provide a quantum interference type Josephson memory cell, which is characterized in that a capacitance element is connected in parallel to each di-J Seson junction.

(6) Examples of the invention Examples of the present invention will be described in detail below.

FIG. 4 is a cross-sectional view of one embodiment of a single flux quantum memory cell according to the present invention. An insulating film 25 is deposited on the ground plane 24, and a base electrode 26 of the memory cell is formed thereon. On the base electrode 26 are tunnel oxide films 27, 28 . Insulating film 29 and capacitance 330.31 are formed, and counter electrode 32 is further formed thereon. The counter electrode 32 is covered with an insulating film 33, and a control line 34 is formed on the insulating film 33.

The difference between the present invention and the conventional example is that the present invention provides Josephson junctions 27 and 2 between the counter electrode 32 and the base electrode 26.
8 is formed in parallel with capacitances 30 and 31. Namely.

Since the capacitors 30 and 31 are adjacent to the Josephson junctions 27 and 28, respectively, and are formed on the base electrode 26, they are formed by disposing an insulating film between the counter electrode 32 and the base electrode 26. . Since the other parts are the same as those of the conventional example, the equivalent circuit has a structure in which two capacitors are connected in parallel to the Josephson elements 4 and 5 of the conventional example shown in FIG. At this time, the capacitance 30.31 is made of an oxide film made of the same material as the Josephson junction 27.28, and the thickness is appropriately adjusted to several hundred angstroms to prevent tunneling effects, and its area is also determined appropriately. By doing so, we can design their capacitance values. (The thickness of the Josephson junction 27, 28 is several tens of angstroms.) Alternatively, other abrasive dielectrics can be used in a similar manner.

By providing a capacitance in parallel with the Josephson junction in this way, flexibility can be gained in the design of the Josephson junction, thereby reducing the voltage and flux mode transitions that are problematic in the prior art. Boundary current [
The value of cr can be controlled. This makes it possible to improve the operating margin of the memory cell.

The embodiment shown in FIG. 4 is a case in which the present invention is applied to a bridge type memory cell, but if the basic principle of providing a capacitance in parallel to the Josephson junction is followed, it can also be applied to other Brainer type memory cells. Applicable.

(7) Effects of the Invention According to the present invention, by providing a capacitance in parallel with the Josephson junction of a single flux quantum memory cell, the value of the boundary current 1cr of voltage transition and flux mode transition can be adjusted to the design of the Josephson junction. can be controlled independently,
This makes it possible to improve the operating margin for memory cell write and read operations.

[Brief explanation of drawings]

Figure 1 is a cross-sectional view of a conventional single-flux quantum memory cell;
3 is an equivalent circuit diagram of a single-flux quantum memory cell, FIG. 3 is a diagram of operating characteristics of a single-flux quantum memory cell, and FIG. 4 is a cross-sectional view of a single-flux quantum memory cell according to the present invention. 26...Base electrode, 27.28...Josephson junction, 30.31...Capacitance, 32...
・Counter electrode, 34... Control line, Icr... Boundary current, M...
・Magnetic flux mode transition, Mv...voltage transition. Representative Patent Attorney Calibration Koshibe 1. ．． ；：：、 Madarasagi'j
Figure 1 Figure 2 Figure 3 Figure 4

Claims (3)

[Claims] (1) In a single magnetic flux quantum memory cell consisting of a quantum interference device in which at least two Josephson junctions formed on a base electrode are connected in parallel via an insulating film, a capacitance is connected in parallel to each Josephson junction. A quantum interference type Josephson memory cell characterized by connecting elements. (2) The quantum interference type Josephson memory cell according to claim 1, wherein the capacitance element is formed close to each Josephson junction. (3) The quantum interference type Josephson memory cell according to claim 1, wherein the capacitance element is formed on the base electrode.