JPS60253316A - Voltage-to-frequency converting circuit for n-root output - Google Patents

Abstract

PURPOSE:To convert a voltage signal into a desired frequency signal with high accuracy through a simple constitution, by providing an output circuit at the output side of an integration circuit of the final stage to change the ouput level of the output circuit itself and adding a switch element to each integration circuit to clear the output of these integration circuits. CONSTITUTION:The 1st and 2nd integration circuits 10-1 and 10-2 are connected in series, and a comparator 14 is connected to the output side of the circuit 10-2. A pulse signal CO is delivered from a one-shot pulse generating circuit when the output of the comparator 14 is set at an H level. Then the outputs of both circuits 10-1 and 10-2 are cleared, and the output of the comparator 14 is set again at an H level to obtain an output frequenecy (fs) proportional to the square root of a voltage signal (el). Thus the effects of the offset voltage of operational amplifiers 11 and 13 are reduced compared with a conventional case. Then the signal (el) can be converted into a frequency signal (fs) which is proportional to a square root with high accuracy.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an n-th root output voltage-frequency conversion circuit that converts an input voltage into a frequency signal proportional to the n-th root.

[Technical background of the invention]

For example, when measuring the effective values of voltage and current,
A square root output voltage-frequency conversion circuit that converts a voltage signal obtained by detecting a current into a frequency signal proportional to the square root is applied. FIG. 1 is a block diagram of a conventional square root output voltage-frequency conversion circuit. The operation of this conversion circuit is as follows. That is, when the voltage signal ea is input to the logarithmic conversion circuit 1, the logarithmic conversion circuit 1 logarithmically converts the voltage signal e8 and outputs a signal such that togea=eb to the attenuator 2. The attenuator 2 attenuates the level of the input signal ebe to 1/2 and outputs it. That is, "(3b-'togeIL=toge,"=60・-・
(1) A signal ec of 2 is sent to the anti-logarithmic conversion circuit 3. The anti-logarithmic conversion circuit 3 obtains a signal e,1 proportional to the square root of the voltage signal ea input to the p-logarithmic conversion circuit 1 by performing anti-logarithmic conversion on the input signal ec. Tsu'ishi, signal ed
is f3d= arc Log (3o=e@Y,=<2)
becomes. Then, the voltage-frequency converter 4 receives this signal 6d, converts it into a frequency signal ef proportional to the voltage level of the signal e, 1, and outputs it.

Therefore, this frequency signal ef is proportional to the square root of the voltage signal e1.

[Problems with background technology]

As described above, in order to obtain a frequency signal proportional to the square root, the conventional conversion circuit must have a multi-stage circuit configuration consisting of a logarithmic conversion circuit 1, an attenuator 2, an anti-logarithm conversion circuit 3, and a voltage-frequency converter 4. No. For this reason, the number of components constituting the circuit increases, and it becomes susceptible to the influence of the offset voltage of the operational amplifier used in each of the circuits 1 to 4. However, in the conventional conversion circuit, the obtained frequency signal includes an error amount of the offset voltage, making it impossible to perform highly accurate conversion.

Further, there are cases where it is desired to obtain a frequency signal proportional to not only the square root but also the n-th root (mainly the cubic root).

In this case, for example, the attenuation rate of the attenuator 2 may be changed, but even in this case, it is affected by the offset voltage.

[Purpose of the invention]

The present invention has been made based on the above-mentioned circumstances, and an object of the present invention is to provide a simple configuration, reduce the influence of offset voltage, and accurately convert a voltage signal to a frequency proportional to the desired n-th root. An object of the present invention is to provide a voltage-frequency conversion circuit for outputting an n-th root that can be converted into a signal.

[Summary of the invention]

The present invention provides n stages of integrator circuits in series, and includes an output circuit on the output side of the final stage of the integrator circuit that changes its own output level when the output level of this integrator circuit reaches a predetermined level; Each of the integrating circuits is provided with a switching element that opens and closes in response to the output level of the output circuit and clears the output of each of the integrating circuits, and repeats the opening and closing operations of these switching elements. This is an n-th root output voltage-frequency conversion circuit that outputs a frequency signal proportional to the n-th root of the input voltage to the integrating circuit.

[Embodiments of the invention]

Hereinafter, a first embodiment in which the n-th root output voltage-frequency conversion circuit according to the present invention converts into a frequency signal proportional to the square root will be described with reference to FIGS. 2 and 3. FIG. 2 is a configuration diagram of a voltage-frequency conversion circuit for n-th root (square root) output of the present invention. In FIG. 2, 10-1 is a first integrating circuit, 10-2 is a second integrating circuit,
These integrating circuits 10-1 and 10-2 are connected in series as shown in FIG. Specifically, the circuit configuration is as follows. In other words, the gl integration circuit 10-1 is
A resistor R1 is connected between the inverting input terminal of the operational amplifier 11 and the input terminal 12, and a capacitor C1 is connected between the output terminal and the inverting input terminal of the operational amplifier 11. Further, the second integrating circuit 10-2 has a resistor R between the inverting input terminal of the operational amplifier 13 and the output terminal of the operational amplifier 11, similarly to the first integrating circuit 10-1.
2 is connected, and a capacitor C2 is connected between the output terminal and the inverting input terminal of the operational amplifier 13.

The output terminal of the operational amplifier 13 is used as an output circuit. It is connected to the non-inverting input terminal of the regulator 14. The positive side of a DC voltage source 15, which is a predetermined voltage level source, is connected to the inverting input terminal of this converter/four regulator 14, and the output terminal of the DC voltage source 15 is connected to the output terminal.
6 is connected. This pulse generation circuit 16 maintains the rHJ level for a certain period of time in synchronization with the rise of the output signal of the comparator 14.
The pulse width of each integrating circuit 10-
1. The integration time of 10-2 is also set to a sufficiently short period. Therefore, this one 7 day dots tors generation circuit 1
The frequency of the /4' pulse signal output from 6 is the input terminal 1.
The value is proportional to the square root of the voltage signal e10 applied to 2.

Further, the first and second integrating circuits 10-1゜10-2
Each capacitor CI, C2 is provided with a clearing switch S1. S2 are connected in parallel. These clearing switches S1.82 are normally open, and are controlled to be closed by a pulse signal outputted from the one-shot pulse generation circuit 16 to each integrating circuit 10-1.10-.
This clears the output of 2.

Next, the operation of the conversion circuit configured as described above will be explained. When a voltage signal e1 as shown in FIG. 3 is applied to the input terminal 12 at time t1, this voltage signal e
It is integrated by the integrating circuit 10-1 and output. wife,! 1) The output signal e2 of the first integrating circuit 10-1 is 0.15 m, and its waveform is as shown in FIG.

Furthermore, this output signal e2 is again integrated by the second integrating circuit 10-2. Accordingly, the second integrating circuit 1
The output signal θ0 of 0-2 is “J e o-RJ, cz e' d 1-281・R
It changes according to the relationship: 2・Cノ・C2t”−(4).

Then, this output signal e. is input to the non-inverting input terminal of converter 9/14, and this output signal e. When the voltage level Ervca of the DC voltage source 15 becomes the voltage level Ervca, the output of the comparator 14 becomes inversely Ik and becomes the rHJ level. In this way, when the output of the regulator 14 reaches the rHJ level, the one-shot and pulse generation circuit 16 outputs "H".
A pulse signal Co having a predetermined pulse width is output in synchronization with the rise of the level. However, when this pulse signal CO is output, each clearing switch S1. S2 is
It is in a closed state only during the normal pulse width period of the negative pulse signal co.

Then, the first and second integrating circuits 70-1.10
The output level of -2 becomes "zero" and is cleared. Then, the same operation as described above is performed again, and the one-shot pulse generation circuit 16 outputs the i4 pulse signal CO.

By the way, in the conversion circuit shown in FIG. 2, the period until the output signal e0 of the second integrating circuit 10-2 reaches the voltage level Er is one cycle.

Therefore, by subtracting this period t, the period t becomes e0=Er=t2 (5) 2RI・R2・C1・C2. Therefore, the frequency f is as follows. From this equation (7), the output frequency f3 of the comparator 14, that is, the output frequency f8 of this conversion circuit has a value proportional to the square root of the voltage signal el. Therefore,
If the voltage level of the voltage signal e becomes higher at time t2, the output frequency flll increases accordingly.

In this way, in the conversion circuit of the present invention, the first and second integrating circuits 10-1, 10 . -2 are connected in series, and a comparator/mother 14 is further connected to the output side of the second integrating circuit 10-2, and when the output of this comparator 14 becomes "H" level, one-sea r y ) t9 pulse is generated. The generating circuit 16 outputs the master pulse signal CO, clears the outputs of the first and second integrating circuits 10-1 and 10-2, and sets the output of the converter 14 to "H" level again to increase the voltage. Since an output frequency fs proportional to the square root of the signal e1 is obtained, the circuit configuration is simpler than the conventional conversion circuit. That is, the second integrating circuit 1 shown in FIG.
The voltage-frequency converter 4 shown in FIG. Therefore, the conversion circuit shown in FIG. 2 has a simple configuration in which a voltage-frequency converter is provided with a first integrating circuit 10-1 and a switch S. By simplifying the configuration in this way, the operational amplifier 1
The influence of the offset voltage of 1.13 is reduced, and the voltage signal e can be converted into a frequency signal f8 proportional to the square root with high accuracy.

Next, the second voltage-frequency conversion circuit for n-th root output of the present invention
An example of this will be described with reference to FIG. The conversion circuit shown in Fig. 4 is constructed by connecting n stages of integrating circuits with the same circuit configuration in series to convert the voltage signal e and 1 into a frequency signal f1 proportional to the n-th root.
The configuration is such that it can be converted into That is, in FIG. 4, 20-1 to 20-n are integrating circuits, and 9
, s, z ~ SBn is one-sono, /tono9 pulse generation circuit 2
This is a clearing switch that is closed by the reference pulse signal outputted from 1 and clears the output of each of the integrating circuits 20-1 to 20-n. Note that 21-1 to 21-n are operational amplifiers, RJ to Ran are resistors, and Ca1 to Can are capacitors.

Therefore, as in the above embodiment, each of the integrating circuits 20-1 to 20-2
Find the formula that indicates the output of 0n and find the output frequency of the converter f regulator 22! , then this output frequency f is .

...(8) It is expressed as follows. As can be seen from equation (8), if n stages of integrating circuits 20-1 to 20-n are connected in series, the signal can be converted into a frequency signal proportional to the n-th root. However, when n is an even number, the positive side of the DC voltage source 23 is connected to the inverting input terminal of the commutator 22, as shown in FIG. Connected to the inverting input terminal. Therefore, if n is an odd number, the one-zoyot-no-gurus generation circuit 21 will use Hun i! rater 22
A nogle signal is output in synchronization with the fall of the output when it reaches the rLJ level.

However, in the above embodiment, the first and second integrating circuits 10
-1.1o-2@It was applied to a single-slope voltage-to-frequency conversion method that is cleared by the opening/closing operation of switch SL and 82, but this conversion circuit converts the voltage signal input to the first-stage integrating circuit into two-man power of both positive and negative polarities. It can also be applied to a double slope voltage-frequency conversion method.

〔Effect of the invention〕

According to the present invention, there are integrating circuits connected in series in n stages, an output circuit provided on the output side of the final stage integrating circuit, and an output circuit that opens and closes according to the output level of this output circuit to clear the output of each integrating circuit. The n-th root output has a simple configuration because it consists of a switching element, and can reduce the influence of offset voltage and convert a voltage signal into a frequency signal proportional to the desired n-th root with high precision. It is possible to provide a voltage-frequency conversion circuit for

[Brief explanation of drawings]

FIG. 1 is a block diagram of a conventional square root output voltage-frequency conversion circuit, FIG. 2 is a block diagram showing a first embodiment of the n-th root output voltage-frequency conversion circuit according to the present invention, and FIG. 2 is a diagram for explaining the conversion operation of the conversion circuit shown in FIG. 2, and FIG. 4 is a configuration diagram showing a second embodiment of the n-th root output voltage-frequency conversion circuit according to the present invention. DESCRIPTION OF SYMBOLS 10-1... First integration circuit, 10-2... Second integration circuit, 14... Converter/9 regulator, 15... DC voltage source, 16... One-shot pulse generation circuit , 81
．． 82... Clear switch. Applicant's agent Patent attorney Takehiko Suzue Figure 1 Figure 2 S Figure 3 tl 12

Claims (1)

[Claims] a plurality of integrating circuits connected in n stages in series; an output circuit that changes its own output level when the output level of the final stage of these integrating circuits reaches a predetermined level; and each of the plurality of integrating circuits. and a plurality of switching elements that are controlled to open and close according to the output signal level of the output circuit to clear the output of the integrating circuit, and by repeating the opening and closing operations of the switching elements, the first stage integral is output from the output circuit. A voltage-frequency conversion circuit for nth root output, characterized in that it outputs a frequency signal proportional to the nth root of an input voltage of the circuit.