JPS60246693A - Hybrid integrated circuit - Google Patents

Hybrid integrated circuit

Info

Publication number
JPS60246693A
JPS60246693A JP10308784A JP10308784A JPS60246693A JP S60246693 A JPS60246693 A JP S60246693A JP 10308784 A JP10308784 A JP 10308784A JP 10308784 A JP10308784 A JP 10308784A JP S60246693 A JPS60246693 A JP S60246693A
Authority
JP
Japan
Prior art keywords
integrated circuit
hybrid integrated
fixing pad
substrate
ptc
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10308784A
Other languages
Japanese (ja)
Other versions
JPH0365671B2 (en
Inventor
正和 山岸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP10308784A priority Critical patent/JPS60246693A/en
Publication of JPS60246693A publication Critical patent/JPS60246693A/en
Publication of JPH0365671B2 publication Critical patent/JPH0365671B2/ja
Granted legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (イ) 産業上の利用分野 本発明は混成集積回路、特にPTC装(5を組み込んだ
混成集積回路に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a hybrid integrated circuit, and particularly to a hybrid integrated circuit incorporating a PTC device (5).

(o)従来技術 多くの専敵性物質の固有抵抗し融成に従って変化するこ
とはよく知られており、特定の温度範囲以上におい℃固
有抵抗が急激に増大するような専1i;物躍、は通常、
止V1−の温度係数(以下PTCと称す)物質として称
されている。P T C装置はこの正の温度抵抗係数を
有するPTC物aを含h、ある温度を超えると高抵抗状
伸に変換される↑h気機器である。PTC物質の例とし
て、チタン酸バリウムのようにドープされたセラミック
()とか、導電性のポリマー材たとえば特殊な導電性を
有するフィラーを散在させて成るポリマー材等がある。
(o) Prior art It is well known that the resistivity of many proprietary substances changes as they melt, and the specific resistance of specific substances rapidly increases above a certain temperature range; usually,
It is referred to as a temperature coefficient (hereinafter referred to as PTC) material with a temperature coefficient of V1-. A PTC device is a device that includes a PTC material having a positive temperature resistance coefficient, and is converted into a high-resistance elongation when a certain temperature is exceeded. Examples of PTC materials include doped ceramics, such as barium titanate, and conductive polymeric materials, such as polymeric materials interspersed with special conductive fillers.

しかし斯るPTC装置i’5は特開昭56−3211t
37号公報に示される様に完成品として組み\′1tて
利用されるのが通常の方法であろう従ってIC化の要望
に答えるために混成集積回路に組み込むことはその形状
から不可能であった。
However, such PTC device i'5 is manufactured by Japanese Patent Application Publication No. 56-3211t.
As shown in Publication No. 37, the normal method would be to assemble it as a finished product and use it. Therefore, due to its shape, it would be impossible to incorporate it into a hybrid integrated circuit to meet the demand for integrated circuits. Ta.

(ハ)発明の目的 本発明は斯点にシーみてなされ、PTC装置べを組み込
んだ混成集積回路を実現することを目的とする。
(c) Purpose of the Invention The present invention has been made in view of this point, and an object thereof is to realize a hybrid integrated circuit incorporating a PTC device.

に) 発明の構成 本発明に依れば、良熱伝導性金属基板と該基也上に設け
た絶縁薄層と該絶8.薄層上に設けた導電路及び発熱抵
抗体を具備する混成集積回路に於いて、前記発熱抵抗体
の近傍の前記基板上に前記導電路を延在して固着パッド
を設け、該固着パッドに正の弧度係数を有するPTC物
質より成るPTC素子の取付電極を接続し、前記発熱抵
抗体の発熱を前記基板、固着パッドおよび取付電極を介
して検知する様に構成されている。
8) Structure of the Invention According to the present invention, a metal substrate with good thermal conductivity, a thin insulating layer provided on the metal substrate, and an insulating layer formed on the metal substrate. In a hybrid integrated circuit comprising a conductive path and a heating resistor provided on a thin layer, a fixing pad is provided by extending the conductive path on the substrate near the heating resistor, and a fixing pad is provided on the fixing pad. A mounting electrode of a PTC element made of a PTC material having a positive arc coefficient is connected to the PTC element, and the heat generation of the heating resistor is detected through the substrate, the fixing pad, and the mounting electrode.

(ホ)実施例 第1図に本発明に用いるPTC装置の断面図を示す。(e) Examples FIG. 1 shows a sectional view of a PTC device used in the present invention.

PTCA子(1)は高密度のポリエチレンとエチレン/
アクリル酸コーボリマとの混合体にカーボンブラックを
分散させて成るものである。このPTC装置の抵抗は、
低抵抗体のとき罠は01オームであり、高抵抗体のとき
Kは約10 オームである。
PTCA child (1) is made of high density polyethylene and ethylene/
It is made by dispersing carbon black in a mixture with acrylic acid Corbolima. The resistance of this PTC device is
When the resistance is low, the trap is 0.1 ohm, and when the resistance is high, K is about 10 ohm.

接続電極(2)はPTC素子+11の一生面全面に設け
られ、通常銅箔な用いる。取付電極(31(31はPT
C諏子(11の接続電極(2)を設けた反対主面に配置
され、複数個離間して設ける。取付電極(31(31も
全面に銅箔を熱圧着した後エツチングして形成する。
The connection electrode (2) is provided on the entire surface of the PTC element +11, and is usually made of copper foil. Mounting electrode (31 (31 is PT)
The connection electrodes (11) are arranged on the opposite main surface from where the connection electrodes (2) are provided, and a plurality of them are provided at intervals.The attachment electrodes (31) are also formed by hot-pressing a copper foil over the entire surface and then etching it.

第2図および第3図に本発明に依る混成集積回路の上面
図及び断面図を示す。
2 and 3 show a top view and a cross-sectional view of a hybrid integrated circuit according to the present invention.

混成集積回路基板は良熱伝導性金属基板Oυとその基板
表面圧設けた絶縁薄層Q21より形成され、金属基板O
Dとしてはアルばニウムを用い、絶縁薄層aカとしては
陽極酸化により形成した酸化アルミニウムを用いる。
The hybrid integrated circuit board is formed from a metal substrate Oυ with good thermal conductivity and an insulating thin layer Q21 provided with a surface pressure of the metal substrate Oυ.
Albanium is used as D, and aluminum oxide formed by anodic oxidation is used as the insulating thin layer A.

混成集積回路基板表面には銅箔を熱圧着した後、所望形
状にエツチングして導電路03を形成する。
A copper foil is thermocompression bonded to the surface of the hybrid integrated circuit board, and then etched into a desired shape to form a conductive path 03.

導電路(131の形成時にPTC装置の取付電極(3)
+3)K対応する位置に固着パッドQ4を形成する。
The mounting electrode (3) of the PTC device when forming the conductive path (131)
+3) Form a fixing pad Q4 at a position corresponding to K.

発熱抵抗体θ9は固着パッドθ4)に近接して設け、カ
ーボンペーストのスクリーン印桐により形成される。発
熱抵抗体Q51の一端は固着パッドQ41に導電ペース
ト叫を介し℃接続され、他端は導電ペース)(16)を
介して他の導電路t131に接続されている。そして発
熱抵抗体(15)はPTC装置θω下に延在されている
The heating resistor θ9 is provided close to the fixing pad θ4), and is formed by screen printing of carbon paste. One end of the heating resistor Q51 is connected to the fixing pad Q41 through a conductive paste, and the other end is connected to another conductive path t131 through a conductive paste (16). The heating resistor (15) extends below the PTC device θω.

前述したPTC装置凹はその取付電極(31f31を固
着ハツト(14)に半田付けされ、フェースダウン方式
によりチップ部品として容易に組み込める。
The aforementioned PTC device recess has its mounting electrodes (31f31) soldered to the fixing hat (14), and can be easily assembled as a chip component by a face-down method.

斯上した本発明の構造によれば、発熱抵抗体09からの
発熱は第3図に点線で示す如く、金属基板01)→固着
バッド04)→取付電極(3)の経路でPTC装置0e
に熱が伝導され良好な熱結合が得られる。これは金属基
板Uυ固着パッド(+4)および取付電極(3)はすべ
て金属で形成されているので、熱伝導率が良好であるか
らである。
According to the structure of the present invention described above, the heat generated from the heating resistor 09 is transferred to the PTC device 0e through the route of the metal substrate 01)→adhesive pad 04)→mounting electrode (3), as shown by the dotted line in FIG.
Heat is conducted to the surface and good thermal coupling is obtained. This is because the metal substrate Uυ fixing pad (+4) and the mounting electrode (3) are all made of metal, and therefore have good thermal conductivity.

(へ)発明の効果 本発明に依ればPTC装置OQをチップ部品として混成
集積回路基板み込めるので、混成集積回路内KPTC装
置を用いた負荷ショート保農回路等をすべて内植できる
ようKなった。この結果IC化できる回路を拡張でき、
IC化のニーズに十分対応できるようになる。
(f) Effects of the Invention According to the present invention, the PTC device OQ can be incorporated into a hybrid integrated circuit board as a chip component, so that all the load short protection circuits etc. using the KPTC device in the hybrid integrated circuit can be implanted internally. Ta. As a result, the circuits that can be integrated into ICs can be expanded,
It will be possible to fully meet the needs of IC.

また混成集積回路基板として金属を用いるので発熱抵抗
体(151とPTC装置(W’)熱結合を十分九行うこ
とができ、発熱を正確に検知でき保線レベルの向上を図
れる。
Furthermore, since metal is used as the hybrid integrated circuit board, the heating resistor (151) and the PTC device (W') can be thermally coupled to each other, allowing accurate detection of heat generation and improving the track maintenance level.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図に不発りjK用いるPTC装置を説明rる断面図
、第2図は本発明に依る混成集積回路を説明する上面図
、第3図は第2図のIII −III #断面図である
。 主な図番の説明 Q(ItはPTC装置、 圓は金属基板、 0刃は導電
、路、 Q41は固着パッド、 0ωは発熱抵抗体であ
る。 出願人 三洋電機株式会社 外1名 代理人 弁理士 佐 野 静 夫 第2図 第3図 13 1’) 16 14
Fig. 1 is a sectional view explaining a PTC device using JK, Fig. 2 is a top view illustrating a hybrid integrated circuit according to the present invention, and Fig. 3 is a sectional view taken along line III-III in Fig. 2. . Explanation of main drawing numbers Q (It is PTC device, circle is metal substrate, 0 blade is conductive, path, Q41 is fixed pad, 0ω is heating resistor. Applicant: Sanyo Electric Co., Ltd. and 1 other representative, patent attorney) Shizuo Sano Figure 2 Figure 3 13 1') 16 14

Claims (1)

【特許請求の範囲】[Claims] (1)良熱伝導性金属基板と該基板上に設けた絶縁薄層
と該絶縁薄層上にiけた導電路及び発熱抵抗体を具備す
る混成集積回路に於い℃、前記発熱抵抗体の近傍の前記
基板上に前記導電路を延在して固着パッドな設け、該固
着パッドに正の温度係数を有するPTC物質より成るP
TC素子の取付電極を接続し、前記発熱抵抗体の発熱を
前記基板、固着パッドおよび取付電極を介して検知する
ことを特徴とする混成集積回路。
(1) In a hybrid integrated circuit comprising a metal substrate with good thermal conductivity, a thin insulating layer provided on the substrate, an i-shaped conductive path on the thin insulating layer, and a heat generating resistor, the temperature of the heat generating resistor at A fixing pad is provided by extending the conductive path on the substrate nearby, and the fixing pad is provided with a PTC material having a positive temperature coefficient.
1. A hybrid integrated circuit, characterized in that mounting electrodes of a TC element are connected to each other, and heat generated by the heating resistor is detected via the substrate, a fixing pad, and the mounting electrode.
JP10308784A 1984-05-22 1984-05-22 Hybrid integrated circuit Granted JPS60246693A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10308784A JPS60246693A (en) 1984-05-22 1984-05-22 Hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10308784A JPS60246693A (en) 1984-05-22 1984-05-22 Hybrid integrated circuit

Publications (2)

Publication Number Publication Date
JPS60246693A true JPS60246693A (en) 1985-12-06
JPH0365671B2 JPH0365671B2 (en) 1991-10-14

Family

ID=14344848

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10308784A Granted JPS60246693A (en) 1984-05-22 1984-05-22 Hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPS60246693A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0296701U (en) * 1989-01-21 1990-08-01

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2023124557A (en) 2022-02-25 2023-09-06 キヤノン株式会社 Image processing device, printing system, image processing method and program

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5329365A (en) * 1976-08-30 1978-03-18 Mobil Oil Method and device for producing extruded tubular film
JPS5632637A (en) * 1979-08-16 1981-04-02 Raychem Corp Electric system with circuit protecting ptc device
JPS57115201U (en) * 1981-01-10 1982-07-16
JPS5848407A (en) * 1981-09-17 1983-03-22 株式会社デンソー Method of producing positive temperature coefficient porcelain semiconductor

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5329365A (en) * 1976-08-30 1978-03-18 Mobil Oil Method and device for producing extruded tubular film
JPS5632637A (en) * 1979-08-16 1981-04-02 Raychem Corp Electric system with circuit protecting ptc device
JPS57115201U (en) * 1981-01-10 1982-07-16
JPS5848407A (en) * 1981-09-17 1983-03-22 株式会社デンソー Method of producing positive temperature coefficient porcelain semiconductor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0296701U (en) * 1989-01-21 1990-08-01

Also Published As

Publication number Publication date
JPH0365671B2 (en) 1991-10-14

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